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Defines and Type Definitions » Status and Control Registers » Nested Vectored Interrupt Controller (NVIC) » System Control Block (SCB)Defines and Type Definitions » Status and Control Registers » Nested Vectored Interrupt Controller (NVIC) » System Control Block (SCB) » | System Controls not in SCB (SCnSCB) » System Tick Timer (SysTick)Defines and Type Definitions » Status and Control Registers » Nested Vectored Interrupt Controller (NVIC) » System Control Block (SCB)Defines and Type Definitions » Status and Control Registers » Nested Vectored Interrupt Controller (NVIC) » System Control Block (SCB) » | System Controls not in SCB (SCnSCB) » System Tick Timer (SysTick) » | Instrumentation Trace Macrocell (ITM) » Data Watchpoint and Trace (DWT) » Trace Port Interface (TPI)Defines and Type Definitions » Status and Control Registers » Nested Vectored Interrupt Controller (NVIC) » System Control Block (SCB)Defines and Type Definitions » Status and Control Registers » Nested Vectored Interrupt Controller (NVIC) » System Control Block (SCB) » | System Controls not in SCB (SCnSCB) » System Tick Timer (SysTick)Defines and Type Definitions » Status and Control Registers » Nested Vectored Interrupt Controller (NVIC) » System Control Block (SCB)Defines and Type Definitions » Status and Control Registers » Nested Vectored Interrupt Controller (NVIC) » System Control Block (SCB) » | System Controls not in SCB (SCnSCB) » System Tick Timer (SysTick) » | Instrumentation Trace Macrocell (ITM) » Data Watchpoint and Trace (DWT) » Trace Port Interface (TPI) » | Floating Point Unit (FPU) » Core Debug Registers (CoreDebug) » Core register bit field macros » Core DefinitionsDefines and Type Definitions » Status and Control Registers » Nested Vectored Interrupt Controller (NVIC) » System Control Block (SCB)Defines and Type Definitions » Status and Control Registers » Nested Vectored Interrupt Controller (NVIC) » System Control Block (SCB) » | System Controls not in SCB (SCnSCB) » System Tick Timer (SysTick)Defines and Type Definitions » Status and Control Registers » Nested Vectored Interrupt Controller (NVIC) » System Control Block (SCB)Defines and Type Definitions » Status and Control Registers » Nested Vectored Interrupt Controller (NVIC) » System Control Block (SCB) » | System Controls not in SCB (SCnSCB) » System Tick Timer (SysTick) » | Instrumentation Trace Macrocell (ITM) » Data Watchpoint and Trace (DWT) » Trace Port Interface (TPI)Defines and Type Definitions » Status and Control Registers » Nested Vectored Interrupt Controller (NVIC) » System Control Block (SCB)Defines and Type Definitions » Status and Control Registers » Nested Vectored Interrupt Controller (NVIC) » System Control Block (SCB) » | System Controls not in SCB (SCnSCB) » System Tick Timer (SysTick)Defines and Type Definitions » Status and Control Registers » Nested Vectored Interrupt Controller (NVIC) » System Control Block (SCB)Defines and Type Definitions » Status and Control Registers » Nested Vectored Interrupt Controller (NVIC) » System Control Block (SCB) » | System Controls not in SCB (SCnSCB) » System Tick Timer (SysTick) » | Instrumentation Trace Macrocell (ITM) » Data Watchpoint and Trace (DWT) » Trace Port Interface (TPI) » | Floating Point Unit (FPU) » Core Debug Registers (CoreDebug) » Core register bit field macros » Core Definitions » | Functions and Instructions Reference

Functions that manage interrupts and exceptions via the NVIC. More...

Modules

 FPU Functions
 Function that provides FPU type.
 
__STATIC_INLINE void __NVIC_EnableIRQ (IRQn_Type IRQn)
 Enable Interrupt. More...
 
__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ (IRQn_Type IRQn)
 Get Interrupt Enable status. More...
 
__STATIC_INLINE void __NVIC_DisableIRQ (IRQn_Type IRQn)
 Disable Interrupt. More...
 
__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ (IRQn_Type IRQn)
 Get Pending Interrupt. More...
 
__STATIC_INLINE void __NVIC_SetPendingIRQ (IRQn_Type IRQn)
 Set Pending Interrupt. More...
 
__STATIC_INLINE void __NVIC_ClearPendingIRQ (IRQn_Type IRQn)
 Clear Pending Interrupt. More...
 
__STATIC_INLINE uint32_t __NVIC_GetActive (IRQn_Type IRQn)
 Get Active Interrupt. More...
 
__STATIC_INLINE void __NVIC_SetPriority (IRQn_Type IRQn, uint32_t priority)
 Set Interrupt Priority. More...
 
__STATIC_INLINE uint32_t __NVIC_GetPriority (IRQn_Type IRQn)
 Get Interrupt Priority. More...
 
__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
 Encode Priority. More...
 
__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t *const pPreemptPriority, uint32_t *const pSubPriority)
 Decode Priority. More...
 
__STATIC_INLINE void __NVIC_SetVector (IRQn_Type IRQn, uint32_t vector)
 Set Interrupt Vector. More...
 
__STATIC_INLINE uint32_t __NVIC_GetVector (IRQn_Type IRQn)
 Get Interrupt Vector. More...
 
__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset (void)
 System Reset. More...
 
__STATIC_INLINE uint32_t SCB_GetFPUType (void)
 get FPU type More...
 
#define NVIC_SetPriorityGrouping   __NVIC_SetPriorityGrouping
 
#define NVIC_GetPriorityGrouping   __NVIC_GetPriorityGrouping
 
#define NVIC_EnableIRQ   __NVIC_EnableIRQ
 
#define NVIC_GetEnableIRQ   __NVIC_GetEnableIRQ
 
#define NVIC_DisableIRQ   __NVIC_DisableIRQ
 
#define NVIC_GetPendingIRQ   __NVIC_GetPendingIRQ
 
#define NVIC_SetPendingIRQ   __NVIC_SetPendingIRQ
 
#define NVIC_ClearPendingIRQ   __NVIC_ClearPendingIRQ
 
#define NVIC_GetActive   __NVIC_GetActive
 
#define NVIC_SetPriority   __NVIC_SetPriority
 
#define NVIC_GetPriority   __NVIC_GetPriority
 
#define NVIC_SystemReset   __NVIC_SystemReset
 
#define NVIC_SetVector   __NVIC_SetVector
 
#define NVIC_GetVector   __NVIC_GetVector
 
#define NVIC_USER_IRQ_OFFSET   16
 
#define FNC_RETURN   (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */
 
#define EXC_RETURN_PREFIX   (0xFF000000UL) /* bits [31:24] set to indicate an EXC_RETURN value */
 
#define EXC_RETURN_S   (0x00000040UL) /* bit [6] stack used to push registers: 0=Non-secure 1=Secure */
 
#define EXC_RETURN_DCRS   (0x00000020UL) /* bit [5] stacking rules for called registers: 0=skipped 1=saved */
 
#define EXC_RETURN_FTYPE   (0x00000010UL) /* bit [4] allocate stack for floating-point context: 0=done 1=skipped */
 
#define EXC_RETURN_MODE   (0x00000008UL) /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode */
 
#define EXC_RETURN_SPSEL   (0x00000002UL) /* bit [1] stack pointer used to restore context: 0=MSP 1=PSP */
 
#define EXC_RETURN_ES   (0x00000001UL) /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */
 
#define EXC_INTEGRITY_SIGNATURE   (0xFEFA125BUL) /* Value for processors without floating-point extension */
 
#define _BIT_SHIFT(IRQn)   ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL)
 
#define _SHP_IDX(IRQn)   ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) )
 
#define _IP_IDX(IRQn)   ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) )
 
#define __NVIC_SetPriorityGrouping(X)   (void)(X)
 
#define __NVIC_GetPriorityGrouping()   (0U)
 Get Priority Grouping. More...
 
__STATIC_INLINE void __NVIC_SetPriorityGrouping (uint32_t PriorityGroup)
 Set Priority Grouping. More...
 
__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping (void)
 Get Priority Grouping. More...
 
__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
 ITM Send Character. More...
 
__STATIC_INLINE int32_t ITM_ReceiveChar (void)
 ITM Receive Character. More...
 
__STATIC_INLINE int32_t ITM_CheckChar (void)
 ITM Check Character. More...
 
#define NVIC_SetPriorityGrouping   __NVIC_SetPriorityGrouping
 
#define NVIC_GetPriorityGrouping   __NVIC_GetPriorityGrouping
 
#define NVIC_EnableIRQ   __NVIC_EnableIRQ
 
#define NVIC_GetEnableIRQ   __NVIC_GetEnableIRQ
 
#define NVIC_DisableIRQ   __NVIC_DisableIRQ
 
#define NVIC_GetPendingIRQ   __NVIC_GetPendingIRQ
 
#define NVIC_SetPendingIRQ   __NVIC_SetPendingIRQ
 
#define NVIC_ClearPendingIRQ   __NVIC_ClearPendingIRQ
 
#define NVIC_GetActive   __NVIC_GetActive
 
#define NVIC_SetPriority   __NVIC_SetPriority
 
#define NVIC_GetPriority   __NVIC_GetPriority
 
#define NVIC_SystemReset   __NVIC_SystemReset
 
#define NVIC_SetVector   __NVIC_SetVector
 
#define NVIC_GetVector   __NVIC_GetVector
 
#define NVIC_USER_IRQ_OFFSET   16
 
#define FNC_RETURN   (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */
 
#define EXC_RETURN_PREFIX   (0xFF000000UL) /* bits [31:24] set to indicate an EXC_RETURN value */
 
#define EXC_RETURN_S   (0x00000040UL) /* bit [6] stack used to push registers: 0=Non-secure 1=Secure */
 
#define EXC_RETURN_DCRS   (0x00000020UL) /* bit [5] stacking rules for called registers: 0=skipped 1=saved */
 
#define EXC_RETURN_FTYPE   (0x00000010UL) /* bit [4] allocate stack for floating-point context: 0=done 1=skipped */
 
#define EXC_RETURN_MODE   (0x00000008UL) /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode */
 
#define EXC_RETURN_SPSEL   (0x00000002UL) /* bit [1] stack pointer used to restore context: 0=MSP 1=PSP */
 
#define EXC_RETURN_ES   (0x00000001UL) /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */
 
#define EXC_INTEGRITY_SIGNATURE   (0xFEFA125BUL) /* Value for processors without floating-point extension */
 
#define NVIC_SetPriorityGrouping   __NVIC_SetPriorityGrouping
 
#define NVIC_GetPriorityGrouping   __NVIC_GetPriorityGrouping
 
#define NVIC_EnableIRQ   __NVIC_EnableIRQ
 
#define NVIC_GetEnableIRQ   __NVIC_GetEnableIRQ
 
#define NVIC_DisableIRQ   __NVIC_DisableIRQ
 
#define NVIC_GetPendingIRQ   __NVIC_GetPendingIRQ
 
#define NVIC_SetPendingIRQ   __NVIC_SetPendingIRQ
 
#define NVIC_ClearPendingIRQ   __NVIC_ClearPendingIRQ
 
#define NVIC_SetPriority   __NVIC_SetPriority
 
#define NVIC_GetPriority   __NVIC_GetPriority
 
#define NVIC_SystemReset   __NVIC_SystemReset
 
#define NVIC_SetVector   __NVIC_SetVector
 
#define NVIC_GetVector   __NVIC_GetVector
 
#define NVIC_USER_IRQ_OFFSET   16
 
#define EXC_RETURN_HANDLER   (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */
 
#define EXC_RETURN_THREAD_MSP   (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */
 
#define EXC_RETURN_THREAD_PSP   (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */
 
#define _BIT_SHIFT(IRQn)   ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL)
 
#define _SHP_IDX(IRQn)   ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) )
 
#define _IP_IDX(IRQn)   ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) )
 
#define __NVIC_SetPriorityGrouping(X)   (void)(X)
 
#define __NVIC_GetPriorityGrouping()   (0U)
 
#define NVIC_SetPriorityGrouping   __NVIC_SetPriorityGrouping
 
#define NVIC_GetPriorityGrouping   __NVIC_GetPriorityGrouping
 
#define NVIC_EnableIRQ   __NVIC_EnableIRQ
 
#define NVIC_GetEnableIRQ   __NVIC_GetEnableIRQ
 
#define NVIC_DisableIRQ   __NVIC_DisableIRQ
 
#define NVIC_GetPendingIRQ   __NVIC_GetPendingIRQ
 
#define NVIC_SetPendingIRQ   __NVIC_SetPendingIRQ
 
#define NVIC_ClearPendingIRQ   __NVIC_ClearPendingIRQ
 
#define NVIC_SetPriority   __NVIC_SetPriority
 
#define NVIC_GetPriority   __NVIC_GetPriority
 
#define NVIC_SystemReset   __NVIC_SystemReset
 
#define NVIC_SetVector   __NVIC_SetVector
 
#define NVIC_GetVector   __NVIC_GetVector
 
#define NVIC_USER_IRQ_OFFSET   16
 
#define EXC_RETURN_HANDLER   (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */
 
#define EXC_RETURN_THREAD_MSP   (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */
 
#define EXC_RETURN_THREAD_PSP   (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */
 
#define _BIT_SHIFT(IRQn)   ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL)
 
#define _SHP_IDX(IRQn)   ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) )
 
#define _IP_IDX(IRQn)   ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) )
 
#define __NVIC_SetPriorityGrouping(X)   (void)(X)
 
#define __NVIC_GetPriorityGrouping()   (0U)
 
#define NVIC_SetPriorityGrouping   __NVIC_SetPriorityGrouping
 
#define NVIC_GetPriorityGrouping   __NVIC_GetPriorityGrouping
 
#define NVIC_EnableIRQ   __NVIC_EnableIRQ
 
#define NVIC_GetEnableIRQ   __NVIC_GetEnableIRQ
 
#define NVIC_DisableIRQ   __NVIC_DisableIRQ
 
#define NVIC_GetPendingIRQ   __NVIC_GetPendingIRQ
 
#define NVIC_SetPendingIRQ   __NVIC_SetPendingIRQ
 
#define NVIC_ClearPendingIRQ   __NVIC_ClearPendingIRQ
 
#define NVIC_SetPriority   __NVIC_SetPriority
 
#define NVIC_GetPriority   __NVIC_GetPriority
 
#define NVIC_SystemReset   __NVIC_SystemReset
 
#define NVIC_SetVector   __NVIC_SetVector
 
#define NVIC_GetVector   __NVIC_GetVector
 
#define NVIC_USER_IRQ_OFFSET   16
 
#define EXC_RETURN_HANDLER   (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */
 
#define EXC_RETURN_THREAD_MSP   (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */
 
#define EXC_RETURN_THREAD_PSP   (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */
 
#define _BIT_SHIFT(IRQn)   ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL)
 
#define _SHP_IDX(IRQn)   ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) )
 
#define _IP_IDX(IRQn)   ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) )
 
#define __NVIC_SetPriorityGrouping(X)   (void)(X)
 
#define __NVIC_GetPriorityGrouping()   (0U)
 
#define NVIC_EnableIRQ   __NVIC_EnableIRQ
 
#define NVIC_GetEnableIRQ   __NVIC_GetEnableIRQ
 
#define NVIC_DisableIRQ   __NVIC_DisableIRQ
 
#define NVIC_GetPendingIRQ   __NVIC_GetPendingIRQ
 
#define NVIC_SetPendingIRQ   __NVIC_SetPendingIRQ
 
#define NVIC_ClearPendingIRQ   __NVIC_ClearPendingIRQ
 
#define NVIC_GetActive   __NVIC_GetActive
 
#define NVIC_SetPriority   __NVIC_SetPriority
 
#define NVIC_GetPriority   __NVIC_GetPriority
 
#define NVIC_SystemReset   __NVIC_SystemReset
 
#define NVIC_SetVector   __NVIC_SetVector
 
#define NVIC_GetVector   __NVIC_GetVector
 
#define NVIC_USER_IRQ_OFFSET   16
 
#define FNC_RETURN   (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */
 
#define EXC_RETURN_PREFIX   (0xFF000000UL) /* bits [31:24] set to indicate an EXC_RETURN value */
 
#define EXC_RETURN_S   (0x00000040UL) /* bit [6] stack used to push registers: 0=Non-secure 1=Secure */
 
#define EXC_RETURN_DCRS   (0x00000020UL) /* bit [5] stacking rules for called registers: 0=skipped 1=saved */
 
#define EXC_RETURN_FTYPE   (0x00000010UL) /* bit [4] allocate stack for floating-point context: 0=done 1=skipped */
 
#define EXC_RETURN_MODE   (0x00000008UL) /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode */
 
#define EXC_RETURN_SPSEL   (0x00000002UL) /* bit [1] stack pointer used to restore context: 0=MSP 1=PSP */
 
#define EXC_RETURN_ES   (0x00000001UL) /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */
 
#define EXC_INTEGRITY_SIGNATURE   (0xFEFA125BUL) /* Value for processors without floating-point extension */
 
#define _BIT_SHIFT(IRQn)   ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL)
 
#define _SHP_IDX(IRQn)   ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) )
 
#define _IP_IDX(IRQn)   ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) )
 
#define __NVIC_SetPriorityGrouping(X)   (void)(X)
 
#define __NVIC_GetPriorityGrouping()   (0U)
 
#define NVIC_SetPriorityGrouping   __NVIC_SetPriorityGrouping
 
#define NVIC_GetPriorityGrouping   __NVIC_GetPriorityGrouping
 
#define NVIC_EnableIRQ   __NVIC_EnableIRQ
 
#define NVIC_GetEnableIRQ   __NVIC_GetEnableIRQ
 
#define NVIC_DisableIRQ   __NVIC_DisableIRQ
 
#define NVIC_GetPendingIRQ   __NVIC_GetPendingIRQ
 
#define NVIC_SetPendingIRQ   __NVIC_SetPendingIRQ
 
#define NVIC_ClearPendingIRQ   __NVIC_ClearPendingIRQ
 
#define NVIC_GetActive   __NVIC_GetActive
 
#define NVIC_SetPriority   __NVIC_SetPriority
 
#define NVIC_GetPriority   __NVIC_GetPriority
 
#define NVIC_SystemReset   __NVIC_SystemReset
 
#define NVIC_SetVector   __NVIC_SetVector
 
#define NVIC_GetVector   __NVIC_GetVector
 
#define NVIC_USER_IRQ_OFFSET   16
 
#define EXC_RETURN_HANDLER   (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */
 
#define EXC_RETURN_THREAD_MSP   (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */
 
#define EXC_RETURN_THREAD_PSP   (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */
 
#define NVIC_SetPriorityGrouping   __NVIC_SetPriorityGrouping
 
#define NVIC_GetPriorityGrouping   __NVIC_GetPriorityGrouping
 
#define NVIC_EnableIRQ   __NVIC_EnableIRQ
 
#define NVIC_GetEnableIRQ   __NVIC_GetEnableIRQ
 
#define NVIC_DisableIRQ   __NVIC_DisableIRQ
 
#define NVIC_GetPendingIRQ   __NVIC_GetPendingIRQ
 
#define NVIC_SetPendingIRQ   __NVIC_SetPendingIRQ
 
#define NVIC_ClearPendingIRQ   __NVIC_ClearPendingIRQ
 
#define NVIC_GetActive   __NVIC_GetActive
 
#define NVIC_SetPriority   __NVIC_SetPriority
 
#define NVIC_GetPriority   __NVIC_GetPriority
 
#define NVIC_SystemReset   __NVIC_SystemReset
 
#define NVIC_SetVector   __NVIC_SetVector
 
#define NVIC_GetVector   __NVIC_GetVector
 
#define NVIC_USER_IRQ_OFFSET   16
 
#define FNC_RETURN   (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */
 
#define EXC_RETURN_PREFIX   (0xFF000000UL) /* bits [31:24] set to indicate an EXC_RETURN value */
 
#define EXC_RETURN_S   (0x00000040UL) /* bit [6] stack used to push registers: 0=Non-secure 1=Secure */
 
#define EXC_RETURN_DCRS   (0x00000020UL) /* bit [5] stacking rules for called registers: 0=skipped 1=saved */
 
#define EXC_RETURN_FTYPE   (0x00000010UL) /* bit [4] allocate stack for floating-point context: 0=done 1=skipped */
 
#define EXC_RETURN_MODE   (0x00000008UL) /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode */
 
#define EXC_RETURN_SPSEL   (0x00000002UL) /* bit [1] stack pointer used to restore context: 0=MSP 1=PSP */
 
#define EXC_RETURN_ES   (0x00000001UL) /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */
 
#define EXC_INTEGRITY_SIGNATURE   (0xFEFA125BUL) /* Value for processors without floating-point extension */
 
#define NVIC_SetPriorityGrouping   __NVIC_SetPriorityGrouping
 
#define NVIC_GetPriorityGrouping   __NVIC_GetPriorityGrouping
 
#define NVIC_EnableIRQ   __NVIC_EnableIRQ
 
#define NVIC_GetEnableIRQ   __NVIC_GetEnableIRQ
 
#define NVIC_DisableIRQ   __NVIC_DisableIRQ
 
#define NVIC_GetPendingIRQ   __NVIC_GetPendingIRQ
 
#define NVIC_SetPendingIRQ   __NVIC_SetPendingIRQ
 
#define NVIC_ClearPendingIRQ   __NVIC_ClearPendingIRQ
 
#define NVIC_GetActive   __NVIC_GetActive
 
#define NVIC_SetPriority   __NVIC_SetPriority
 
#define NVIC_GetPriority   __NVIC_GetPriority
 
#define NVIC_SystemReset   __NVIC_SystemReset
 
#define NVIC_SetVector   __NVIC_SetVector
 
#define NVIC_GetVector   __NVIC_GetVector
 
#define NVIC_USER_IRQ_OFFSET   16
 
#define EXC_RETURN_HANDLER   (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */
 
#define EXC_RETURN_THREAD_MSP   (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */
 
#define EXC_RETURN_THREAD_PSP   (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */
 
#define EXC_RETURN_HANDLER_FPU   (0xFFFFFFE1UL) /* return to Handler mode, uses MSP after return, restore floating-point state */
 
#define EXC_RETURN_THREAD_MSP_FPU   (0xFFFFFFE9UL) /* return to Thread mode, uses MSP after return, restore floating-point state */
 
#define EXC_RETURN_THREAD_PSP_FPU   (0xFFFFFFEDUL) /* return to Thread mode, uses PSP after return, restore floating-point state */
 
#define NVIC_SetPriorityGrouping   __NVIC_SetPriorityGrouping
 
#define NVIC_GetPriorityGrouping   __NVIC_GetPriorityGrouping
 
#define NVIC_EnableIRQ   __NVIC_EnableIRQ
 
#define NVIC_GetEnableIRQ   __NVIC_GetEnableIRQ
 
#define NVIC_DisableIRQ   __NVIC_DisableIRQ
 
#define NVIC_GetPendingIRQ   __NVIC_GetPendingIRQ
 
#define NVIC_SetPendingIRQ   __NVIC_SetPendingIRQ
 
#define NVIC_ClearPendingIRQ   __NVIC_ClearPendingIRQ
 
#define NVIC_GetActive   __NVIC_GetActive
 
#define NVIC_SetPriority   __NVIC_SetPriority
 
#define NVIC_GetPriority   __NVIC_GetPriority
 
#define NVIC_SystemReset   __NVIC_SystemReset
 
#define NVIC_SetVector   __NVIC_SetVector
 
#define NVIC_GetVector   __NVIC_GetVector
 
#define NVIC_USER_IRQ_OFFSET   16
 
#define EXC_RETURN_HANDLER   (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */
 
#define EXC_RETURN_THREAD_MSP   (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */
 
#define EXC_RETURN_THREAD_PSP   (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */
 
#define EXC_RETURN_HANDLER_FPU   (0xFFFFFFE1UL) /* return to Handler mode, uses MSP after return, restore floating-point state */
 
#define EXC_RETURN_THREAD_MSP_FPU   (0xFFFFFFE9UL) /* return to Thread mode, uses MSP after return, restore floating-point state */
 
#define EXC_RETURN_THREAD_PSP_FPU   (0xFFFFFFEDUL) /* return to Thread mode, uses PSP after return, restore floating-point state */
 
#define NVIC_EnableIRQ   __NVIC_EnableIRQ
 
#define NVIC_GetEnableIRQ   __NVIC_GetEnableIRQ
 
#define NVIC_DisableIRQ   __NVIC_DisableIRQ
 
#define NVIC_GetPendingIRQ   __NVIC_GetPendingIRQ
 
#define NVIC_SetPendingIRQ   __NVIC_SetPendingIRQ
 
#define NVIC_ClearPendingIRQ   __NVIC_ClearPendingIRQ
 
#define NVIC_SetPriority   __NVIC_SetPriority
 
#define NVIC_GetPriority   __NVIC_GetPriority
 
#define NVIC_SystemReset   __NVIC_SystemReset
 
#define NVIC_SetVector   __NVIC_SetVector
 
#define NVIC_GetVector   __NVIC_GetVector
 
#define NVIC_USER_IRQ_OFFSET   16
 
#define EXC_RETURN_HANDLER   (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */
 
#define EXC_RETURN_THREAD_MSP   (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */
 
#define EXC_RETURN_THREAD_PSP   (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */
 
#define _BIT_SHIFT(IRQn)   ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL)
 
#define _SHP_IDX(IRQn)   ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) )
 
#define _IP_IDX(IRQn)   ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) )
 
#define NVIC_SetPriorityGrouping   __NVIC_SetPriorityGrouping
 
#define NVIC_GetPriorityGrouping   __NVIC_GetPriorityGrouping
 
#define NVIC_EnableIRQ   __NVIC_EnableIRQ
 
#define NVIC_GetEnableIRQ   __NVIC_GetEnableIRQ
 
#define NVIC_DisableIRQ   __NVIC_DisableIRQ
 
#define NVIC_GetPendingIRQ   __NVIC_GetPendingIRQ
 
#define NVIC_SetPendingIRQ   __NVIC_SetPendingIRQ
 
#define NVIC_ClearPendingIRQ   __NVIC_ClearPendingIRQ
 
#define NVIC_GetActive   __NVIC_GetActive
 
#define NVIC_SetPriority   __NVIC_SetPriority
 
#define NVIC_GetPriority   __NVIC_GetPriority
 
#define NVIC_SystemReset   __NVIC_SystemReset
 
#define NVIC_SetVector   __NVIC_SetVector
 
#define NVIC_GetVector   __NVIC_GetVector
 
#define NVIC_USER_IRQ_OFFSET   16
 
#define EXC_RETURN_HANDLER   (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */
 
#define EXC_RETURN_THREAD_MSP   (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */
 
#define EXC_RETURN_THREAD_PSP   (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */
 

Detailed Description

Functions that manage interrupts and exceptions via the NVIC.

Macro Definition Documentation

◆ __NVIC_GetPriorityGrouping [1/5]

#define __NVIC_GetPriorityGrouping ( )    (0U)

Definition at line 615 of file core_cm0.h.

◆ __NVIC_GetPriorityGrouping [2/5]

#define __NVIC_GetPriorityGrouping ( )    (0U)

Definition at line 642 of file core_cm1.h.

◆ __NVIC_GetPriorityGrouping [3/5]

#define __NVIC_GetPriorityGrouping ( )    (0U)

Definition at line 733 of file core_cm0plus.h.

◆ __NVIC_GetPriorityGrouping [4/5]

__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping ( )    (0U)

Get Priority Grouping.

Reads the priority grouping field from the NVIC Interrupt Controller.

Returns
Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).

< System Control Space Base Address

< System Control Block Base Address

< SCB configuration struct

< SCB AIRCR: PRIGROUP Position

< SCB AIRCR: PRIGROUP Mask

< SCB AIRCR: PRIGROUP Position

Definition at line 1244 of file core_armv8mbl.h.

◆ __NVIC_GetPriorityGrouping [5/5]

#define __NVIC_GetPriorityGrouping ( )    (0U)

Definition at line 1319 of file core_cm23.h.

◆ __NVIC_SetPriorityGrouping [1/5]

#define __NVIC_SetPriorityGrouping (   X)    (void)(X)

Definition at line 614 of file core_cm0.h.

◆ __NVIC_SetPriorityGrouping [2/5]

#define __NVIC_SetPriorityGrouping (   X)    (void)(X)

Definition at line 641 of file core_cm1.h.

◆ __NVIC_SetPriorityGrouping [3/5]

#define __NVIC_SetPriorityGrouping (   X)    (void)(X)

Definition at line 732 of file core_cm0plus.h.

◆ __NVIC_SetPriorityGrouping [4/5]

#define __NVIC_SetPriorityGrouping (   X)    (void)(X)

Definition at line 1243 of file core_armv8mbl.h.

◆ __NVIC_SetPriorityGrouping [5/5]

#define __NVIC_SetPriorityGrouping (   X)    (void)(X)

Definition at line 1318 of file core_cm23.h.

◆ _BIT_SHIFT [1/6]

#define _BIT_SHIFT (   IRQn)    ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL)

Definition at line 610 of file core_cm0.h.

◆ _BIT_SHIFT [2/6]

#define _BIT_SHIFT (   IRQn)    ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL)

Definition at line 637 of file core_cm1.h.

◆ _BIT_SHIFT [3/6]

#define _BIT_SHIFT (   IRQn)    ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL)

Definition at line 728 of file core_cm0plus.h.

◆ _BIT_SHIFT [4/6]

#define _BIT_SHIFT (   IRQn)    ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL)

Definition at line 738 of file core_sc000.h.

◆ _BIT_SHIFT [5/6]

#define _BIT_SHIFT (   IRQn)    ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL)

Definition at line 1239 of file core_armv8mbl.h.

◆ _BIT_SHIFT [6/6]

#define _BIT_SHIFT (   IRQn)    ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL)

Definition at line 1314 of file core_cm23.h.

◆ _IP_IDX [1/6]

#define _IP_IDX (   IRQn)    ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) )

Definition at line 612 of file core_cm0.h.

◆ _IP_IDX [2/6]

#define _IP_IDX (   IRQn)    ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) )

Definition at line 639 of file core_cm1.h.

◆ _IP_IDX [3/6]

#define _IP_IDX (   IRQn)    ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) )

Definition at line 730 of file core_cm0plus.h.

◆ _IP_IDX [4/6]

#define _IP_IDX (   IRQn)    ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) )

Definition at line 740 of file core_sc000.h.

◆ _IP_IDX [5/6]

#define _IP_IDX (   IRQn)    ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) )

Definition at line 1241 of file core_armv8mbl.h.

◆ _IP_IDX [6/6]

#define _IP_IDX (   IRQn)    ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) )

Definition at line 1316 of file core_cm23.h.

◆ _SHP_IDX [1/6]

#define _SHP_IDX (   IRQn)    ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) )

Definition at line 611 of file core_cm0.h.

◆ _SHP_IDX [2/6]

#define _SHP_IDX (   IRQn)    ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) )

Definition at line 638 of file core_cm1.h.

◆ _SHP_IDX [3/6]

#define _SHP_IDX (   IRQn)    ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) )

Definition at line 729 of file core_cm0plus.h.

◆ _SHP_IDX [4/6]

#define _SHP_IDX (   IRQn)    ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) )

Definition at line 739 of file core_sc000.h.

◆ _SHP_IDX [5/6]

#define _SHP_IDX (   IRQn)    ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) )

Definition at line 1240 of file core_armv8mbl.h.

◆ _SHP_IDX [6/6]

#define _SHP_IDX (   IRQn)    ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) )

Definition at line 1315 of file core_cm23.h.

◆ EXC_INTEGRITY_SIGNATURE [1/4]

#define EXC_INTEGRITY_SIGNATURE   (0xFEFA125BUL) /* Value for processors without floating-point extension */

Definition at line 1233 of file core_armv8mbl.h.

◆ EXC_INTEGRITY_SIGNATURE [2/4]

#define EXC_INTEGRITY_SIGNATURE   (0xFEFA125BUL) /* Value for processors without floating-point extension */

Definition at line 1308 of file core_cm23.h.

◆ EXC_INTEGRITY_SIGNATURE [3/4]

#define EXC_INTEGRITY_SIGNATURE   (0xFEFA125BUL) /* Value for processors without floating-point extension */

Definition at line 2103 of file core_armv8mml.h.

◆ EXC_INTEGRITY_SIGNATURE [4/4]

#define EXC_INTEGRITY_SIGNATURE   (0xFEFA125BUL) /* Value for processors without floating-point extension */

Definition at line 2178 of file core_cm33.h.

◆ EXC_RETURN_DCRS [1/4]

#define EXC_RETURN_DCRS   (0x00000020UL) /* bit [5] stacking rules for called registers: 0=skipped 1=saved */

Definition at line 1223 of file core_armv8mbl.h.

◆ EXC_RETURN_DCRS [2/4]

#define EXC_RETURN_DCRS   (0x00000020UL) /* bit [5] stacking rules for called registers: 0=skipped 1=saved */

Definition at line 1298 of file core_cm23.h.

◆ EXC_RETURN_DCRS [3/4]

#define EXC_RETURN_DCRS   (0x00000020UL) /* bit [5] stacking rules for called registers: 0=skipped 1=saved */

Definition at line 2093 of file core_armv8mml.h.

◆ EXC_RETURN_DCRS [4/4]

#define EXC_RETURN_DCRS   (0x00000020UL) /* bit [5] stacking rules for called registers: 0=skipped 1=saved */

Definition at line 2168 of file core_cm33.h.

◆ EXC_RETURN_ES [1/4]

#define EXC_RETURN_ES   (0x00000001UL) /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */

Definition at line 1227 of file core_armv8mbl.h.

◆ EXC_RETURN_ES [2/4]

#define EXC_RETURN_ES   (0x00000001UL) /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */

Definition at line 1302 of file core_cm23.h.

◆ EXC_RETURN_ES [3/4]

#define EXC_RETURN_ES   (0x00000001UL) /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */

Definition at line 2097 of file core_armv8mml.h.

◆ EXC_RETURN_ES [4/4]

#define EXC_RETURN_ES   (0x00000001UL) /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */

Definition at line 2172 of file core_cm33.h.

◆ EXC_RETURN_FTYPE [1/4]

#define EXC_RETURN_FTYPE   (0x00000010UL) /* bit [4] allocate stack for floating-point context: 0=done 1=skipped */

Definition at line 1224 of file core_armv8mbl.h.

◆ EXC_RETURN_FTYPE [2/4]

#define EXC_RETURN_FTYPE   (0x00000010UL) /* bit [4] allocate stack for floating-point context: 0=done 1=skipped */

Definition at line 1299 of file core_cm23.h.

◆ EXC_RETURN_FTYPE [3/4]

#define EXC_RETURN_FTYPE   (0x00000010UL) /* bit [4] allocate stack for floating-point context: 0=done 1=skipped */

Definition at line 2094 of file core_armv8mml.h.

◆ EXC_RETURN_FTYPE [4/4]

#define EXC_RETURN_FTYPE   (0x00000010UL) /* bit [4] allocate stack for floating-point context: 0=done 1=skipped */

Definition at line 2169 of file core_cm33.h.

◆ EXC_RETURN_HANDLER [1/8]

#define EXC_RETURN_HANDLER   (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */

Definition at line 603 of file core_cm0.h.

◆ EXC_RETURN_HANDLER [2/8]

#define EXC_RETURN_HANDLER   (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */

Definition at line 630 of file core_cm1.h.

◆ EXC_RETURN_HANDLER [3/8]

#define EXC_RETURN_HANDLER   (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */

Definition at line 721 of file core_cm0plus.h.

◆ EXC_RETURN_HANDLER [4/8]

#define EXC_RETURN_HANDLER   (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */

Definition at line 731 of file core_sc000.h.

◆ EXC_RETURN_HANDLER [5/8]

#define EXC_RETURN_HANDLER   (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */

Definition at line 1446 of file core_sc300.h.

◆ EXC_RETURN_HANDLER [6/8]

#define EXC_RETURN_HANDLER   (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */

Definition at line 1466 of file core_cm3.h.

◆ EXC_RETURN_HANDLER [7/8]

#define EXC_RETURN_HANDLER   (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */

Definition at line 1640 of file core_cm4.h.

◆ EXC_RETURN_HANDLER [8/8]

#define EXC_RETURN_HANDLER   (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after return */

Definition at line 1848 of file core_cm7.h.

◆ EXC_RETURN_HANDLER_FPU [1/2]

#define EXC_RETURN_HANDLER_FPU   (0xFFFFFFE1UL) /* return to Handler mode, uses MSP after return, restore floating-point state */

Definition at line 1643 of file core_cm4.h.

◆ EXC_RETURN_HANDLER_FPU [2/2]

#define EXC_RETURN_HANDLER_FPU   (0xFFFFFFE1UL) /* return to Handler mode, uses MSP after return, restore floating-point state */

Definition at line 1851 of file core_cm7.h.

◆ EXC_RETURN_MODE [1/4]

#define EXC_RETURN_MODE   (0x00000008UL) /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode */

Definition at line 1225 of file core_armv8mbl.h.

◆ EXC_RETURN_MODE [2/4]

#define EXC_RETURN_MODE   (0x00000008UL) /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode */

Definition at line 1300 of file core_cm23.h.

◆ EXC_RETURN_MODE [3/4]

#define EXC_RETURN_MODE   (0x00000008UL) /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode */

Definition at line 2095 of file core_armv8mml.h.

◆ EXC_RETURN_MODE [4/4]

#define EXC_RETURN_MODE   (0x00000008UL) /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode */

Definition at line 2170 of file core_cm33.h.

◆ EXC_RETURN_PREFIX [1/4]

#define EXC_RETURN_PREFIX   (0xFF000000UL) /* bits [31:24] set to indicate an EXC_RETURN value */

Definition at line 1221 of file core_armv8mbl.h.

◆ EXC_RETURN_PREFIX [2/4]

#define EXC_RETURN_PREFIX   (0xFF000000UL) /* bits [31:24] set to indicate an EXC_RETURN value */

Definition at line 1296 of file core_cm23.h.

◆ EXC_RETURN_PREFIX [3/4]

#define EXC_RETURN_PREFIX   (0xFF000000UL) /* bits [31:24] set to indicate an EXC_RETURN value */

Definition at line 2091 of file core_armv8mml.h.

◆ EXC_RETURN_PREFIX [4/4]

#define EXC_RETURN_PREFIX   (0xFF000000UL) /* bits [31:24] set to indicate an EXC_RETURN value */

Definition at line 2166 of file core_cm33.h.

◆ EXC_RETURN_S [1/4]

#define EXC_RETURN_S   (0x00000040UL) /* bit [6] stack used to push registers: 0=Non-secure 1=Secure */

Definition at line 1222 of file core_armv8mbl.h.

◆ EXC_RETURN_S [2/4]

#define EXC_RETURN_S   (0x00000040UL) /* bit [6] stack used to push registers: 0=Non-secure 1=Secure */

Definition at line 1297 of file core_cm23.h.

◆ EXC_RETURN_S [3/4]

#define EXC_RETURN_S   (0x00000040UL) /* bit [6] stack used to push registers: 0=Non-secure 1=Secure */

Definition at line 2092 of file core_armv8mml.h.

◆ EXC_RETURN_S [4/4]

#define EXC_RETURN_S   (0x00000040UL) /* bit [6] stack used to push registers: 0=Non-secure 1=Secure */

Definition at line 2167 of file core_cm33.h.

◆ EXC_RETURN_SPSEL [1/4]

#define EXC_RETURN_SPSEL   (0x00000002UL) /* bit [1] stack pointer used to restore context: 0=MSP 1=PSP */

Definition at line 1226 of file core_armv8mbl.h.

◆ EXC_RETURN_SPSEL [2/4]

#define EXC_RETURN_SPSEL   (0x00000002UL) /* bit [1] stack pointer used to restore context: 0=MSP 1=PSP */

Definition at line 1301 of file core_cm23.h.

◆ EXC_RETURN_SPSEL [3/4]

#define EXC_RETURN_SPSEL   (0x00000002UL) /* bit [1] stack pointer used to restore context: 0=MSP 1=PSP */

Definition at line 2096 of file core_armv8mml.h.

◆ EXC_RETURN_SPSEL [4/4]

#define EXC_RETURN_SPSEL   (0x00000002UL) /* bit [1] stack pointer used to restore context: 0=MSP 1=PSP */

Definition at line 2171 of file core_cm33.h.

◆ EXC_RETURN_THREAD_MSP [1/8]

#define EXC_RETURN_THREAD_MSP   (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */

Definition at line 604 of file core_cm0.h.

◆ EXC_RETURN_THREAD_MSP [2/8]

#define EXC_RETURN_THREAD_MSP   (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */

Definition at line 631 of file core_cm1.h.

◆ EXC_RETURN_THREAD_MSP [3/8]

#define EXC_RETURN_THREAD_MSP   (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */

Definition at line 722 of file core_cm0plus.h.

◆ EXC_RETURN_THREAD_MSP [4/8]

#define EXC_RETURN_THREAD_MSP   (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */

Definition at line 732 of file core_sc000.h.

◆ EXC_RETURN_THREAD_MSP [5/8]

#define EXC_RETURN_THREAD_MSP   (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */

Definition at line 1447 of file core_sc300.h.

◆ EXC_RETURN_THREAD_MSP [6/8]

#define EXC_RETURN_THREAD_MSP   (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */

Definition at line 1467 of file core_cm3.h.

◆ EXC_RETURN_THREAD_MSP [7/8]

#define EXC_RETURN_THREAD_MSP   (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */

Definition at line 1641 of file core_cm4.h.

◆ EXC_RETURN_THREAD_MSP [8/8]

#define EXC_RETURN_THREAD_MSP   (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after return */

Definition at line 1849 of file core_cm7.h.

◆ EXC_RETURN_THREAD_MSP_FPU [1/2]

#define EXC_RETURN_THREAD_MSP_FPU   (0xFFFFFFE9UL) /* return to Thread mode, uses MSP after return, restore floating-point state */

Definition at line 1644 of file core_cm4.h.

◆ EXC_RETURN_THREAD_MSP_FPU [2/2]

#define EXC_RETURN_THREAD_MSP_FPU   (0xFFFFFFE9UL) /* return to Thread mode, uses MSP after return, restore floating-point state */

Definition at line 1852 of file core_cm7.h.

◆ EXC_RETURN_THREAD_PSP [1/8]

#define EXC_RETURN_THREAD_PSP   (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */

Definition at line 605 of file core_cm0.h.

◆ EXC_RETURN_THREAD_PSP [2/8]

#define EXC_RETURN_THREAD_PSP   (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */

Definition at line 632 of file core_cm1.h.

◆ EXC_RETURN_THREAD_PSP [3/8]

#define EXC_RETURN_THREAD_PSP   (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */

Definition at line 723 of file core_cm0plus.h.

◆ EXC_RETURN_THREAD_PSP [4/8]

#define EXC_RETURN_THREAD_PSP   (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */

Definition at line 733 of file core_sc000.h.

◆ EXC_RETURN_THREAD_PSP [5/8]

#define EXC_RETURN_THREAD_PSP   (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */

Definition at line 1448 of file core_sc300.h.

◆ EXC_RETURN_THREAD_PSP [6/8]

#define EXC_RETURN_THREAD_PSP   (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */

Definition at line 1468 of file core_cm3.h.

◆ EXC_RETURN_THREAD_PSP [7/8]

#define EXC_RETURN_THREAD_PSP   (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */

Definition at line 1642 of file core_cm4.h.

◆ EXC_RETURN_THREAD_PSP [8/8]

#define EXC_RETURN_THREAD_PSP   (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after return */

Definition at line 1850 of file core_cm7.h.

◆ EXC_RETURN_THREAD_PSP_FPU [1/2]

#define EXC_RETURN_THREAD_PSP_FPU   (0xFFFFFFEDUL) /* return to Thread mode, uses PSP after return, restore floating-point state */

Definition at line 1645 of file core_cm4.h.

◆ EXC_RETURN_THREAD_PSP_FPU [2/2]

#define EXC_RETURN_THREAD_PSP_FPU   (0xFFFFFFEDUL) /* return to Thread mode, uses PSP after return, restore floating-point state */

Definition at line 1853 of file core_cm7.h.

◆ FNC_RETURN [1/4]

#define FNC_RETURN   (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */

Definition at line 1218 of file core_armv8mbl.h.

◆ FNC_RETURN [2/4]

#define FNC_RETURN   (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */

Definition at line 1293 of file core_cm23.h.

◆ FNC_RETURN [3/4]

#define FNC_RETURN   (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */

Definition at line 2088 of file core_armv8mml.h.

◆ FNC_RETURN [4/4]

#define FNC_RETURN   (0xFEFFFFFFUL) /* bit [0] ignored when processing a branch */

Definition at line 2163 of file core_cm33.h.

◆ NVIC_ClearPendingIRQ [1/12]

#define NVIC_ClearPendingIRQ   __NVIC_ClearPendingIRQ

Definition at line 582 of file core_cm0.h.

◆ NVIC_ClearPendingIRQ [2/12]

#define NVIC_ClearPendingIRQ   __NVIC_ClearPendingIRQ

Definition at line 609 of file core_cm1.h.

◆ NVIC_ClearPendingIRQ [3/12]

#define NVIC_ClearPendingIRQ   __NVIC_ClearPendingIRQ

Definition at line 700 of file core_cm0plus.h.

◆ NVIC_ClearPendingIRQ [4/12]

#define NVIC_ClearPendingIRQ   __NVIC_ClearPendingIRQ

Definition at line 710 of file core_sc000.h.

◆ NVIC_ClearPendingIRQ [5/12]

#define NVIC_ClearPendingIRQ   __NVIC_ClearPendingIRQ

Definition at line 1195 of file core_armv8mbl.h.

◆ NVIC_ClearPendingIRQ [6/12]

#define NVIC_ClearPendingIRQ   __NVIC_ClearPendingIRQ

Definition at line 1270 of file core_cm23.h.

◆ NVIC_ClearPendingIRQ [7/12]

#define NVIC_ClearPendingIRQ   __NVIC_ClearPendingIRQ

Definition at line 1425 of file core_sc300.h.

◆ NVIC_ClearPendingIRQ [8/12]

#define NVIC_ClearPendingIRQ   __NVIC_ClearPendingIRQ

Definition at line 1445 of file core_cm3.h.

◆ NVIC_ClearPendingIRQ [9/12]

#define NVIC_ClearPendingIRQ   __NVIC_ClearPendingIRQ

Definition at line 1619 of file core_cm4.h.

◆ NVIC_ClearPendingIRQ [10/12]

#define NVIC_ClearPendingIRQ   __NVIC_ClearPendingIRQ

Definition at line 1827 of file core_cm7.h.

◆ NVIC_ClearPendingIRQ [11/12]

#define NVIC_ClearPendingIRQ   __NVIC_ClearPendingIRQ

Definition at line 2065 of file core_armv8mml.h.

◆ NVIC_ClearPendingIRQ [12/12]

#define NVIC_ClearPendingIRQ   __NVIC_ClearPendingIRQ

Definition at line 2140 of file core_cm33.h.

◆ NVIC_DisableIRQ [1/12]

#define NVIC_DisableIRQ   __NVIC_DisableIRQ

Definition at line 579 of file core_cm0.h.

◆ NVIC_DisableIRQ [2/12]

#define NVIC_DisableIRQ   __NVIC_DisableIRQ

Definition at line 606 of file core_cm1.h.

◆ NVIC_DisableIRQ [3/12]

#define NVIC_DisableIRQ   __NVIC_DisableIRQ

Definition at line 697 of file core_cm0plus.h.

◆ NVIC_DisableIRQ [4/12]

#define NVIC_DisableIRQ   __NVIC_DisableIRQ

Definition at line 707 of file core_sc000.h.

◆ NVIC_DisableIRQ [5/12]

#define NVIC_DisableIRQ   __NVIC_DisableIRQ

Definition at line 1192 of file core_armv8mbl.h.

◆ NVIC_DisableIRQ [6/12]

#define NVIC_DisableIRQ   __NVIC_DisableIRQ

Definition at line 1267 of file core_cm23.h.

◆ NVIC_DisableIRQ [7/12]

#define NVIC_DisableIRQ   __NVIC_DisableIRQ

Definition at line 1422 of file core_sc300.h.

◆ NVIC_DisableIRQ [8/12]

#define NVIC_DisableIRQ   __NVIC_DisableIRQ

Definition at line 1442 of file core_cm3.h.

◆ NVIC_DisableIRQ [9/12]

#define NVIC_DisableIRQ   __NVIC_DisableIRQ

Definition at line 1616 of file core_cm4.h.

◆ NVIC_DisableIRQ [10/12]

#define NVIC_DisableIRQ   __NVIC_DisableIRQ

Definition at line 1824 of file core_cm7.h.

◆ NVIC_DisableIRQ [11/12]

#define NVIC_DisableIRQ   __NVIC_DisableIRQ

Definition at line 2062 of file core_armv8mml.h.

◆ NVIC_DisableIRQ [12/12]

#define NVIC_DisableIRQ   __NVIC_DisableIRQ

Definition at line 2137 of file core_cm33.h.

◆ NVIC_EnableIRQ [1/12]

#define NVIC_EnableIRQ   __NVIC_EnableIRQ

Definition at line 577 of file core_cm0.h.

◆ NVIC_EnableIRQ [2/12]

#define NVIC_EnableIRQ   __NVIC_EnableIRQ

Definition at line 604 of file core_cm1.h.

◆ NVIC_EnableIRQ [3/12]

#define NVIC_EnableIRQ   __NVIC_EnableIRQ

Definition at line 695 of file core_cm0plus.h.

◆ NVIC_EnableIRQ [4/12]

#define NVIC_EnableIRQ   __NVIC_EnableIRQ

Definition at line 705 of file core_sc000.h.

◆ NVIC_EnableIRQ [5/12]

#define NVIC_EnableIRQ   __NVIC_EnableIRQ

Definition at line 1190 of file core_armv8mbl.h.

◆ NVIC_EnableIRQ [6/12]

#define NVIC_EnableIRQ   __NVIC_EnableIRQ

Definition at line 1265 of file core_cm23.h.

◆ NVIC_EnableIRQ [7/12]

#define NVIC_EnableIRQ   __NVIC_EnableIRQ

Definition at line 1420 of file core_sc300.h.

◆ NVIC_EnableIRQ [8/12]

#define NVIC_EnableIRQ   __NVIC_EnableIRQ

Definition at line 1440 of file core_cm3.h.

◆ NVIC_EnableIRQ [9/12]

#define NVIC_EnableIRQ   __NVIC_EnableIRQ

Definition at line 1614 of file core_cm4.h.

◆ NVIC_EnableIRQ [10/12]

#define NVIC_EnableIRQ   __NVIC_EnableIRQ

Definition at line 1822 of file core_cm7.h.

◆ NVIC_EnableIRQ [11/12]

#define NVIC_EnableIRQ   __NVIC_EnableIRQ

Definition at line 2060 of file core_armv8mml.h.

◆ NVIC_EnableIRQ [12/12]

#define NVIC_EnableIRQ   __NVIC_EnableIRQ

Definition at line 2135 of file core_cm33.h.

◆ NVIC_GetActive [1/8]

#define NVIC_GetActive   __NVIC_GetActive

Definition at line 1196 of file core_armv8mbl.h.

◆ NVIC_GetActive [2/8]

#define NVIC_GetActive   __NVIC_GetActive

Definition at line 1271 of file core_cm23.h.

◆ NVIC_GetActive [3/8]

#define NVIC_GetActive   __NVIC_GetActive

Definition at line 1426 of file core_sc300.h.

◆ NVIC_GetActive [4/8]

#define NVIC_GetActive   __NVIC_GetActive

Definition at line 1446 of file core_cm3.h.

◆ NVIC_GetActive [5/8]

#define NVIC_GetActive   __NVIC_GetActive

Definition at line 1620 of file core_cm4.h.

◆ NVIC_GetActive [6/8]

#define NVIC_GetActive   __NVIC_GetActive

Definition at line 1828 of file core_cm7.h.

◆ NVIC_GetActive [7/8]

#define NVIC_GetActive   __NVIC_GetActive

Definition at line 2066 of file core_armv8mml.h.

◆ NVIC_GetActive [8/8]

#define NVIC_GetActive   __NVIC_GetActive

Definition at line 2141 of file core_cm33.h.

◆ NVIC_GetEnableIRQ [1/12]

#define NVIC_GetEnableIRQ   __NVIC_GetEnableIRQ

Definition at line 578 of file core_cm0.h.

◆ NVIC_GetEnableIRQ [2/12]

#define NVIC_GetEnableIRQ   __NVIC_GetEnableIRQ

Definition at line 605 of file core_cm1.h.

◆ NVIC_GetEnableIRQ [3/12]

#define NVIC_GetEnableIRQ   __NVIC_GetEnableIRQ

Definition at line 696 of file core_cm0plus.h.

◆ NVIC_GetEnableIRQ [4/12]

#define NVIC_GetEnableIRQ   __NVIC_GetEnableIRQ

Definition at line 706 of file core_sc000.h.

◆ NVIC_GetEnableIRQ [5/12]

#define NVIC_GetEnableIRQ   __NVIC_GetEnableIRQ

Definition at line 1191 of file core_armv8mbl.h.

◆ NVIC_GetEnableIRQ [6/12]

#define NVIC_GetEnableIRQ   __NVIC_GetEnableIRQ

Definition at line 1266 of file core_cm23.h.

◆ NVIC_GetEnableIRQ [7/12]

#define NVIC_GetEnableIRQ   __NVIC_GetEnableIRQ

Definition at line 1421 of file core_sc300.h.

◆ NVIC_GetEnableIRQ [8/12]

#define NVIC_GetEnableIRQ   __NVIC_GetEnableIRQ

Definition at line 1441 of file core_cm3.h.

◆ NVIC_GetEnableIRQ [9/12]

#define NVIC_GetEnableIRQ   __NVIC_GetEnableIRQ

Definition at line 1615 of file core_cm4.h.

◆ NVIC_GetEnableIRQ [10/12]

#define NVIC_GetEnableIRQ   __NVIC_GetEnableIRQ

Definition at line 1823 of file core_cm7.h.

◆ NVIC_GetEnableIRQ [11/12]

#define NVIC_GetEnableIRQ   __NVIC_GetEnableIRQ

Definition at line 2061 of file core_armv8mml.h.

◆ NVIC_GetEnableIRQ [12/12]

#define NVIC_GetEnableIRQ   __NVIC_GetEnableIRQ

Definition at line 2136 of file core_cm33.h.

◆ NVIC_GetPendingIRQ [1/12]

#define NVIC_GetPendingIRQ   __NVIC_GetPendingIRQ

Definition at line 580 of file core_cm0.h.

◆ NVIC_GetPendingIRQ [2/12]

#define NVIC_GetPendingIRQ   __NVIC_GetPendingIRQ

Definition at line 607 of file core_cm1.h.

◆ NVIC_GetPendingIRQ [3/12]

#define NVIC_GetPendingIRQ   __NVIC_GetPendingIRQ

Definition at line 698 of file core_cm0plus.h.

◆ NVIC_GetPendingIRQ [4/12]

#define NVIC_GetPendingIRQ   __NVIC_GetPendingIRQ

Definition at line 708 of file core_sc000.h.

◆ NVIC_GetPendingIRQ [5/12]

#define NVIC_GetPendingIRQ   __NVIC_GetPendingIRQ

Definition at line 1193 of file core_armv8mbl.h.

◆ NVIC_GetPendingIRQ [6/12]

#define NVIC_GetPendingIRQ   __NVIC_GetPendingIRQ

Definition at line 1268 of file core_cm23.h.

◆ NVIC_GetPendingIRQ [7/12]

#define NVIC_GetPendingIRQ   __NVIC_GetPendingIRQ

Definition at line 1423 of file core_sc300.h.

◆ NVIC_GetPendingIRQ [8/12]

#define NVIC_GetPendingIRQ   __NVIC_GetPendingIRQ

Definition at line 1443 of file core_cm3.h.

◆ NVIC_GetPendingIRQ [9/12]

#define NVIC_GetPendingIRQ   __NVIC_GetPendingIRQ

Definition at line 1617 of file core_cm4.h.

◆ NVIC_GetPendingIRQ [10/12]

#define NVIC_GetPendingIRQ   __NVIC_GetPendingIRQ

Definition at line 1825 of file core_cm7.h.

◆ NVIC_GetPendingIRQ [11/12]

#define NVIC_GetPendingIRQ   __NVIC_GetPendingIRQ

Definition at line 2063 of file core_armv8mml.h.

◆ NVIC_GetPendingIRQ [12/12]

#define NVIC_GetPendingIRQ   __NVIC_GetPendingIRQ

Definition at line 2138 of file core_cm33.h.

◆ NVIC_GetPriority [1/12]

#define NVIC_GetPriority   __NVIC_GetPriority

Definition at line 585 of file core_cm0.h.

◆ NVIC_GetPriority [2/12]

#define NVIC_GetPriority   __NVIC_GetPriority

Definition at line 612 of file core_cm1.h.

◆ NVIC_GetPriority [3/12]

#define NVIC_GetPriority   __NVIC_GetPriority

Definition at line 703 of file core_cm0plus.h.

◆ NVIC_GetPriority [4/12]

#define NVIC_GetPriority   __NVIC_GetPriority

Definition at line 713 of file core_sc000.h.

◆ NVIC_GetPriority [5/12]

#define NVIC_GetPriority   __NVIC_GetPriority

Definition at line 1198 of file core_armv8mbl.h.

◆ NVIC_GetPriority [6/12]

#define NVIC_GetPriority   __NVIC_GetPriority

Definition at line 1273 of file core_cm23.h.

◆ NVIC_GetPriority [7/12]

#define NVIC_GetPriority   __NVIC_GetPriority

Definition at line 1428 of file core_sc300.h.

◆ NVIC_GetPriority [8/12]

#define NVIC_GetPriority   __NVIC_GetPriority

Definition at line 1448 of file core_cm3.h.

◆ NVIC_GetPriority [9/12]

#define NVIC_GetPriority   __NVIC_GetPriority

Definition at line 1622 of file core_cm4.h.

◆ NVIC_GetPriority [10/12]

#define NVIC_GetPriority   __NVIC_GetPriority

Definition at line 1830 of file core_cm7.h.

◆ NVIC_GetPriority [11/12]

#define NVIC_GetPriority   __NVIC_GetPriority

Definition at line 2068 of file core_armv8mml.h.

◆ NVIC_GetPriority [12/12]

#define NVIC_GetPriority   __NVIC_GetPriority

Definition at line 2143 of file core_cm33.h.

◆ NVIC_GetPriorityGrouping [1/10]

#define NVIC_GetPriorityGrouping   __NVIC_GetPriorityGrouping

Definition at line 576 of file core_cm0.h.

◆ NVIC_GetPriorityGrouping [2/10]

#define NVIC_GetPriorityGrouping   __NVIC_GetPriorityGrouping

Definition at line 603 of file core_cm1.h.

◆ NVIC_GetPriorityGrouping [3/10]

#define NVIC_GetPriorityGrouping   __NVIC_GetPriorityGrouping

Definition at line 694 of file core_cm0plus.h.

◆ NVIC_GetPriorityGrouping [4/10]

#define NVIC_GetPriorityGrouping   __NVIC_GetPriorityGrouping

Definition at line 1189 of file core_armv8mbl.h.

◆ NVIC_GetPriorityGrouping [5/10]

#define NVIC_GetPriorityGrouping   __NVIC_GetPriorityGrouping

Definition at line 1419 of file core_sc300.h.

◆ NVIC_GetPriorityGrouping [6/10]

#define NVIC_GetPriorityGrouping   __NVIC_GetPriorityGrouping

Definition at line 1439 of file core_cm3.h.

◆ NVIC_GetPriorityGrouping [7/10]

#define NVIC_GetPriorityGrouping   __NVIC_GetPriorityGrouping

Definition at line 1613 of file core_cm4.h.

◆ NVIC_GetPriorityGrouping [8/10]

#define NVIC_GetPriorityGrouping   __NVIC_GetPriorityGrouping

Definition at line 1821 of file core_cm7.h.

◆ NVIC_GetPriorityGrouping [9/10]

#define NVIC_GetPriorityGrouping   __NVIC_GetPriorityGrouping

Definition at line 2059 of file core_armv8mml.h.

◆ NVIC_GetPriorityGrouping [10/10]

#define NVIC_GetPriorityGrouping   __NVIC_GetPriorityGrouping

Definition at line 2134 of file core_cm33.h.

◆ NVIC_GetVector [1/12]

#define NVIC_GetVector   __NVIC_GetVector

Definition at line 596 of file core_cm0.h.

◆ NVIC_GetVector [2/12]

#define NVIC_GetVector   __NVIC_GetVector

Definition at line 623 of file core_cm1.h.

◆ NVIC_GetVector [3/12]

#define NVIC_GetVector   __NVIC_GetVector

Definition at line 714 of file core_cm0plus.h.

◆ NVIC_GetVector [4/12]

#define NVIC_GetVector   __NVIC_GetVector

Definition at line 724 of file core_sc000.h.

◆ NVIC_GetVector [5/12]

#define NVIC_GetVector   __NVIC_GetVector

Definition at line 1209 of file core_armv8mbl.h.

◆ NVIC_GetVector [6/12]

#define NVIC_GetVector   __NVIC_GetVector

Definition at line 1284 of file core_cm23.h.

◆ NVIC_GetVector [7/12]

#define NVIC_GetVector   __NVIC_GetVector

Definition at line 1439 of file core_sc300.h.

◆ NVIC_GetVector [8/12]

#define NVIC_GetVector   __NVIC_GetVector

Definition at line 1459 of file core_cm3.h.

◆ NVIC_GetVector [9/12]

#define NVIC_GetVector   __NVIC_GetVector

Definition at line 1633 of file core_cm4.h.

◆ NVIC_GetVector [10/12]

#define NVIC_GetVector   __NVIC_GetVector

Definition at line 1841 of file core_cm7.h.

◆ NVIC_GetVector [11/12]

#define NVIC_GetVector   __NVIC_GetVector

Definition at line 2079 of file core_armv8mml.h.

◆ NVIC_GetVector [12/12]

#define NVIC_GetVector   __NVIC_GetVector

Definition at line 2154 of file core_cm33.h.

◆ NVIC_SetPendingIRQ [1/12]

#define NVIC_SetPendingIRQ   __NVIC_SetPendingIRQ

Definition at line 581 of file core_cm0.h.

◆ NVIC_SetPendingIRQ [2/12]

#define NVIC_SetPendingIRQ   __NVIC_SetPendingIRQ

Definition at line 608 of file core_cm1.h.

◆ NVIC_SetPendingIRQ [3/12]

#define NVIC_SetPendingIRQ   __NVIC_SetPendingIRQ

Definition at line 699 of file core_cm0plus.h.

◆ NVIC_SetPendingIRQ [4/12]

#define NVIC_SetPendingIRQ   __NVIC_SetPendingIRQ

Definition at line 709 of file core_sc000.h.

◆ NVIC_SetPendingIRQ [5/12]

#define NVIC_SetPendingIRQ   __NVIC_SetPendingIRQ

Definition at line 1194 of file core_armv8mbl.h.

◆ NVIC_SetPendingIRQ [6/12]

#define NVIC_SetPendingIRQ   __NVIC_SetPendingIRQ

Definition at line 1269 of file core_cm23.h.

◆ NVIC_SetPendingIRQ [7/12]

#define NVIC_SetPendingIRQ   __NVIC_SetPendingIRQ

Definition at line 1424 of file core_sc300.h.

◆ NVIC_SetPendingIRQ [8/12]

#define NVIC_SetPendingIRQ   __NVIC_SetPendingIRQ

Definition at line 1444 of file core_cm3.h.

◆ NVIC_SetPendingIRQ [9/12]

#define NVIC_SetPendingIRQ   __NVIC_SetPendingIRQ

Definition at line 1618 of file core_cm4.h.

◆ NVIC_SetPendingIRQ [10/12]

#define NVIC_SetPendingIRQ   __NVIC_SetPendingIRQ

Definition at line 1826 of file core_cm7.h.

◆ NVIC_SetPendingIRQ [11/12]

#define NVIC_SetPendingIRQ   __NVIC_SetPendingIRQ

Definition at line 2064 of file core_armv8mml.h.

◆ NVIC_SetPendingIRQ [12/12]

#define NVIC_SetPendingIRQ   __NVIC_SetPendingIRQ

Definition at line 2139 of file core_cm33.h.

◆ NVIC_SetPriority [1/12]

#define NVIC_SetPriority   __NVIC_SetPriority

Definition at line 584 of file core_cm0.h.

◆ NVIC_SetPriority [2/12]

#define NVIC_SetPriority   __NVIC_SetPriority

Definition at line 611 of file core_cm1.h.

◆ NVIC_SetPriority [3/12]

#define NVIC_SetPriority   __NVIC_SetPriority

Definition at line 702 of file core_cm0plus.h.

◆ NVIC_SetPriority [4/12]

#define NVIC_SetPriority   __NVIC_SetPriority

Definition at line 712 of file core_sc000.h.

◆ NVIC_SetPriority [5/12]

#define NVIC_SetPriority   __NVIC_SetPriority

Definition at line 1197 of file core_armv8mbl.h.

◆ NVIC_SetPriority [6/12]

#define NVIC_SetPriority   __NVIC_SetPriority

Definition at line 1272 of file core_cm23.h.

◆ NVIC_SetPriority [7/12]

#define NVIC_SetPriority   __NVIC_SetPriority

Definition at line 1427 of file core_sc300.h.

◆ NVIC_SetPriority [8/12]

#define NVIC_SetPriority   __NVIC_SetPriority

Definition at line 1447 of file core_cm3.h.

◆ NVIC_SetPriority [9/12]

#define NVIC_SetPriority   __NVIC_SetPriority

Definition at line 1621 of file core_cm4.h.

◆ NVIC_SetPriority [10/12]

#define NVIC_SetPriority   __NVIC_SetPriority

Definition at line 1829 of file core_cm7.h.

◆ NVIC_SetPriority [11/12]

#define NVIC_SetPriority   __NVIC_SetPriority

Definition at line 2067 of file core_armv8mml.h.

◆ NVIC_SetPriority [12/12]

#define NVIC_SetPriority   __NVIC_SetPriority

Definition at line 2142 of file core_cm33.h.

◆ NVIC_SetPriorityGrouping [1/10]

#define NVIC_SetPriorityGrouping   __NVIC_SetPriorityGrouping

Definition at line 575 of file core_cm0.h.

◆ NVIC_SetPriorityGrouping [2/10]

#define NVIC_SetPriorityGrouping   __NVIC_SetPriorityGrouping

Definition at line 602 of file core_cm1.h.

◆ NVIC_SetPriorityGrouping [3/10]

#define NVIC_SetPriorityGrouping   __NVIC_SetPriorityGrouping

Definition at line 693 of file core_cm0plus.h.

◆ NVIC_SetPriorityGrouping [4/10]

#define NVIC_SetPriorityGrouping   __NVIC_SetPriorityGrouping

Definition at line 1188 of file core_armv8mbl.h.

◆ NVIC_SetPriorityGrouping [5/10]

#define NVIC_SetPriorityGrouping   __NVIC_SetPriorityGrouping

Definition at line 1418 of file core_sc300.h.

◆ NVIC_SetPriorityGrouping [6/10]

#define NVIC_SetPriorityGrouping   __NVIC_SetPriorityGrouping

Definition at line 1438 of file core_cm3.h.

◆ NVIC_SetPriorityGrouping [7/10]

#define NVIC_SetPriorityGrouping   __NVIC_SetPriorityGrouping

Definition at line 1612 of file core_cm4.h.

◆ NVIC_SetPriorityGrouping [8/10]

#define NVIC_SetPriorityGrouping   __NVIC_SetPriorityGrouping

Definition at line 1820 of file core_cm7.h.

◆ NVIC_SetPriorityGrouping [9/10]

#define NVIC_SetPriorityGrouping   __NVIC_SetPriorityGrouping

Definition at line 2058 of file core_armv8mml.h.

◆ NVIC_SetPriorityGrouping [10/10]

#define NVIC_SetPriorityGrouping   __NVIC_SetPriorityGrouping

Definition at line 2133 of file core_cm33.h.

◆ NVIC_SetVector [1/12]

#define NVIC_SetVector   __NVIC_SetVector

Definition at line 595 of file core_cm0.h.

◆ NVIC_SetVector [2/12]

#define NVIC_SetVector   __NVIC_SetVector

Definition at line 622 of file core_cm1.h.

◆ NVIC_SetVector [3/12]

#define NVIC_SetVector   __NVIC_SetVector

Definition at line 713 of file core_cm0plus.h.

◆ NVIC_SetVector [4/12]

#define NVIC_SetVector   __NVIC_SetVector

Definition at line 723 of file core_sc000.h.

◆ NVIC_SetVector [5/12]

#define NVIC_SetVector   __NVIC_SetVector

Definition at line 1208 of file core_armv8mbl.h.

◆ NVIC_SetVector [6/12]

#define NVIC_SetVector   __NVIC_SetVector

Definition at line 1283 of file core_cm23.h.

◆ NVIC_SetVector [7/12]

#define NVIC_SetVector   __NVIC_SetVector

Definition at line 1438 of file core_sc300.h.

◆ NVIC_SetVector [8/12]

#define NVIC_SetVector   __NVIC_SetVector

Definition at line 1458 of file core_cm3.h.

◆ NVIC_SetVector [9/12]

#define NVIC_SetVector   __NVIC_SetVector

Definition at line 1632 of file core_cm4.h.

◆ NVIC_SetVector [10/12]

#define NVIC_SetVector   __NVIC_SetVector

Definition at line 1840 of file core_cm7.h.

◆ NVIC_SetVector [11/12]

#define NVIC_SetVector   __NVIC_SetVector

Definition at line 2078 of file core_armv8mml.h.

◆ NVIC_SetVector [12/12]

#define NVIC_SetVector   __NVIC_SetVector

Definition at line 2153 of file core_cm33.h.

◆ NVIC_SystemReset [1/12]

#define NVIC_SystemReset   __NVIC_SystemReset

Definition at line 586 of file core_cm0.h.

◆ NVIC_SystemReset [2/12]

#define NVIC_SystemReset   __NVIC_SystemReset

Definition at line 613 of file core_cm1.h.

◆ NVIC_SystemReset [3/12]

#define NVIC_SystemReset   __NVIC_SystemReset

Definition at line 704 of file core_cm0plus.h.

◆ NVIC_SystemReset [4/12]

#define NVIC_SystemReset   __NVIC_SystemReset

Definition at line 714 of file core_sc000.h.

◆ NVIC_SystemReset [5/12]

#define NVIC_SystemReset   __NVIC_SystemReset

Definition at line 1199 of file core_armv8mbl.h.

◆ NVIC_SystemReset [6/12]

#define NVIC_SystemReset   __NVIC_SystemReset

Definition at line 1274 of file core_cm23.h.

◆ NVIC_SystemReset [7/12]

#define NVIC_SystemReset   __NVIC_SystemReset

Definition at line 1429 of file core_sc300.h.

◆ NVIC_SystemReset [8/12]

#define NVIC_SystemReset   __NVIC_SystemReset

Definition at line 1449 of file core_cm3.h.

◆ NVIC_SystemReset [9/12]

#define NVIC_SystemReset   __NVIC_SystemReset

Definition at line 1623 of file core_cm4.h.

◆ NVIC_SystemReset [10/12]

#define NVIC_SystemReset   __NVIC_SystemReset

Definition at line 1831 of file core_cm7.h.

◆ NVIC_SystemReset [11/12]

#define NVIC_SystemReset   __NVIC_SystemReset

Definition at line 2069 of file core_armv8mml.h.

◆ NVIC_SystemReset [12/12]

#define NVIC_SystemReset   __NVIC_SystemReset

Definition at line 2144 of file core_cm33.h.

◆ NVIC_USER_IRQ_OFFSET [1/12]

#define NVIC_USER_IRQ_OFFSET   16

Definition at line 599 of file core_cm0.h.

◆ NVIC_USER_IRQ_OFFSET [2/12]

#define NVIC_USER_IRQ_OFFSET   16

Definition at line 626 of file core_cm1.h.

◆ NVIC_USER_IRQ_OFFSET [3/12]

#define NVIC_USER_IRQ_OFFSET   16

Definition at line 717 of file core_cm0plus.h.

◆ NVIC_USER_IRQ_OFFSET [4/12]

#define NVIC_USER_IRQ_OFFSET   16

Definition at line 727 of file core_sc000.h.

◆ NVIC_USER_IRQ_OFFSET [5/12]

#define NVIC_USER_IRQ_OFFSET   16

Definition at line 1212 of file core_armv8mbl.h.

◆ NVIC_USER_IRQ_OFFSET [6/12]

#define NVIC_USER_IRQ_OFFSET   16

Definition at line 1287 of file core_cm23.h.

◆ NVIC_USER_IRQ_OFFSET [7/12]

#define NVIC_USER_IRQ_OFFSET   16

Definition at line 1442 of file core_sc300.h.

◆ NVIC_USER_IRQ_OFFSET [8/12]

#define NVIC_USER_IRQ_OFFSET   16

Definition at line 1462 of file core_cm3.h.

◆ NVIC_USER_IRQ_OFFSET [9/12]

#define NVIC_USER_IRQ_OFFSET   16

Definition at line 1636 of file core_cm4.h.

◆ NVIC_USER_IRQ_OFFSET [10/12]

#define NVIC_USER_IRQ_OFFSET   16

Definition at line 1844 of file core_cm7.h.

◆ NVIC_USER_IRQ_OFFSET [11/12]

#define NVIC_USER_IRQ_OFFSET   16

Definition at line 2082 of file core_armv8mml.h.

◆ NVIC_USER_IRQ_OFFSET [12/12]

#define NVIC_USER_IRQ_OFFSET   16

Definition at line 2157 of file core_cm33.h.

Function Documentation

◆ __NVIC_ClearPendingIRQ()

__STATIC_INLINE void __NVIC_ClearPendingIRQ ( IRQn_Type  IRQn)

Clear Pending Interrupt.

Clears the pending bit of a device specific interrupt in the NVIC pending register.

Parameters
[in]IRQnDevice specific interrupt number.
Note
IRQn must not be negative.

< System Control Space Base Address

< NVIC Base Address

< NVIC configuration struct

< System Control Space Base Address

< NVIC Base Address

< NVIC configuration struct

< System Control Space Base Address

< NVIC Base Address

< NVIC configuration struct

< System Control Space Base Address

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Definition at line 1341 of file core_armv8mbl.h.

1342 {
1343  if ((int32_t)(IRQn) >= 0)
1344  {
1345  NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
1346  }
1347 }

◆ __NVIC_DisableIRQ()

__STATIC_INLINE void __NVIC_DisableIRQ ( IRQn_Type  IRQn)

Disable Interrupt.

Disables a device specific interrupt in the NVIC interrupt controller.

Parameters
[in]IRQnDevice specific interrupt number.
Note
IRQn must not be negative.

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Definition at line 1288 of file core_armv8mbl.h.

1289 {
1290  if ((int32_t)(IRQn) >= 0)
1291  {
1292  NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
1293  __DSB();
1294  __ISB();
1295  }
1296 }

◆ __NVIC_EnableIRQ()

__STATIC_INLINE void __NVIC_EnableIRQ ( IRQn_Type  IRQn)

Enable Interrupt.

Enables a device specific interrupt in the NVIC interrupt controller.

Parameters
[in]IRQnDevice specific interrupt number.
Note
IRQn must not be negative.

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Definition at line 1252 of file core_armv8mbl.h.

1253 {
1254  if ((int32_t)(IRQn) >= 0)
1255  {
1256  NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
1257  }
1258 }

◆ __NVIC_GetActive()

__STATIC_INLINE uint32_t __NVIC_GetActive ( IRQn_Type  IRQn)

Get Active Interrupt.

Reads the active register in the NVIC and returns the active bit for the device specific interrupt.

Parameters
[in]IRQnDevice specific interrupt number.
Returns
0 Interrupt status is not active.
1 Interrupt status is active.
Note
IRQn must not be negative.

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Definition at line 1358 of file core_armv8mbl.h.

1359 {
1360  if ((int32_t)(IRQn) >= 0)
1361  {
1362  return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
1363  }
1364  else
1365  {
1366  return(0U);
1367  }
1368 }

◆ __NVIC_GetEnableIRQ()

__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ ( IRQn_Type  IRQn)

Get Interrupt Enable status.

Returns a device specific interrupt enable status from the NVIC interrupt controller.

Parameters
[in]IRQnDevice specific interrupt number.
Returns
0 Interrupt is not enabled.
1 Interrupt is enabled.
Note
IRQn must not be negative.

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Definition at line 1269 of file core_armv8mbl.h.

1270 {
1271  if ((int32_t)(IRQn) >= 0)
1272  {
1273  return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
1274  }
1275  else
1276  {
1277  return(0U);
1278  }
1279 }

◆ __NVIC_GetPendingIRQ()

__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ ( IRQn_Type  IRQn)

Get Pending Interrupt.

Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.

Parameters
[in]IRQnDevice specific interrupt number.
Returns
0 Interrupt status is not pending.
1 Interrupt status is pending.
Note
IRQn must not be negative.

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Definition at line 1307 of file core_armv8mbl.h.

1308 {
1309  if ((int32_t)(IRQn) >= 0)
1310  {
1311  return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
1312  }
1313  else
1314  {
1315  return(0U);
1316  }
1317 }

◆ __NVIC_GetPriority()

__STATIC_INLINE uint32_t __NVIC_GetPriority ( IRQn_Type  IRQn)

Get Interrupt Priority.

Reads the priority of a device specific interrupt or a processor exception. The interrupt number can be positive to specify a device specific interrupt, or negative to specify a processor exception.

Parameters
[in]IRQnInterrupt number.
Returns
Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller.

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Definition at line 1471 of file core_armv8mbl.h.

1472 {
1473 
1474  if ((int32_t)(IRQn) >= 0)
1475  {
1476  return((uint32_t)(((NVIC->IPR[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
1477  }
1478  else
1479  {
1480  return((uint32_t)(((SCB->SHPR[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
1481  }
1482 }

◆ __NVIC_GetPriorityGrouping()

__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping ( void  )

Get Priority Grouping.

Reads the priority grouping field from the NVIC Interrupt Controller.

Returns
Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).

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Definition at line 2135 of file core_armv8mml.h.

2136 {
2137  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
2138 }

◆ __NVIC_GetVector()

__STATIC_INLINE uint32_t __NVIC_GetVector ( IRQn_Type  IRQn)

Get Interrupt Vector.

Reads an interrupt vector from interrupt vector table. The interrupt number can be positive to specify a device specific interrupt, or negative to specify a processor exception.

Parameters
[in]IRQnInterrupt number.
Returns
Address of interrupt handler function

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Definition at line 1566 of file core_armv8mbl.h.

1567 {
1568 #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
1569  uint32_t *vectors = (uint32_t *)SCB->VTOR;
1570 #else
1571  uint32_t *vectors = (uint32_t *)0x0U;
1572 #endif
1573  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
1574 }

◆ __NVIC_SetPendingIRQ()

__STATIC_INLINE void __NVIC_SetPendingIRQ ( IRQn_Type  IRQn)

Set Pending Interrupt.

Sets the pending bit of a device specific interrupt in the NVIC pending register.

Parameters
[in]IRQnDevice specific interrupt number.
Note
IRQn must not be negative.

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Definition at line 1326 of file core_armv8mbl.h.

1327 {
1328  if ((int32_t)(IRQn) >= 0)
1329  {
1330  NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
1331  }
1332 }

◆ __NVIC_SetPriority()

__STATIC_INLINE void __NVIC_SetPriority ( IRQn_Type  IRQn,
uint32_t  priority 
)

Set Interrupt Priority.

Sets the priority of a device specific interrupt or a processor exception. The interrupt number can be positive to specify a device specific interrupt, or negative to specify a processor exception.

Parameters
[in]IRQnInterrupt number.
[in]priorityPriority to set.
Note
The priority cannot be set for every processor exception.

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Definition at line 1447 of file core_armv8mbl.h.

1448 {
1449  if ((int32_t)(IRQn) >= 0)
1450  {
1451  NVIC->IPR[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IPR[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
1452  (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
1453  }
1454  else
1455  {
1456  SCB->SHPR[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHPR[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
1457  (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
1458  }
1459 }

◆ __NVIC_SetPriorityGrouping()

__STATIC_INLINE void __NVIC_SetPriorityGrouping ( uint32_t  PriorityGroup)

Set Priority Grouping.

Sets the priority grouping field using the required unlock sequence. The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field. Only values from 0..7 are used. In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.

Parameters
[in]PriorityGroupPriority grouping field.

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Definition at line 2116 of file core_armv8mml.h.

2117 {
2118  uint32_t reg_value;
2119  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
2120 
2121  reg_value = SCB->AIRCR; /* read old register configuration */
2122  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
2123  reg_value = (reg_value |
2124  ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
2125  (PriorityGroupTmp << 8U) ); /* Insert write key and priorty group */
2126  SCB->AIRCR = reg_value;
2127 }

◆ __NVIC_SetVector()

__STATIC_INLINE void __NVIC_SetVector ( IRQn_Type  IRQn,
uint32_t  vector 
)

Set Interrupt Vector.

Sets an interrupt vector in SRAM based interrupt vector table. The interrupt number can be positive to specify a device specific interrupt, or negative to specify a processor exception. VTOR must been relocated to SRAM before. If VTOR is not present address 0 must be mapped to SRAM.

Parameters
[in]IRQnInterrupt number
[in]vectorAddress of interrupt handler function

Sets an interrupt vector in SRAM based interrupt vector table. The interrupt number can be positive to specify a device specific interrupt, or negative to specify a processor exception. VTOR must been relocated to SRAM before.

Parameters
[in]IRQnInterrupt number
[in]vectorAddress of interrupt handler function

Sets an interrupt vector in SRAM based interrupt vector table. The interrupt number can be positive to specify a device specific interrupt, or negative to specify a processor exception. Address 0 must be mapped to SRAM.

Parameters
[in]IRQnInterrupt number
[in]vectorAddress of interrupt handler function

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Definition at line 1547 of file core_armv8mbl.h.

1548 {
1549 #if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
1550  uint32_t *vectors = (uint32_t *)SCB->VTOR;
1551 #else
1552  uint32_t *vectors = (uint32_t *)0x0U;
1553 #endif
1554  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
1555 }

◆ __NVIC_SystemReset()

__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset ( void  )

System Reset.

Initiates a system reset request to reset the MCU.

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< SCB AIRCR: SYSRESETREQ Mask

< System Control Space Base Address

< System Control Block Base Address

< SCB configuration struct

< SCB AIRCR: VECTKEY Position

< SCB AIRCR: SYSRESETREQ Position

< SCB AIRCR: SYSRESETREQ Mask

< System Control Space Base Address

< System Control Block Base Address

< SCB configuration struct

< SCB AIRCR: VECTKEY Position

< SCB AIRCR: SYSRESETREQ Position

< SCB AIRCR: SYSRESETREQ Mask

< System Control Space Base Address

< System Control Block Base Address

< SCB configuration struct

< SCB AIRCR: VECTKEY Position

< SCB AIRCR: SYSRESETREQ Position

< SCB AIRCR: SYSRESETREQ Mask

< System Control Space Base Address

< System Control Block Base Address

< SCB configuration struct

< SCB AIRCR: VECTKEY Position

< System Control Space Base Address

< System Control Block Base Address

< SCB configuration struct

< SCB AIRCR: PRIGROUP Position

< SCB AIRCR: PRIGROUP Mask

< SCB AIRCR: SYSRESETREQ Position

< SCB AIRCR: SYSRESETREQ Mask

< System Control Space Base Address

< System Control Block Base Address

< SCB configuration struct

< SCB AIRCR: VECTKEY Position

< System Control Space Base Address

< System Control Block Base Address

< SCB configuration struct

< SCB AIRCR: PRIGROUP Position

< SCB AIRCR: PRIGROUP Mask

< SCB AIRCR: SYSRESETREQ Position

< SCB AIRCR: SYSRESETREQ Mask

< System Control Space Base Address

< System Control Block Base Address

< SCB configuration struct

< SCB AIRCR: VECTKEY Position

< System Control Space Base Address

< System Control Block Base Address

< SCB configuration struct

< SCB AIRCR: PRIGROUP Position

< SCB AIRCR: PRIGROUP Mask

< SCB AIRCR: SYSRESETREQ Position

< SCB AIRCR: SYSRESETREQ Mask

< System Control Space Base Address

< System Control Block Base Address

< SCB configuration struct

< SCB AIRCR: VECTKEY Position

< System Control Space Base Address

< System Control Block Base Address

< SCB configuration struct

< SCB AIRCR: PRIGROUP Position

< SCB AIRCR: PRIGROUP Mask

< SCB AIRCR: SYSRESETREQ Position

< SCB AIRCR: SYSRESETREQ Mask

< System Control Space Base Address

< System Control Block Base Address

< SCB configuration struct

< SCB AIRCR: VECTKEY Position

< SCB AIRCR: SYSRESETREQ Position

< SCB AIRCR: SYSRESETREQ Mask

< System Control Space Base Address

< System Control Block Base Address

< SCB configuration struct

< SCB AIRCR: VECTKEY Position

< System Control Space Base Address

< System Control Block Base Address

< SCB configuration struct

< SCB AIRCR: PRIGROUP Position

< SCB AIRCR: PRIGROUP Mask

< SCB AIRCR: SYSRESETREQ Position

< SCB AIRCR: SYSRESETREQ Mask

Definition at line 1581 of file core_armv8mbl.h.

1582 {
1583  __DSB(); /* Ensure all outstanding memory accesses included
1584  buffered write are completed before reset */
1585  SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
1586  SCB_AIRCR_SYSRESETREQ_Msk);
1587  __DSB(); /* Ensure completion of memory access */
1588 
1589  for(;;) /* wait until reset */
1590  {
1591  __NOP();
1592  }
1593 }

◆ ITM_CheckChar()

__STATIC_INLINE int32_t ITM_CheckChar ( void  )

ITM Check Character.

Checks whether a character is pending for reading in the variable ITM_RxBuffer.

Returns
0 No character available.
1 Character available.

< Value identifying ITM_RxBuffer is ready for next character.

< Value identifying ITM_RxBuffer is ready for next character.

< Value identifying ITM_RxBuffer is ready for next character.

< Value identifying ITM_RxBuffer is ready for next character.

< Value identifying ITM_RxBuffer is ready for next character.

< Value identifying ITM_RxBuffer is ready for next character.

Definition at line 2903 of file core_armv8mml.h.

2904 {
2905 
2906  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
2907  {
2908  return (0); /* no character available */
2909  }
2910  else
2911  {
2912  return (1); /* character available */
2913  }
2914 }

◆ ITM_ReceiveChar()

__STATIC_INLINE int32_t ITM_ReceiveChar ( void  )

ITM Receive Character.

Inputs a character via the external variable ITM_RxBuffer.

Returns
Received character.
-1 No character pending.

< Value identifying ITM_RxBuffer is ready for next character.

< Value identifying ITM_RxBuffer is ready for next character.

< Value identifying ITM_RxBuffer is ready for next character.

< Value identifying ITM_RxBuffer is ready for next character.

< Value identifying ITM_RxBuffer is ready for next character.

< Value identifying ITM_RxBuffer is ready for next character.

< Value identifying ITM_RxBuffer is ready for next character.

< Value identifying ITM_RxBuffer is ready for next character.

< Value identifying ITM_RxBuffer is ready for next character.

< Value identifying ITM_RxBuffer is ready for next character.

< Value identifying ITM_RxBuffer is ready for next character.

< Value identifying ITM_RxBuffer is ready for next character.

Definition at line 2883 of file core_armv8mml.h.

2884 {
2885  int32_t ch = -1; /* no character available */
2886 
2887  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
2888  {
2889  ch = ITM_RxBuffer;
2890  ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* ready for next character */
2891  }
2892 
2893  return (ch);
2894 }

◆ ITM_SendChar()

__STATIC_INLINE uint32_t ITM_SendChar ( uint32_t  ch)

ITM Send Character.

Transmits a character via the ITM channel 0, and

  • Just returns when no debugger is connected that has booked the output.
  • Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
    Parameters
    [in]chCharacter to transmit.
    Returns
    Character to transmit.

< ITM Base Address

< ITM configuration struct

< ITM TCR: ITM Enable bit Mask

< ITM Base Address

< ITM configuration struct

< ITM Base Address

< ITM configuration struct

< ITM Base Address

< ITM configuration struct

< ITM Base Address

< ITM configuration struct

< ITM TCR: ITM Enable bit Mask

< ITM Base Address

< ITM configuration struct

< ITM Base Address

< ITM configuration struct

< ITM Base Address

< ITM configuration struct

< ITM Base Address

< ITM configuration struct

< ITM TCR: ITM Enable bit Mask

< ITM Base Address

< ITM configuration struct

< ITM Base Address

< ITM configuration struct

< ITM Base Address

< ITM configuration struct

< ITM Base Address

< ITM configuration struct

< ITM TCR: ITM Enable bit Mask

< ITM Base Address

< ITM configuration struct

< ITM Base Address

< ITM configuration struct

< ITM Base Address

< ITM configuration struct

< ITM Base Address

< ITM configuration struct

< ITM TCR: ITM Enable bit Mask

< ITM Base Address

< ITM configuration struct

< ITM Base Address

< ITM configuration struct

< ITM Base Address

< ITM configuration struct

< ITM Base Address

< ITM configuration struct

< ITM TCR: ITM Enable bit Mask

< ITM Base Address

< ITM configuration struct

< ITM Base Address

< ITM configuration struct

< ITM Base Address

< ITM configuration struct

Definition at line 2862 of file core_armv8mml.h.

2863 {
2864  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) && /* ITM enabled */
2865  ((ITM->TER & 1UL ) != 0UL) ) /* ITM Port #0 enabled */
2866  {
2867  while (ITM->PORT[0U].u32 == 0UL)
2868  {
2869  __NOP();
2870  }
2871  ITM->PORT[0U].u8 = (uint8_t)ch;
2872  }
2873  return (ch);
2874 }

◆ NVIC_DecodePriority()

__STATIC_INLINE void NVIC_DecodePriority ( uint32_t  Priority,
uint32_t  PriorityGroup,
uint32_t *const  pPreemptPriority,
uint32_t *const  pSubPriority 
)

Decode Priority.

Decodes an interrupt priority value with a given priority group to preemptive priority value and subpriority value. In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.

Parameters
[in]PriorityPriority value, which can be retrieved with the function NVIC_GetPriority().
[in]PriorityGroupUsed priority group.
[out]pPreemptPriorityPreemptive priority value (starting from 0).
[out]pSubPrioritySubpriority value (starting from 0).

Definition at line 1523 of file core_armv8mbl.h.

1524 {
1525  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
1526  uint32_t PreemptPriorityBits;
1527  uint32_t SubPriorityBits;
1528 
1529  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
1530  SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
1531 
1532  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
1533  *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1UL);
1534 }

◆ NVIC_EncodePriority()

__STATIC_INLINE uint32_t NVIC_EncodePriority ( uint32_t  PriorityGroup,
uint32_t  PreemptPriority,
uint32_t  SubPriority 
)

Encode Priority.

Encodes the priority for an interrupt with the given priority group, preemptive priority value, and subpriority value. In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.

Parameters
[in]PriorityGroupUsed priority group.
[in]PreemptPriorityPreemptive priority value (starting from 0).
[in]SubPrioritySubpriority value (starting from 0).
Returns
Encoded priority. Value can be used in the function NVIC_SetPriority().

Definition at line 1496 of file core_armv8mbl.h.

1497 {
1498  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
1499  uint32_t PreemptPriorityBits;
1500  uint32_t SubPriorityBits;
1501 
1502  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
1503  SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
1504 
1505  return (
1506  ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
1507  ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
1508  );
1509 }

◆ SCB_GetFPUType()

__STATIC_INLINE uint32_t SCB_GetFPUType ( void  )

get FPU type

returns the FPU type

Returns
  • 0: No FPU
  • 1: Single precision FPU
  • 2: Double + Single precision FPU

< System Control Space Base Address

< Floating Point Unit

< Floating Point Unit

< MVFR0: Single-precision bits Position

< MVFR0: Single-precision bits Mask

< MVFR0: Double-precision bits Position

< MVFR0: Double-precision bits Mask

< MVFR0: Single-precision bits Position

< MVFR0: Single-precision bits Mask

< MVFR0: Double-precision bits Position

< MVFR0: Double-precision bits Mask

< System Control Space Base Address

< Floating Point Unit

< Floating Point Unit

< MVFR0: Single-precision bits Position

< MVFR0: Single-precision bits Mask

< MVFR0: Double-precision bits Position

< MVFR0: Double-precision bits Mask

< MVFR0: Single-precision bits Position

< MVFR0: Single-precision bits Mask

< MVFR0: Double-precision bits Position

< MVFR0: Double-precision bits Mask

< System Control Space Base Address

< Floating Point Unit

< Floating Point Unit

< MVFR0: Single-precision bits Position

< MVFR0: Single-precision bits Mask

< MVFR0: Double-precision bits Position

< MVFR0: Double-precision bits Mask

< System Control Space Base Address

< System Control Block Base Address

< SCB configuration struct

< MVFR0: Single-precision bits Position

< MVFR0: Single-precision bits Mask

< MVFR0: Double-precision bits Position

< MVFR0: Double-precision bits Mask

< MVFR0: Single-precision bits Position

< MVFR0: Single-precision bits Mask

< MVFR0: Double-precision bits Position

< MVFR0: Double-precision bits Mask

Definition at line 1791 of file core_armv8mbl.h.

1792 {
1793  return 0U; /* No FPU */
1794 }
SCB
#define SCB
Definition: core_armv8mbl.h:1122
SCB_AIRCR_SYSRESETREQ_Msk
#define SCB_AIRCR_SYSRESETREQ_Msk
Definition: core_armv8mbl.h:480
_SHP_IDX
#define _SHP_IDX(IRQn)
Definition: core_armv8mbl.h:1240
_BIT_SHIFT
#define _BIT_SHIFT(IRQn)
Definition: core_armv8mbl.h:1239
__NOP
#define __NOP
No Operation.
Definition: cmsis_armcc.h:387
ITM_TCR_ITMENA_Msk
#define ITM_TCR_ITMENA_Msk
Definition: core_armv8mml.h:1164
ITM
#define ITM
Definition: core_armv8mml.h:1986
__ISB
#define __ISB()
Instruction Synchronization Barrier.
Definition: cmsis_armcc.h:418
__NVIC_PRIO_BITS
#define __NVIC_PRIO_BITS
Definition: stm32f103xb.h:52
ITM_RxBuffer
volatile int32_t ITM_RxBuffer
SCB_AIRCR_VECTKEY_Pos
#define SCB_AIRCR_VECTKEY_Pos
Definition: core_armv8mml.h:612
NVIC
#define NVIC
Definition: core_armv8mbl.h:1124
ITM_RXBUFFER_EMPTY
#define ITM_RXBUFFER_EMPTY
Definition: core_armv8mml.h:2851
SCB_AIRCR_PRIGROUP_Pos
#define SCB_AIRCR_PRIGROUP_Pos
Definition: core_armv8mml.h:627
_IP_IDX
#define _IP_IDX(IRQn)
Definition: core_armv8mbl.h:1241
NVIC_USER_IRQ_OFFSET
#define NVIC_USER_IRQ_OFFSET
Definition: core_armv8mbl.h:1212
SCB_AIRCR_PRIGROUP_Msk
#define SCB_AIRCR_PRIGROUP_Msk
Definition: core_armv8mml.h:628
__DSB
#define __DSB()
Data Synchronization Barrier.
Definition: cmsis_armcc.h:429
SCB_AIRCR_VECTKEY_Msk
#define SCB_AIRCR_VECTKEY_Msk
Definition: core_armv8mml.h:613