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Modules | Data Structures
Core Debug Registers (CoreDebug)
Defines and Type Definitions » Status and Control Registers » Nested Vectored Interrupt Controller (NVIC) » System Control Block (SCB)Defines and Type Definitions » Status and Control Registers » Nested Vectored Interrupt Controller (NVIC) » System Control Block (SCB) » | System Controls not in SCB (SCnSCB) » System Tick Timer (SysTick)Defines and Type Definitions » Status and Control Registers » Nested Vectored Interrupt Controller (NVIC) » System Control Block (SCB)Defines and Type Definitions » Status and Control Registers » Nested Vectored Interrupt Controller (NVIC) » System Control Block (SCB) » | System Controls not in SCB (SCnSCB) » System Tick Timer (SysTick) » | Instrumentation Trace Macrocell (ITM) » Data Watchpoint and Trace (DWT) » Trace Port Interface (TPI)Defines and Type Definitions » Status and Control Registers » Nested Vectored Interrupt Controller (NVIC) » System Control Block (SCB)Defines and Type Definitions » Status and Control Registers » Nested Vectored Interrupt Controller (NVIC) » System Control Block (SCB) » | System Controls not in SCB (SCnSCB) » System Tick Timer (SysTick)Defines and Type Definitions » Status and Control Registers » Nested Vectored Interrupt Controller (NVIC) » System Control Block (SCB)Defines and Type Definitions » Status and Control Registers » Nested Vectored Interrupt Controller (NVIC) » System Control Block (SCB) » | System Controls not in SCB (SCnSCB) » System Tick Timer (SysTick) » | Instrumentation Trace Macrocell (ITM) » Data Watchpoint and Trace (DWT) » Trace Port Interface (TPI) » | Floating Point Unit (FPU)

Type definitions for the Core Debug Registers. More...

Modules

 Core register bit field macros
 Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
 

Data Structures

struct  CoreDebug_Type
 Structure type to access the Core Debug Register (CoreDebug). More...
 
#define CoreDebug_DHCSR_DBGKEY_Pos   16U
 
#define CoreDebug_DHCSR_DBGKEY_Msk   (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)
 
#define CoreDebug_DHCSR_S_RESTART_ST_Pos   26U
 
#define CoreDebug_DHCSR_S_RESTART_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)
 
#define CoreDebug_DHCSR_S_RESET_ST_Pos   25U
 
#define CoreDebug_DHCSR_S_RESET_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)
 
#define CoreDebug_DHCSR_S_RETIRE_ST_Pos   24U
 
#define CoreDebug_DHCSR_S_RETIRE_ST_Msk   (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)
 
#define CoreDebug_DHCSR_S_LOCKUP_Pos   19U
 
#define CoreDebug_DHCSR_S_LOCKUP_Msk   (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)
 
#define CoreDebug_DHCSR_S_SLEEP_Pos   18U
 
#define CoreDebug_DHCSR_S_SLEEP_Msk   (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)
 
#define CoreDebug_DHCSR_S_HALT_Pos   17U
 
#define CoreDebug_DHCSR_S_HALT_Msk   (1UL << CoreDebug_DHCSR_S_HALT_Pos)
 
#define CoreDebug_DHCSR_S_REGRDY_Pos   16U
 
#define CoreDebug_DHCSR_S_REGRDY_Msk   (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)
 
#define CoreDebug_DHCSR_C_MASKINTS_Pos   3U
 
#define CoreDebug_DHCSR_C_MASKINTS_Msk   (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)
 
#define CoreDebug_DHCSR_C_STEP_Pos   2U
 
#define CoreDebug_DHCSR_C_STEP_Msk   (1UL << CoreDebug_DHCSR_C_STEP_Pos)
 
#define CoreDebug_DHCSR_C_HALT_Pos   1U
 
#define CoreDebug_DHCSR_C_HALT_Msk   (1UL << CoreDebug_DHCSR_C_HALT_Pos)
 
#define CoreDebug_DHCSR_C_DEBUGEN_Pos   0U
 
#define CoreDebug_DHCSR_C_DEBUGEN_Msk   (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)
 
#define CoreDebug_DCRSR_REGWnR_Pos   16U
 
#define CoreDebug_DCRSR_REGWnR_Msk   (1UL << CoreDebug_DCRSR_REGWnR_Pos)
 
#define CoreDebug_DCRSR_REGSEL_Pos   0U
 
#define CoreDebug_DCRSR_REGSEL_Msk   (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)
 
#define CoreDebug_DEMCR_DWTENA_Pos   24U
 
#define CoreDebug_DEMCR_DWTENA_Msk   (1UL << CoreDebug_DEMCR_DWTENA_Pos)
 
#define CoreDebug_DEMCR_VC_HARDERR_Pos   10U
 
#define CoreDebug_DEMCR_VC_HARDERR_Msk   (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)
 
#define CoreDebug_DEMCR_VC_CORERESET_Pos   0U
 
#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)
 
#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos   3U
 
#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk   (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)
 
#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos   2U
 
#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk   (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)
 
#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos   1U
 
#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk   (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)
 
#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos   0U
 
#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk   (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/)
 
#define CoreDebug_DSCSR_CDS_Pos   16U
 
#define CoreDebug_DSCSR_CDS_Msk   (1UL << CoreDebug_DSCSR_CDS_Pos)
 
#define CoreDebug_DSCSR_SBRSEL_Pos   1U
 
#define CoreDebug_DSCSR_SBRSEL_Msk   (1UL << CoreDebug_DSCSR_SBRSEL_Pos)
 
#define CoreDebug_DSCSR_SBRSELEN_Pos   0U
 
#define CoreDebug_DSCSR_SBRSELEN_Msk   (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)
 
#define CoreDebug_DHCSR_DBGKEY_Pos   16U
 
#define CoreDebug_DHCSR_DBGKEY_Msk   (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)
 
#define CoreDebug_DHCSR_S_RESTART_ST_Pos   26U
 
#define CoreDebug_DHCSR_S_RESTART_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)
 
#define CoreDebug_DHCSR_S_RESET_ST_Pos   25U
 
#define CoreDebug_DHCSR_S_RESET_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)
 
#define CoreDebug_DHCSR_S_RETIRE_ST_Pos   24U
 
#define CoreDebug_DHCSR_S_RETIRE_ST_Msk   (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)
 
#define CoreDebug_DHCSR_S_LOCKUP_Pos   19U
 
#define CoreDebug_DHCSR_S_LOCKUP_Msk   (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)
 
#define CoreDebug_DHCSR_S_SLEEP_Pos   18U
 
#define CoreDebug_DHCSR_S_SLEEP_Msk   (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)
 
#define CoreDebug_DHCSR_S_HALT_Pos   17U
 
#define CoreDebug_DHCSR_S_HALT_Msk   (1UL << CoreDebug_DHCSR_S_HALT_Pos)
 
#define CoreDebug_DHCSR_S_REGRDY_Pos   16U
 
#define CoreDebug_DHCSR_S_REGRDY_Msk   (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)
 
#define CoreDebug_DHCSR_C_SNAPSTALL_Pos   5U
 
#define CoreDebug_DHCSR_C_SNAPSTALL_Msk   (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)
 
#define CoreDebug_DHCSR_C_MASKINTS_Pos   3U
 
#define CoreDebug_DHCSR_C_MASKINTS_Msk   (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)
 
#define CoreDebug_DHCSR_C_STEP_Pos   2U
 
#define CoreDebug_DHCSR_C_STEP_Msk   (1UL << CoreDebug_DHCSR_C_STEP_Pos)
 
#define CoreDebug_DHCSR_C_HALT_Pos   1U
 
#define CoreDebug_DHCSR_C_HALT_Msk   (1UL << CoreDebug_DHCSR_C_HALT_Pos)
 
#define CoreDebug_DHCSR_C_DEBUGEN_Pos   0U
 
#define CoreDebug_DHCSR_C_DEBUGEN_Msk   (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)
 
#define CoreDebug_DCRSR_REGWnR_Pos   16U
 
#define CoreDebug_DCRSR_REGWnR_Msk   (1UL << CoreDebug_DCRSR_REGWnR_Pos)
 
#define CoreDebug_DCRSR_REGSEL_Pos   0U
 
#define CoreDebug_DCRSR_REGSEL_Msk   (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)
 
#define CoreDebug_DEMCR_TRCENA_Pos   24U
 
#define CoreDebug_DEMCR_TRCENA_Msk   (1UL << CoreDebug_DEMCR_TRCENA_Pos)
 
#define CoreDebug_DEMCR_MON_REQ_Pos   19U
 
#define CoreDebug_DEMCR_MON_REQ_Msk   (1UL << CoreDebug_DEMCR_MON_REQ_Pos)
 
#define CoreDebug_DEMCR_MON_STEP_Pos   18U
 
#define CoreDebug_DEMCR_MON_STEP_Msk   (1UL << CoreDebug_DEMCR_MON_STEP_Pos)
 
#define CoreDebug_DEMCR_MON_PEND_Pos   17U
 
#define CoreDebug_DEMCR_MON_PEND_Msk   (1UL << CoreDebug_DEMCR_MON_PEND_Pos)
 
#define CoreDebug_DEMCR_MON_EN_Pos   16U
 
#define CoreDebug_DEMCR_MON_EN_Msk   (1UL << CoreDebug_DEMCR_MON_EN_Pos)
 
#define CoreDebug_DEMCR_VC_HARDERR_Pos   10U
 
#define CoreDebug_DEMCR_VC_HARDERR_Msk   (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)
 
#define CoreDebug_DEMCR_VC_INTERR_Pos   9U
 
#define CoreDebug_DEMCR_VC_INTERR_Msk   (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)
 
#define CoreDebug_DEMCR_VC_BUSERR_Pos   8U
 
#define CoreDebug_DEMCR_VC_BUSERR_Msk   (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)
 
#define CoreDebug_DEMCR_VC_STATERR_Pos   7U
 
#define CoreDebug_DEMCR_VC_STATERR_Msk   (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)
 
#define CoreDebug_DEMCR_VC_CHKERR_Pos   6U
 
#define CoreDebug_DEMCR_VC_CHKERR_Msk   (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)
 
#define CoreDebug_DEMCR_VC_NOCPERR_Pos   5U
 
#define CoreDebug_DEMCR_VC_NOCPERR_Msk   (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)
 
#define CoreDebug_DEMCR_VC_MMERR_Pos   4U
 
#define CoreDebug_DEMCR_VC_MMERR_Msk   (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)
 
#define CoreDebug_DEMCR_VC_CORERESET_Pos   0U
 
#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)
 
#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos   3U
 
#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk   (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)
 
#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos   2U
 
#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk   (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)
 
#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos   1U
 
#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk   (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)
 
#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos   0U
 
#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk   (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/)
 
#define CoreDebug_DSCSR_CDS_Pos   16U
 
#define CoreDebug_DSCSR_CDS_Msk   (1UL << CoreDebug_DSCSR_CDS_Pos)
 
#define CoreDebug_DSCSR_SBRSEL_Pos   1U
 
#define CoreDebug_DSCSR_SBRSEL_Msk   (1UL << CoreDebug_DSCSR_SBRSEL_Pos)
 
#define CoreDebug_DSCSR_SBRSELEN_Pos   0U
 
#define CoreDebug_DSCSR_SBRSELEN_Msk   (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)
 
#define CoreDebug_DHCSR_DBGKEY_Pos   16U
 
#define CoreDebug_DHCSR_DBGKEY_Msk   (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)
 
#define CoreDebug_DHCSR_S_RESTART_ST_Pos   26U
 
#define CoreDebug_DHCSR_S_RESTART_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)
 
#define CoreDebug_DHCSR_S_RESET_ST_Pos   25U
 
#define CoreDebug_DHCSR_S_RESET_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)
 
#define CoreDebug_DHCSR_S_RETIRE_ST_Pos   24U
 
#define CoreDebug_DHCSR_S_RETIRE_ST_Msk   (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)
 
#define CoreDebug_DHCSR_S_LOCKUP_Pos   19U
 
#define CoreDebug_DHCSR_S_LOCKUP_Msk   (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)
 
#define CoreDebug_DHCSR_S_SLEEP_Pos   18U
 
#define CoreDebug_DHCSR_S_SLEEP_Msk   (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)
 
#define CoreDebug_DHCSR_S_HALT_Pos   17U
 
#define CoreDebug_DHCSR_S_HALT_Msk   (1UL << CoreDebug_DHCSR_S_HALT_Pos)
 
#define CoreDebug_DHCSR_S_REGRDY_Pos   16U
 
#define CoreDebug_DHCSR_S_REGRDY_Msk   (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)
 
#define CoreDebug_DHCSR_C_MASKINTS_Pos   3U
 
#define CoreDebug_DHCSR_C_MASKINTS_Msk   (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)
 
#define CoreDebug_DHCSR_C_STEP_Pos   2U
 
#define CoreDebug_DHCSR_C_STEP_Msk   (1UL << CoreDebug_DHCSR_C_STEP_Pos)
 
#define CoreDebug_DHCSR_C_HALT_Pos   1U
 
#define CoreDebug_DHCSR_C_HALT_Msk   (1UL << CoreDebug_DHCSR_C_HALT_Pos)
 
#define CoreDebug_DHCSR_C_DEBUGEN_Pos   0U
 
#define CoreDebug_DHCSR_C_DEBUGEN_Msk   (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)
 
#define CoreDebug_DCRSR_REGWnR_Pos   16U
 
#define CoreDebug_DCRSR_REGWnR_Msk   (1UL << CoreDebug_DCRSR_REGWnR_Pos)
 
#define CoreDebug_DCRSR_REGSEL_Pos   0U
 
#define CoreDebug_DCRSR_REGSEL_Msk   (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)
 
#define CoreDebug_DEMCR_DWTENA_Pos   24U
 
#define CoreDebug_DEMCR_DWTENA_Msk   (1UL << CoreDebug_DEMCR_DWTENA_Pos)
 
#define CoreDebug_DEMCR_VC_HARDERR_Pos   10U
 
#define CoreDebug_DEMCR_VC_HARDERR_Msk   (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)
 
#define CoreDebug_DEMCR_VC_CORERESET_Pos   0U
 
#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)
 
#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos   3U
 
#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk   (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)
 
#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos   2U
 
#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk   (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)
 
#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos   1U
 
#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk   (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)
 
#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos   0U
 
#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk   (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/)
 
#define CoreDebug_DSCSR_CDS_Pos   16U
 
#define CoreDebug_DSCSR_CDS_Msk   (1UL << CoreDebug_DSCSR_CDS_Pos)
 
#define CoreDebug_DSCSR_SBRSEL_Pos   1U
 
#define CoreDebug_DSCSR_SBRSEL_Msk   (1UL << CoreDebug_DSCSR_SBRSEL_Pos)
 
#define CoreDebug_DSCSR_SBRSELEN_Pos   0U
 
#define CoreDebug_DSCSR_SBRSELEN_Msk   (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)
 
#define CoreDebug_DHCSR_DBGKEY_Pos   16U
 
#define CoreDebug_DHCSR_DBGKEY_Msk   (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)
 
#define CoreDebug_DHCSR_S_RESET_ST_Pos   25U
 
#define CoreDebug_DHCSR_S_RESET_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)
 
#define CoreDebug_DHCSR_S_RETIRE_ST_Pos   24U
 
#define CoreDebug_DHCSR_S_RETIRE_ST_Msk   (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)
 
#define CoreDebug_DHCSR_S_LOCKUP_Pos   19U
 
#define CoreDebug_DHCSR_S_LOCKUP_Msk   (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)
 
#define CoreDebug_DHCSR_S_SLEEP_Pos   18U
 
#define CoreDebug_DHCSR_S_SLEEP_Msk   (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)
 
#define CoreDebug_DHCSR_S_HALT_Pos   17U
 
#define CoreDebug_DHCSR_S_HALT_Msk   (1UL << CoreDebug_DHCSR_S_HALT_Pos)
 
#define CoreDebug_DHCSR_S_REGRDY_Pos   16U
 
#define CoreDebug_DHCSR_S_REGRDY_Msk   (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)
 
#define CoreDebug_DHCSR_C_SNAPSTALL_Pos   5U
 
#define CoreDebug_DHCSR_C_SNAPSTALL_Msk   (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)
 
#define CoreDebug_DHCSR_C_MASKINTS_Pos   3U
 
#define CoreDebug_DHCSR_C_MASKINTS_Msk   (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)
 
#define CoreDebug_DHCSR_C_STEP_Pos   2U
 
#define CoreDebug_DHCSR_C_STEP_Msk   (1UL << CoreDebug_DHCSR_C_STEP_Pos)
 
#define CoreDebug_DHCSR_C_HALT_Pos   1U
 
#define CoreDebug_DHCSR_C_HALT_Msk   (1UL << CoreDebug_DHCSR_C_HALT_Pos)
 
#define CoreDebug_DHCSR_C_DEBUGEN_Pos   0U
 
#define CoreDebug_DHCSR_C_DEBUGEN_Msk   (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)
 
#define CoreDebug_DCRSR_REGWnR_Pos   16U
 
#define CoreDebug_DCRSR_REGWnR_Msk   (1UL << CoreDebug_DCRSR_REGWnR_Pos)
 
#define CoreDebug_DCRSR_REGSEL_Pos   0U
 
#define CoreDebug_DCRSR_REGSEL_Msk   (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)
 
#define CoreDebug_DEMCR_TRCENA_Pos   24U
 
#define CoreDebug_DEMCR_TRCENA_Msk   (1UL << CoreDebug_DEMCR_TRCENA_Pos)
 
#define CoreDebug_DEMCR_MON_REQ_Pos   19U
 
#define CoreDebug_DEMCR_MON_REQ_Msk   (1UL << CoreDebug_DEMCR_MON_REQ_Pos)
 
#define CoreDebug_DEMCR_MON_STEP_Pos   18U
 
#define CoreDebug_DEMCR_MON_STEP_Msk   (1UL << CoreDebug_DEMCR_MON_STEP_Pos)
 
#define CoreDebug_DEMCR_MON_PEND_Pos   17U
 
#define CoreDebug_DEMCR_MON_PEND_Msk   (1UL << CoreDebug_DEMCR_MON_PEND_Pos)
 
#define CoreDebug_DEMCR_MON_EN_Pos   16U
 
#define CoreDebug_DEMCR_MON_EN_Msk   (1UL << CoreDebug_DEMCR_MON_EN_Pos)
 
#define CoreDebug_DEMCR_VC_HARDERR_Pos   10U
 
#define CoreDebug_DEMCR_VC_HARDERR_Msk   (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)
 
#define CoreDebug_DEMCR_VC_INTERR_Pos   9U
 
#define CoreDebug_DEMCR_VC_INTERR_Msk   (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)
 
#define CoreDebug_DEMCR_VC_BUSERR_Pos   8U
 
#define CoreDebug_DEMCR_VC_BUSERR_Msk   (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)
 
#define CoreDebug_DEMCR_VC_STATERR_Pos   7U
 
#define CoreDebug_DEMCR_VC_STATERR_Msk   (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)
 
#define CoreDebug_DEMCR_VC_CHKERR_Pos   6U
 
#define CoreDebug_DEMCR_VC_CHKERR_Msk   (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)
 
#define CoreDebug_DEMCR_VC_NOCPERR_Pos   5U
 
#define CoreDebug_DEMCR_VC_NOCPERR_Msk   (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)
 
#define CoreDebug_DEMCR_VC_MMERR_Pos   4U
 
#define CoreDebug_DEMCR_VC_MMERR_Msk   (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)
 
#define CoreDebug_DEMCR_VC_CORERESET_Pos   0U
 
#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)
 
#define CoreDebug_DHCSR_DBGKEY_Pos   16U
 
#define CoreDebug_DHCSR_DBGKEY_Msk   (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)
 
#define CoreDebug_DHCSR_S_RESTART_ST_Pos   26U
 
#define CoreDebug_DHCSR_S_RESTART_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)
 
#define CoreDebug_DHCSR_S_RESET_ST_Pos   25U
 
#define CoreDebug_DHCSR_S_RESET_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)
 
#define CoreDebug_DHCSR_S_RETIRE_ST_Pos   24U
 
#define CoreDebug_DHCSR_S_RETIRE_ST_Msk   (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)
 
#define CoreDebug_DHCSR_S_LOCKUP_Pos   19U
 
#define CoreDebug_DHCSR_S_LOCKUP_Msk   (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)
 
#define CoreDebug_DHCSR_S_SLEEP_Pos   18U
 
#define CoreDebug_DHCSR_S_SLEEP_Msk   (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)
 
#define CoreDebug_DHCSR_S_HALT_Pos   17U
 
#define CoreDebug_DHCSR_S_HALT_Msk   (1UL << CoreDebug_DHCSR_S_HALT_Pos)
 
#define CoreDebug_DHCSR_S_REGRDY_Pos   16U
 
#define CoreDebug_DHCSR_S_REGRDY_Msk   (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)
 
#define CoreDebug_DHCSR_C_SNAPSTALL_Pos   5U
 
#define CoreDebug_DHCSR_C_SNAPSTALL_Msk   (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)
 
#define CoreDebug_DHCSR_C_MASKINTS_Pos   3U
 
#define CoreDebug_DHCSR_C_MASKINTS_Msk   (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)
 
#define CoreDebug_DHCSR_C_STEP_Pos   2U
 
#define CoreDebug_DHCSR_C_STEP_Msk   (1UL << CoreDebug_DHCSR_C_STEP_Pos)
 
#define CoreDebug_DHCSR_C_HALT_Pos   1U
 
#define CoreDebug_DHCSR_C_HALT_Msk   (1UL << CoreDebug_DHCSR_C_HALT_Pos)
 
#define CoreDebug_DHCSR_C_DEBUGEN_Pos   0U
 
#define CoreDebug_DHCSR_C_DEBUGEN_Msk   (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)
 
#define CoreDebug_DCRSR_REGWnR_Pos   16U
 
#define CoreDebug_DCRSR_REGWnR_Msk   (1UL << CoreDebug_DCRSR_REGWnR_Pos)
 
#define CoreDebug_DCRSR_REGSEL_Pos   0U
 
#define CoreDebug_DCRSR_REGSEL_Msk   (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)
 
#define CoreDebug_DEMCR_TRCENA_Pos   24U
 
#define CoreDebug_DEMCR_TRCENA_Msk   (1UL << CoreDebug_DEMCR_TRCENA_Pos)
 
#define CoreDebug_DEMCR_MON_REQ_Pos   19U
 
#define CoreDebug_DEMCR_MON_REQ_Msk   (1UL << CoreDebug_DEMCR_MON_REQ_Pos)
 
#define CoreDebug_DEMCR_MON_STEP_Pos   18U
 
#define CoreDebug_DEMCR_MON_STEP_Msk   (1UL << CoreDebug_DEMCR_MON_STEP_Pos)
 
#define CoreDebug_DEMCR_MON_PEND_Pos   17U
 
#define CoreDebug_DEMCR_MON_PEND_Msk   (1UL << CoreDebug_DEMCR_MON_PEND_Pos)
 
#define CoreDebug_DEMCR_MON_EN_Pos   16U
 
#define CoreDebug_DEMCR_MON_EN_Msk   (1UL << CoreDebug_DEMCR_MON_EN_Pos)
 
#define CoreDebug_DEMCR_VC_HARDERR_Pos   10U
 
#define CoreDebug_DEMCR_VC_HARDERR_Msk   (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)
 
#define CoreDebug_DEMCR_VC_INTERR_Pos   9U
 
#define CoreDebug_DEMCR_VC_INTERR_Msk   (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)
 
#define CoreDebug_DEMCR_VC_BUSERR_Pos   8U
 
#define CoreDebug_DEMCR_VC_BUSERR_Msk   (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)
 
#define CoreDebug_DEMCR_VC_STATERR_Pos   7U
 
#define CoreDebug_DEMCR_VC_STATERR_Msk   (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)
 
#define CoreDebug_DEMCR_VC_CHKERR_Pos   6U
 
#define CoreDebug_DEMCR_VC_CHKERR_Msk   (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)
 
#define CoreDebug_DEMCR_VC_NOCPERR_Pos   5U
 
#define CoreDebug_DEMCR_VC_NOCPERR_Msk   (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)
 
#define CoreDebug_DEMCR_VC_MMERR_Pos   4U
 
#define CoreDebug_DEMCR_VC_MMERR_Msk   (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)
 
#define CoreDebug_DEMCR_VC_CORERESET_Pos   0U
 
#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)
 
#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos   3U
 
#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk   (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)
 
#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos   2U
 
#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk   (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)
 
#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos   1U
 
#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk   (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)
 
#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos   0U
 
#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk   (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/)
 
#define CoreDebug_DSCSR_CDS_Pos   16U
 
#define CoreDebug_DSCSR_CDS_Msk   (1UL << CoreDebug_DSCSR_CDS_Pos)
 
#define CoreDebug_DSCSR_SBRSEL_Pos   1U
 
#define CoreDebug_DSCSR_SBRSEL_Msk   (1UL << CoreDebug_DSCSR_SBRSEL_Pos)
 
#define CoreDebug_DSCSR_SBRSELEN_Pos   0U
 
#define CoreDebug_DSCSR_SBRSELEN_Msk   (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)
 
#define CoreDebug_DHCSR_DBGKEY_Pos   16U
 
#define CoreDebug_DHCSR_DBGKEY_Msk   (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)
 
#define CoreDebug_DHCSR_S_RESET_ST_Pos   25U
 
#define CoreDebug_DHCSR_S_RESET_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)
 
#define CoreDebug_DHCSR_S_RETIRE_ST_Pos   24U
 
#define CoreDebug_DHCSR_S_RETIRE_ST_Msk   (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)
 
#define CoreDebug_DHCSR_S_LOCKUP_Pos   19U
 
#define CoreDebug_DHCSR_S_LOCKUP_Msk   (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)
 
#define CoreDebug_DHCSR_S_SLEEP_Pos   18U
 
#define CoreDebug_DHCSR_S_SLEEP_Msk   (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)
 
#define CoreDebug_DHCSR_S_HALT_Pos   17U
 
#define CoreDebug_DHCSR_S_HALT_Msk   (1UL << CoreDebug_DHCSR_S_HALT_Pos)
 
#define CoreDebug_DHCSR_S_REGRDY_Pos   16U
 
#define CoreDebug_DHCSR_S_REGRDY_Msk   (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)
 
#define CoreDebug_DHCSR_C_SNAPSTALL_Pos   5U
 
#define CoreDebug_DHCSR_C_SNAPSTALL_Msk   (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)
 
#define CoreDebug_DHCSR_C_MASKINTS_Pos   3U
 
#define CoreDebug_DHCSR_C_MASKINTS_Msk   (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)
 
#define CoreDebug_DHCSR_C_STEP_Pos   2U
 
#define CoreDebug_DHCSR_C_STEP_Msk   (1UL << CoreDebug_DHCSR_C_STEP_Pos)
 
#define CoreDebug_DHCSR_C_HALT_Pos   1U
 
#define CoreDebug_DHCSR_C_HALT_Msk   (1UL << CoreDebug_DHCSR_C_HALT_Pos)
 
#define CoreDebug_DHCSR_C_DEBUGEN_Pos   0U
 
#define CoreDebug_DHCSR_C_DEBUGEN_Msk   (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)
 
#define CoreDebug_DCRSR_REGWnR_Pos   16U
 
#define CoreDebug_DCRSR_REGWnR_Msk   (1UL << CoreDebug_DCRSR_REGWnR_Pos)
 
#define CoreDebug_DCRSR_REGSEL_Pos   0U
 
#define CoreDebug_DCRSR_REGSEL_Msk   (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)
 
#define CoreDebug_DEMCR_TRCENA_Pos   24U
 
#define CoreDebug_DEMCR_TRCENA_Msk   (1UL << CoreDebug_DEMCR_TRCENA_Pos)
 
#define CoreDebug_DEMCR_MON_REQ_Pos   19U
 
#define CoreDebug_DEMCR_MON_REQ_Msk   (1UL << CoreDebug_DEMCR_MON_REQ_Pos)
 
#define CoreDebug_DEMCR_MON_STEP_Pos   18U
 
#define CoreDebug_DEMCR_MON_STEP_Msk   (1UL << CoreDebug_DEMCR_MON_STEP_Pos)
 
#define CoreDebug_DEMCR_MON_PEND_Pos   17U
 
#define CoreDebug_DEMCR_MON_PEND_Msk   (1UL << CoreDebug_DEMCR_MON_PEND_Pos)
 
#define CoreDebug_DEMCR_MON_EN_Pos   16U
 
#define CoreDebug_DEMCR_MON_EN_Msk   (1UL << CoreDebug_DEMCR_MON_EN_Pos)
 
#define CoreDebug_DEMCR_VC_HARDERR_Pos   10U
 
#define CoreDebug_DEMCR_VC_HARDERR_Msk   (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)
 
#define CoreDebug_DEMCR_VC_INTERR_Pos   9U
 
#define CoreDebug_DEMCR_VC_INTERR_Msk   (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)
 
#define CoreDebug_DEMCR_VC_BUSERR_Pos   8U
 
#define CoreDebug_DEMCR_VC_BUSERR_Msk   (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)
 
#define CoreDebug_DEMCR_VC_STATERR_Pos   7U
 
#define CoreDebug_DEMCR_VC_STATERR_Msk   (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)
 
#define CoreDebug_DEMCR_VC_CHKERR_Pos   6U
 
#define CoreDebug_DEMCR_VC_CHKERR_Msk   (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)
 
#define CoreDebug_DEMCR_VC_NOCPERR_Pos   5U
 
#define CoreDebug_DEMCR_VC_NOCPERR_Msk   (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)
 
#define CoreDebug_DEMCR_VC_MMERR_Pos   4U
 
#define CoreDebug_DEMCR_VC_MMERR_Msk   (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)
 
#define CoreDebug_DEMCR_VC_CORERESET_Pos   0U
 
#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)
 
#define CoreDebug_DHCSR_DBGKEY_Pos   16U
 
#define CoreDebug_DHCSR_DBGKEY_Msk   (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)
 
#define CoreDebug_DHCSR_S_RESET_ST_Pos   25U
 
#define CoreDebug_DHCSR_S_RESET_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)
 
#define CoreDebug_DHCSR_S_RETIRE_ST_Pos   24U
 
#define CoreDebug_DHCSR_S_RETIRE_ST_Msk   (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)
 
#define CoreDebug_DHCSR_S_LOCKUP_Pos   19U
 
#define CoreDebug_DHCSR_S_LOCKUP_Msk   (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)
 
#define CoreDebug_DHCSR_S_SLEEP_Pos   18U
 
#define CoreDebug_DHCSR_S_SLEEP_Msk   (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)
 
#define CoreDebug_DHCSR_S_HALT_Pos   17U
 
#define CoreDebug_DHCSR_S_HALT_Msk   (1UL << CoreDebug_DHCSR_S_HALT_Pos)
 
#define CoreDebug_DHCSR_S_REGRDY_Pos   16U
 
#define CoreDebug_DHCSR_S_REGRDY_Msk   (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)
 
#define CoreDebug_DHCSR_C_SNAPSTALL_Pos   5U
 
#define CoreDebug_DHCSR_C_SNAPSTALL_Msk   (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)
 
#define CoreDebug_DHCSR_C_MASKINTS_Pos   3U
 
#define CoreDebug_DHCSR_C_MASKINTS_Msk   (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)
 
#define CoreDebug_DHCSR_C_STEP_Pos   2U
 
#define CoreDebug_DHCSR_C_STEP_Msk   (1UL << CoreDebug_DHCSR_C_STEP_Pos)
 
#define CoreDebug_DHCSR_C_HALT_Pos   1U
 
#define CoreDebug_DHCSR_C_HALT_Msk   (1UL << CoreDebug_DHCSR_C_HALT_Pos)
 
#define CoreDebug_DHCSR_C_DEBUGEN_Pos   0U
 
#define CoreDebug_DHCSR_C_DEBUGEN_Msk   (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)
 
#define CoreDebug_DCRSR_REGWnR_Pos   16U
 
#define CoreDebug_DCRSR_REGWnR_Msk   (1UL << CoreDebug_DCRSR_REGWnR_Pos)
 
#define CoreDebug_DCRSR_REGSEL_Pos   0U
 
#define CoreDebug_DCRSR_REGSEL_Msk   (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)
 
#define CoreDebug_DEMCR_TRCENA_Pos   24U
 
#define CoreDebug_DEMCR_TRCENA_Msk   (1UL << CoreDebug_DEMCR_TRCENA_Pos)
 
#define CoreDebug_DEMCR_MON_REQ_Pos   19U
 
#define CoreDebug_DEMCR_MON_REQ_Msk   (1UL << CoreDebug_DEMCR_MON_REQ_Pos)
 
#define CoreDebug_DEMCR_MON_STEP_Pos   18U
 
#define CoreDebug_DEMCR_MON_STEP_Msk   (1UL << CoreDebug_DEMCR_MON_STEP_Pos)
 
#define CoreDebug_DEMCR_MON_PEND_Pos   17U
 
#define CoreDebug_DEMCR_MON_PEND_Msk   (1UL << CoreDebug_DEMCR_MON_PEND_Pos)
 
#define CoreDebug_DEMCR_MON_EN_Pos   16U
 
#define CoreDebug_DEMCR_MON_EN_Msk   (1UL << CoreDebug_DEMCR_MON_EN_Pos)
 
#define CoreDebug_DEMCR_VC_HARDERR_Pos   10U
 
#define CoreDebug_DEMCR_VC_HARDERR_Msk   (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)
 
#define CoreDebug_DEMCR_VC_INTERR_Pos   9U
 
#define CoreDebug_DEMCR_VC_INTERR_Msk   (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)
 
#define CoreDebug_DEMCR_VC_BUSERR_Pos   8U
 
#define CoreDebug_DEMCR_VC_BUSERR_Msk   (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)
 
#define CoreDebug_DEMCR_VC_STATERR_Pos   7U
 
#define CoreDebug_DEMCR_VC_STATERR_Msk   (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)
 
#define CoreDebug_DEMCR_VC_CHKERR_Pos   6U
 
#define CoreDebug_DEMCR_VC_CHKERR_Msk   (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)
 
#define CoreDebug_DEMCR_VC_NOCPERR_Pos   5U
 
#define CoreDebug_DEMCR_VC_NOCPERR_Msk   (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)
 
#define CoreDebug_DEMCR_VC_MMERR_Pos   4U
 
#define CoreDebug_DEMCR_VC_MMERR_Msk   (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)
 
#define CoreDebug_DEMCR_VC_CORERESET_Pos   0U
 
#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)
 
#define CoreDebug_DHCSR_DBGKEY_Pos   16U
 
#define CoreDebug_DHCSR_DBGKEY_Msk   (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)
 
#define CoreDebug_DHCSR_S_RESET_ST_Pos   25U
 
#define CoreDebug_DHCSR_S_RESET_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)
 
#define CoreDebug_DHCSR_S_RETIRE_ST_Pos   24U
 
#define CoreDebug_DHCSR_S_RETIRE_ST_Msk   (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)
 
#define CoreDebug_DHCSR_S_LOCKUP_Pos   19U
 
#define CoreDebug_DHCSR_S_LOCKUP_Msk   (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)
 
#define CoreDebug_DHCSR_S_SLEEP_Pos   18U
 
#define CoreDebug_DHCSR_S_SLEEP_Msk   (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)
 
#define CoreDebug_DHCSR_S_HALT_Pos   17U
 
#define CoreDebug_DHCSR_S_HALT_Msk   (1UL << CoreDebug_DHCSR_S_HALT_Pos)
 
#define CoreDebug_DHCSR_S_REGRDY_Pos   16U
 
#define CoreDebug_DHCSR_S_REGRDY_Msk   (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)
 
#define CoreDebug_DHCSR_C_SNAPSTALL_Pos   5U
 
#define CoreDebug_DHCSR_C_SNAPSTALL_Msk   (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)
 
#define CoreDebug_DHCSR_C_MASKINTS_Pos   3U
 
#define CoreDebug_DHCSR_C_MASKINTS_Msk   (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)
 
#define CoreDebug_DHCSR_C_STEP_Pos   2U
 
#define CoreDebug_DHCSR_C_STEP_Msk   (1UL << CoreDebug_DHCSR_C_STEP_Pos)
 
#define CoreDebug_DHCSR_C_HALT_Pos   1U
 
#define CoreDebug_DHCSR_C_HALT_Msk   (1UL << CoreDebug_DHCSR_C_HALT_Pos)
 
#define CoreDebug_DHCSR_C_DEBUGEN_Pos   0U
 
#define CoreDebug_DHCSR_C_DEBUGEN_Msk   (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)
 
#define CoreDebug_DCRSR_REGWnR_Pos   16U
 
#define CoreDebug_DCRSR_REGWnR_Msk   (1UL << CoreDebug_DCRSR_REGWnR_Pos)
 
#define CoreDebug_DCRSR_REGSEL_Pos   0U
 
#define CoreDebug_DCRSR_REGSEL_Msk   (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)
 
#define CoreDebug_DEMCR_TRCENA_Pos   24U
 
#define CoreDebug_DEMCR_TRCENA_Msk   (1UL << CoreDebug_DEMCR_TRCENA_Pos)
 
#define CoreDebug_DEMCR_MON_REQ_Pos   19U
 
#define CoreDebug_DEMCR_MON_REQ_Msk   (1UL << CoreDebug_DEMCR_MON_REQ_Pos)
 
#define CoreDebug_DEMCR_MON_STEP_Pos   18U
 
#define CoreDebug_DEMCR_MON_STEP_Msk   (1UL << CoreDebug_DEMCR_MON_STEP_Pos)
 
#define CoreDebug_DEMCR_MON_PEND_Pos   17U
 
#define CoreDebug_DEMCR_MON_PEND_Msk   (1UL << CoreDebug_DEMCR_MON_PEND_Pos)
 
#define CoreDebug_DEMCR_MON_EN_Pos   16U
 
#define CoreDebug_DEMCR_MON_EN_Msk   (1UL << CoreDebug_DEMCR_MON_EN_Pos)
 
#define CoreDebug_DEMCR_VC_HARDERR_Pos   10U
 
#define CoreDebug_DEMCR_VC_HARDERR_Msk   (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)
 
#define CoreDebug_DEMCR_VC_INTERR_Pos   9U
 
#define CoreDebug_DEMCR_VC_INTERR_Msk   (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)
 
#define CoreDebug_DEMCR_VC_BUSERR_Pos   8U
 
#define CoreDebug_DEMCR_VC_BUSERR_Msk   (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)
 
#define CoreDebug_DEMCR_VC_STATERR_Pos   7U
 
#define CoreDebug_DEMCR_VC_STATERR_Msk   (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)
 
#define CoreDebug_DEMCR_VC_CHKERR_Pos   6U
 
#define CoreDebug_DEMCR_VC_CHKERR_Msk   (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)
 
#define CoreDebug_DEMCR_VC_NOCPERR_Pos   5U
 
#define CoreDebug_DEMCR_VC_NOCPERR_Msk   (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)
 
#define CoreDebug_DEMCR_VC_MMERR_Pos   4U
 
#define CoreDebug_DEMCR_VC_MMERR_Msk   (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)
 
#define CoreDebug_DEMCR_VC_CORERESET_Pos   0U
 
#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)
 

Detailed Description

Type definitions for the Core Debug Registers.

SC000 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor. Therefore they are not covered by the SC000 header file.

Cortex-M1 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor. Therefore they are not covered by the Cortex-M1 header file.

Cortex-M0+ Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor. Therefore they are not covered by the Cortex-M0+ header file.

Cortex-M0 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor. Therefore they are not covered by the Cortex-M0 header file.

Macro Definition Documentation

◆ CoreDebug_DAUTHCTRL_INTSPIDEN_Msk [1/4]

#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk   (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)

CoreDebug DAUTHCTRL: INTSPIDEN Mask

Definition at line 1061 of file core_armv8mbl.h.

◆ CoreDebug_DAUTHCTRL_INTSPIDEN_Msk [2/4]

#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk   (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)

CoreDebug DAUTHCTRL: INTSPIDEN Mask

Definition at line 1136 of file core_cm23.h.

◆ CoreDebug_DAUTHCTRL_INTSPIDEN_Msk [3/4]

#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk   (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)

CoreDebug DAUTHCTRL: INTSPIDEN Mask

Definition at line 1921 of file core_armv8mml.h.

◆ CoreDebug_DAUTHCTRL_INTSPIDEN_Msk [4/4]

#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk   (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)

CoreDebug DAUTHCTRL: INTSPIDEN Mask

Definition at line 1996 of file core_cm33.h.

◆ CoreDebug_DAUTHCTRL_INTSPIDEN_Pos [1/4]

#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos   1U

CoreDebug DAUTHCTRL: INTSPIDEN Position

Definition at line 1060 of file core_armv8mbl.h.

◆ CoreDebug_DAUTHCTRL_INTSPIDEN_Pos [2/4]

#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos   1U

CoreDebug DAUTHCTRL: INTSPIDEN Position

Definition at line 1135 of file core_cm23.h.

◆ CoreDebug_DAUTHCTRL_INTSPIDEN_Pos [3/4]

#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos   1U

CoreDebug DAUTHCTRL: INTSPIDEN Position

Definition at line 1920 of file core_armv8mml.h.

◆ CoreDebug_DAUTHCTRL_INTSPIDEN_Pos [4/4]

#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos   1U

CoreDebug DAUTHCTRL: INTSPIDEN Position

Definition at line 1995 of file core_cm33.h.

◆ CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk [1/4]

#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk   (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)

CoreDebug DAUTHCTRL: INTSPNIDEN, Mask

Definition at line 1055 of file core_armv8mbl.h.

◆ CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk [2/4]

#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk   (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)

CoreDebug DAUTHCTRL: INTSPNIDEN, Mask

Definition at line 1130 of file core_cm23.h.

◆ CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk [3/4]

#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk   (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)

CoreDebug DAUTHCTRL: INTSPNIDEN, Mask

Definition at line 1915 of file core_armv8mml.h.

◆ CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk [4/4]

#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk   (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)

CoreDebug DAUTHCTRL: INTSPNIDEN, Mask

Definition at line 1990 of file core_cm33.h.

◆ CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos [1/4]

#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos   3U

CoreDebug DAUTHCTRL: INTSPNIDEN, Position

Definition at line 1054 of file core_armv8mbl.h.

◆ CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos [2/4]

#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos   3U

CoreDebug DAUTHCTRL: INTSPNIDEN, Position

Definition at line 1129 of file core_cm23.h.

◆ CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos [3/4]

#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos   3U

CoreDebug DAUTHCTRL: INTSPNIDEN, Position

Definition at line 1914 of file core_armv8mml.h.

◆ CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos [4/4]

#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos   3U

CoreDebug DAUTHCTRL: INTSPNIDEN, Position

Definition at line 1989 of file core_cm33.h.

◆ CoreDebug_DAUTHCTRL_SPIDENSEL_Msk [1/4]

#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk   (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/)

CoreDebug DAUTHCTRL: SPIDENSEL Mask

Definition at line 1064 of file core_armv8mbl.h.

◆ CoreDebug_DAUTHCTRL_SPIDENSEL_Msk [2/4]

#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk   (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/)

CoreDebug DAUTHCTRL: SPIDENSEL Mask

Definition at line 1139 of file core_cm23.h.

◆ CoreDebug_DAUTHCTRL_SPIDENSEL_Msk [3/4]

#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk   (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/)

CoreDebug DAUTHCTRL: SPIDENSEL Mask

Definition at line 1924 of file core_armv8mml.h.

◆ CoreDebug_DAUTHCTRL_SPIDENSEL_Msk [4/4]

#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk   (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/)

CoreDebug DAUTHCTRL: SPIDENSEL Mask

Definition at line 1999 of file core_cm33.h.

◆ CoreDebug_DAUTHCTRL_SPIDENSEL_Pos [1/4]

#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos   0U

CoreDebug DAUTHCTRL: SPIDENSEL Position

Definition at line 1063 of file core_armv8mbl.h.

◆ CoreDebug_DAUTHCTRL_SPIDENSEL_Pos [2/4]

#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos   0U

CoreDebug DAUTHCTRL: SPIDENSEL Position

Definition at line 1138 of file core_cm23.h.

◆ CoreDebug_DAUTHCTRL_SPIDENSEL_Pos [3/4]

#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos   0U

CoreDebug DAUTHCTRL: SPIDENSEL Position

Definition at line 1923 of file core_armv8mml.h.

◆ CoreDebug_DAUTHCTRL_SPIDENSEL_Pos [4/4]

#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos   0U

CoreDebug DAUTHCTRL: SPIDENSEL Position

Definition at line 1998 of file core_cm33.h.

◆ CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk [1/4]

#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk   (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)

CoreDebug DAUTHCTRL: SPNIDENSEL Mask

Definition at line 1058 of file core_armv8mbl.h.

◆ CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk [2/4]

#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk   (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)

CoreDebug DAUTHCTRL: SPNIDENSEL Mask

Definition at line 1133 of file core_cm23.h.

◆ CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk [3/4]

#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk   (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)

CoreDebug DAUTHCTRL: SPNIDENSEL Mask

Definition at line 1918 of file core_armv8mml.h.

◆ CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk [4/4]

#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk   (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)

CoreDebug DAUTHCTRL: SPNIDENSEL Mask

Definition at line 1993 of file core_cm33.h.

◆ CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos [1/4]

#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos   2U

CoreDebug DAUTHCTRL: SPNIDENSEL Position

Definition at line 1057 of file core_armv8mbl.h.

◆ CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos [2/4]

#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos   2U

CoreDebug DAUTHCTRL: SPNIDENSEL Position

Definition at line 1132 of file core_cm23.h.

◆ CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos [3/4]

#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos   2U

CoreDebug DAUTHCTRL: SPNIDENSEL Position

Definition at line 1917 of file core_armv8mml.h.

◆ CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos [4/4]

#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos   2U

CoreDebug DAUTHCTRL: SPNIDENSEL Position

Definition at line 1992 of file core_cm33.h.

◆ CoreDebug_DCRSR_REGSEL_Msk [1/8]

#define CoreDebug_DCRSR_REGSEL_Msk   (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)

CoreDebug DCRSR: REGSEL Mask

Definition at line 1041 of file core_armv8mbl.h.

◆ CoreDebug_DCRSR_REGSEL_Msk [2/8]

#define CoreDebug_DCRSR_REGSEL_Msk   (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)

CoreDebug DCRSR: REGSEL Mask

Definition at line 1116 of file core_cm23.h.

◆ CoreDebug_DCRSR_REGSEL_Msk [3/8]

#define CoreDebug_DCRSR_REGSEL_Msk   (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)

CoreDebug DCRSR: REGSEL Mask

Definition at line 1284 of file core_sc300.h.

◆ CoreDebug_DCRSR_REGSEL_Msk [4/8]

#define CoreDebug_DCRSR_REGSEL_Msk   (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)

CoreDebug DCRSR: REGSEL Mask

Definition at line 1304 of file core_cm3.h.

◆ CoreDebug_DCRSR_REGSEL_Msk [5/8]

#define CoreDebug_DCRSR_REGSEL_Msk   (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)

CoreDebug DCRSR: REGSEL Mask

Definition at line 1475 of file core_cm4.h.

◆ CoreDebug_DCRSR_REGSEL_Msk [6/8]

#define CoreDebug_DCRSR_REGSEL_Msk   (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)

CoreDebug DCRSR: REGSEL Mask

Definition at line 1683 of file core_cm7.h.

◆ CoreDebug_DCRSR_REGSEL_Msk [7/8]

#define CoreDebug_DCRSR_REGSEL_Msk   (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)

CoreDebug DCRSR: REGSEL Mask

Definition at line 1871 of file core_armv8mml.h.

◆ CoreDebug_DCRSR_REGSEL_Msk [8/8]

#define CoreDebug_DCRSR_REGSEL_Msk   (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)

CoreDebug DCRSR: REGSEL Mask

Definition at line 1946 of file core_cm33.h.

◆ CoreDebug_DCRSR_REGSEL_Pos [1/8]

#define CoreDebug_DCRSR_REGSEL_Pos   0U

CoreDebug DCRSR: REGSEL Position

Definition at line 1040 of file core_armv8mbl.h.

◆ CoreDebug_DCRSR_REGSEL_Pos [2/8]

#define CoreDebug_DCRSR_REGSEL_Pos   0U

CoreDebug DCRSR: REGSEL Position

Definition at line 1115 of file core_cm23.h.

◆ CoreDebug_DCRSR_REGSEL_Pos [3/8]

#define CoreDebug_DCRSR_REGSEL_Pos   0U

CoreDebug DCRSR: REGSEL Position

Definition at line 1283 of file core_sc300.h.

◆ CoreDebug_DCRSR_REGSEL_Pos [4/8]

#define CoreDebug_DCRSR_REGSEL_Pos   0U

CoreDebug DCRSR: REGSEL Position

Definition at line 1303 of file core_cm3.h.

◆ CoreDebug_DCRSR_REGSEL_Pos [5/8]

#define CoreDebug_DCRSR_REGSEL_Pos   0U

CoreDebug DCRSR: REGSEL Position

Definition at line 1474 of file core_cm4.h.

◆ CoreDebug_DCRSR_REGSEL_Pos [6/8]

#define CoreDebug_DCRSR_REGSEL_Pos   0U

CoreDebug DCRSR: REGSEL Position

Definition at line 1682 of file core_cm7.h.

◆ CoreDebug_DCRSR_REGSEL_Pos [7/8]

#define CoreDebug_DCRSR_REGSEL_Pos   0U

CoreDebug DCRSR: REGSEL Position

Definition at line 1870 of file core_armv8mml.h.

◆ CoreDebug_DCRSR_REGSEL_Pos [8/8]

#define CoreDebug_DCRSR_REGSEL_Pos   0U

CoreDebug DCRSR: REGSEL Position

Definition at line 1945 of file core_cm33.h.

◆ CoreDebug_DCRSR_REGWnR_Msk [1/8]

#define CoreDebug_DCRSR_REGWnR_Msk   (1UL << CoreDebug_DCRSR_REGWnR_Pos)

CoreDebug DCRSR: REGWnR Mask

Definition at line 1038 of file core_armv8mbl.h.

◆ CoreDebug_DCRSR_REGWnR_Msk [2/8]

#define CoreDebug_DCRSR_REGWnR_Msk   (1UL << CoreDebug_DCRSR_REGWnR_Pos)

CoreDebug DCRSR: REGWnR Mask

Definition at line 1113 of file core_cm23.h.

◆ CoreDebug_DCRSR_REGWnR_Msk [3/8]

#define CoreDebug_DCRSR_REGWnR_Msk   (1UL << CoreDebug_DCRSR_REGWnR_Pos)

CoreDebug DCRSR: REGWnR Mask

Definition at line 1281 of file core_sc300.h.

◆ CoreDebug_DCRSR_REGWnR_Msk [4/8]

#define CoreDebug_DCRSR_REGWnR_Msk   (1UL << CoreDebug_DCRSR_REGWnR_Pos)

CoreDebug DCRSR: REGWnR Mask

Definition at line 1301 of file core_cm3.h.

◆ CoreDebug_DCRSR_REGWnR_Msk [5/8]

#define CoreDebug_DCRSR_REGWnR_Msk   (1UL << CoreDebug_DCRSR_REGWnR_Pos)

CoreDebug DCRSR: REGWnR Mask

Definition at line 1472 of file core_cm4.h.

◆ CoreDebug_DCRSR_REGWnR_Msk [6/8]

#define CoreDebug_DCRSR_REGWnR_Msk   (1UL << CoreDebug_DCRSR_REGWnR_Pos)

CoreDebug DCRSR: REGWnR Mask

Definition at line 1680 of file core_cm7.h.

◆ CoreDebug_DCRSR_REGWnR_Msk [7/8]

#define CoreDebug_DCRSR_REGWnR_Msk   (1UL << CoreDebug_DCRSR_REGWnR_Pos)

CoreDebug DCRSR: REGWnR Mask

Definition at line 1868 of file core_armv8mml.h.

◆ CoreDebug_DCRSR_REGWnR_Msk [8/8]

#define CoreDebug_DCRSR_REGWnR_Msk   (1UL << CoreDebug_DCRSR_REGWnR_Pos)

CoreDebug DCRSR: REGWnR Mask

Definition at line 1943 of file core_cm33.h.

◆ CoreDebug_DCRSR_REGWnR_Pos [1/8]

#define CoreDebug_DCRSR_REGWnR_Pos   16U

CoreDebug DCRSR: REGWnR Position

Definition at line 1037 of file core_armv8mbl.h.

◆ CoreDebug_DCRSR_REGWnR_Pos [2/8]

#define CoreDebug_DCRSR_REGWnR_Pos   16U

CoreDebug DCRSR: REGWnR Position

Definition at line 1112 of file core_cm23.h.

◆ CoreDebug_DCRSR_REGWnR_Pos [3/8]

#define CoreDebug_DCRSR_REGWnR_Pos   16U

CoreDebug DCRSR: REGWnR Position

Definition at line 1280 of file core_sc300.h.

◆ CoreDebug_DCRSR_REGWnR_Pos [4/8]

#define CoreDebug_DCRSR_REGWnR_Pos   16U

CoreDebug DCRSR: REGWnR Position

Definition at line 1300 of file core_cm3.h.

◆ CoreDebug_DCRSR_REGWnR_Pos [5/8]

#define CoreDebug_DCRSR_REGWnR_Pos   16U

CoreDebug DCRSR: REGWnR Position

Definition at line 1471 of file core_cm4.h.

◆ CoreDebug_DCRSR_REGWnR_Pos [6/8]

#define CoreDebug_DCRSR_REGWnR_Pos   16U

CoreDebug DCRSR: REGWnR Position

Definition at line 1679 of file core_cm7.h.

◆ CoreDebug_DCRSR_REGWnR_Pos [7/8]

#define CoreDebug_DCRSR_REGWnR_Pos   16U

CoreDebug DCRSR: REGWnR Position

Definition at line 1867 of file core_armv8mml.h.

◆ CoreDebug_DCRSR_REGWnR_Pos [8/8]

#define CoreDebug_DCRSR_REGWnR_Pos   16U

CoreDebug DCRSR: REGWnR Position

Definition at line 1942 of file core_cm33.h.

◆ CoreDebug_DEMCR_DWTENA_Msk [1/2]

#define CoreDebug_DEMCR_DWTENA_Msk   (1UL << CoreDebug_DEMCR_DWTENA_Pos)

CoreDebug DEMCR: DWTENA Mask

Definition at line 1045 of file core_armv8mbl.h.

◆ CoreDebug_DEMCR_DWTENA_Msk [2/2]

#define CoreDebug_DEMCR_DWTENA_Msk   (1UL << CoreDebug_DEMCR_DWTENA_Pos)

CoreDebug DEMCR: DWTENA Mask

Definition at line 1120 of file core_cm23.h.

◆ CoreDebug_DEMCR_DWTENA_Pos [1/2]

#define CoreDebug_DEMCR_DWTENA_Pos   24U

CoreDebug DEMCR: DWTENA Position

Definition at line 1044 of file core_armv8mbl.h.

◆ CoreDebug_DEMCR_DWTENA_Pos [2/2]

#define CoreDebug_DEMCR_DWTENA_Pos   24U

CoreDebug DEMCR: DWTENA Position

Definition at line 1119 of file core_cm23.h.

◆ CoreDebug_DEMCR_MON_EN_Msk [1/6]

#define CoreDebug_DEMCR_MON_EN_Msk   (1UL << CoreDebug_DEMCR_MON_EN_Pos)

CoreDebug DEMCR: MON_EN Mask

Definition at line 1300 of file core_sc300.h.

◆ CoreDebug_DEMCR_MON_EN_Msk [2/6]

#define CoreDebug_DEMCR_MON_EN_Msk   (1UL << CoreDebug_DEMCR_MON_EN_Pos)

CoreDebug DEMCR: MON_EN Mask

Definition at line 1320 of file core_cm3.h.

◆ CoreDebug_DEMCR_MON_EN_Msk [3/6]

#define CoreDebug_DEMCR_MON_EN_Msk   (1UL << CoreDebug_DEMCR_MON_EN_Pos)

CoreDebug DEMCR: MON_EN Mask

Definition at line 1491 of file core_cm4.h.

◆ CoreDebug_DEMCR_MON_EN_Msk [4/6]

#define CoreDebug_DEMCR_MON_EN_Msk   (1UL << CoreDebug_DEMCR_MON_EN_Pos)

CoreDebug DEMCR: MON_EN Mask

Definition at line 1699 of file core_cm7.h.

◆ CoreDebug_DEMCR_MON_EN_Msk [5/6]

#define CoreDebug_DEMCR_MON_EN_Msk   (1UL << CoreDebug_DEMCR_MON_EN_Pos)

CoreDebug DEMCR: MON_EN Mask

Definition at line 1887 of file core_armv8mml.h.

◆ CoreDebug_DEMCR_MON_EN_Msk [6/6]

#define CoreDebug_DEMCR_MON_EN_Msk   (1UL << CoreDebug_DEMCR_MON_EN_Pos)

CoreDebug DEMCR: MON_EN Mask

Definition at line 1962 of file core_cm33.h.

◆ CoreDebug_DEMCR_MON_EN_Pos [1/6]

#define CoreDebug_DEMCR_MON_EN_Pos   16U

CoreDebug DEMCR: MON_EN Position

Definition at line 1299 of file core_sc300.h.

◆ CoreDebug_DEMCR_MON_EN_Pos [2/6]

#define CoreDebug_DEMCR_MON_EN_Pos   16U

CoreDebug DEMCR: MON_EN Position

Definition at line 1319 of file core_cm3.h.

◆ CoreDebug_DEMCR_MON_EN_Pos [3/6]

#define CoreDebug_DEMCR_MON_EN_Pos   16U

CoreDebug DEMCR: MON_EN Position

Definition at line 1490 of file core_cm4.h.

◆ CoreDebug_DEMCR_MON_EN_Pos [4/6]

#define CoreDebug_DEMCR_MON_EN_Pos   16U

CoreDebug DEMCR: MON_EN Position

Definition at line 1698 of file core_cm7.h.

◆ CoreDebug_DEMCR_MON_EN_Pos [5/6]

#define CoreDebug_DEMCR_MON_EN_Pos   16U

CoreDebug DEMCR: MON_EN Position

Definition at line 1886 of file core_armv8mml.h.

◆ CoreDebug_DEMCR_MON_EN_Pos [6/6]

#define CoreDebug_DEMCR_MON_EN_Pos   16U

CoreDebug DEMCR: MON_EN Position

Definition at line 1961 of file core_cm33.h.

◆ CoreDebug_DEMCR_MON_PEND_Msk [1/6]

#define CoreDebug_DEMCR_MON_PEND_Msk   (1UL << CoreDebug_DEMCR_MON_PEND_Pos)

CoreDebug DEMCR: MON_PEND Mask

Definition at line 1297 of file core_sc300.h.

◆ CoreDebug_DEMCR_MON_PEND_Msk [2/6]

#define CoreDebug_DEMCR_MON_PEND_Msk   (1UL << CoreDebug_DEMCR_MON_PEND_Pos)

CoreDebug DEMCR: MON_PEND Mask

Definition at line 1317 of file core_cm3.h.

◆ CoreDebug_DEMCR_MON_PEND_Msk [3/6]

#define CoreDebug_DEMCR_MON_PEND_Msk   (1UL << CoreDebug_DEMCR_MON_PEND_Pos)

CoreDebug DEMCR: MON_PEND Mask

Definition at line 1488 of file core_cm4.h.

◆ CoreDebug_DEMCR_MON_PEND_Msk [4/6]

#define CoreDebug_DEMCR_MON_PEND_Msk   (1UL << CoreDebug_DEMCR_MON_PEND_Pos)

CoreDebug DEMCR: MON_PEND Mask

Definition at line 1696 of file core_cm7.h.

◆ CoreDebug_DEMCR_MON_PEND_Msk [5/6]

#define CoreDebug_DEMCR_MON_PEND_Msk   (1UL << CoreDebug_DEMCR_MON_PEND_Pos)

CoreDebug DEMCR: MON_PEND Mask

Definition at line 1884 of file core_armv8mml.h.

◆ CoreDebug_DEMCR_MON_PEND_Msk [6/6]

#define CoreDebug_DEMCR_MON_PEND_Msk   (1UL << CoreDebug_DEMCR_MON_PEND_Pos)

CoreDebug DEMCR: MON_PEND Mask

Definition at line 1959 of file core_cm33.h.

◆ CoreDebug_DEMCR_MON_PEND_Pos [1/6]

#define CoreDebug_DEMCR_MON_PEND_Pos   17U

CoreDebug DEMCR: MON_PEND Position

Definition at line 1296 of file core_sc300.h.

◆ CoreDebug_DEMCR_MON_PEND_Pos [2/6]

#define CoreDebug_DEMCR_MON_PEND_Pos   17U

CoreDebug DEMCR: MON_PEND Position

Definition at line 1316 of file core_cm3.h.

◆ CoreDebug_DEMCR_MON_PEND_Pos [3/6]

#define CoreDebug_DEMCR_MON_PEND_Pos   17U

CoreDebug DEMCR: MON_PEND Position

Definition at line 1487 of file core_cm4.h.

◆ CoreDebug_DEMCR_MON_PEND_Pos [4/6]

#define CoreDebug_DEMCR_MON_PEND_Pos   17U

CoreDebug DEMCR: MON_PEND Position

Definition at line 1695 of file core_cm7.h.

◆ CoreDebug_DEMCR_MON_PEND_Pos [5/6]

#define CoreDebug_DEMCR_MON_PEND_Pos   17U

CoreDebug DEMCR: MON_PEND Position

Definition at line 1883 of file core_armv8mml.h.

◆ CoreDebug_DEMCR_MON_PEND_Pos [6/6]

#define CoreDebug_DEMCR_MON_PEND_Pos   17U

CoreDebug DEMCR: MON_PEND Position

Definition at line 1958 of file core_cm33.h.

◆ CoreDebug_DEMCR_MON_REQ_Msk [1/6]

#define CoreDebug_DEMCR_MON_REQ_Msk   (1UL << CoreDebug_DEMCR_MON_REQ_Pos)

CoreDebug DEMCR: MON_REQ Mask

Definition at line 1291 of file core_sc300.h.

◆ CoreDebug_DEMCR_MON_REQ_Msk [2/6]

#define CoreDebug_DEMCR_MON_REQ_Msk   (1UL << CoreDebug_DEMCR_MON_REQ_Pos)

CoreDebug DEMCR: MON_REQ Mask

Definition at line 1311 of file core_cm3.h.

◆ CoreDebug_DEMCR_MON_REQ_Msk [3/6]

#define CoreDebug_DEMCR_MON_REQ_Msk   (1UL << CoreDebug_DEMCR_MON_REQ_Pos)

CoreDebug DEMCR: MON_REQ Mask

Definition at line 1482 of file core_cm4.h.

◆ CoreDebug_DEMCR_MON_REQ_Msk [4/6]

#define CoreDebug_DEMCR_MON_REQ_Msk   (1UL << CoreDebug_DEMCR_MON_REQ_Pos)

CoreDebug DEMCR: MON_REQ Mask

Definition at line 1690 of file core_cm7.h.

◆ CoreDebug_DEMCR_MON_REQ_Msk [5/6]

#define CoreDebug_DEMCR_MON_REQ_Msk   (1UL << CoreDebug_DEMCR_MON_REQ_Pos)

CoreDebug DEMCR: MON_REQ Mask

Definition at line 1878 of file core_armv8mml.h.

◆ CoreDebug_DEMCR_MON_REQ_Msk [6/6]

#define CoreDebug_DEMCR_MON_REQ_Msk   (1UL << CoreDebug_DEMCR_MON_REQ_Pos)

CoreDebug DEMCR: MON_REQ Mask

Definition at line 1953 of file core_cm33.h.

◆ CoreDebug_DEMCR_MON_REQ_Pos [1/6]

#define CoreDebug_DEMCR_MON_REQ_Pos   19U

CoreDebug DEMCR: MON_REQ Position

Definition at line 1290 of file core_sc300.h.

◆ CoreDebug_DEMCR_MON_REQ_Pos [2/6]

#define CoreDebug_DEMCR_MON_REQ_Pos   19U

CoreDebug DEMCR: MON_REQ Position

Definition at line 1310 of file core_cm3.h.

◆ CoreDebug_DEMCR_MON_REQ_Pos [3/6]

#define CoreDebug_DEMCR_MON_REQ_Pos   19U

CoreDebug DEMCR: MON_REQ Position

Definition at line 1481 of file core_cm4.h.

◆ CoreDebug_DEMCR_MON_REQ_Pos [4/6]

#define CoreDebug_DEMCR_MON_REQ_Pos   19U

CoreDebug DEMCR: MON_REQ Position

Definition at line 1689 of file core_cm7.h.

◆ CoreDebug_DEMCR_MON_REQ_Pos [5/6]

#define CoreDebug_DEMCR_MON_REQ_Pos   19U

CoreDebug DEMCR: MON_REQ Position

Definition at line 1877 of file core_armv8mml.h.

◆ CoreDebug_DEMCR_MON_REQ_Pos [6/6]

#define CoreDebug_DEMCR_MON_REQ_Pos   19U

CoreDebug DEMCR: MON_REQ Position

Definition at line 1952 of file core_cm33.h.

◆ CoreDebug_DEMCR_MON_STEP_Msk [1/6]

#define CoreDebug_DEMCR_MON_STEP_Msk   (1UL << CoreDebug_DEMCR_MON_STEP_Pos)

CoreDebug DEMCR: MON_STEP Mask

Definition at line 1294 of file core_sc300.h.

◆ CoreDebug_DEMCR_MON_STEP_Msk [2/6]

#define CoreDebug_DEMCR_MON_STEP_Msk   (1UL << CoreDebug_DEMCR_MON_STEP_Pos)

CoreDebug DEMCR: MON_STEP Mask

Definition at line 1314 of file core_cm3.h.

◆ CoreDebug_DEMCR_MON_STEP_Msk [3/6]

#define CoreDebug_DEMCR_MON_STEP_Msk   (1UL << CoreDebug_DEMCR_MON_STEP_Pos)

CoreDebug DEMCR: MON_STEP Mask

Definition at line 1485 of file core_cm4.h.

◆ CoreDebug_DEMCR_MON_STEP_Msk [4/6]

#define CoreDebug_DEMCR_MON_STEP_Msk   (1UL << CoreDebug_DEMCR_MON_STEP_Pos)

CoreDebug DEMCR: MON_STEP Mask

Definition at line 1693 of file core_cm7.h.

◆ CoreDebug_DEMCR_MON_STEP_Msk [5/6]

#define CoreDebug_DEMCR_MON_STEP_Msk   (1UL << CoreDebug_DEMCR_MON_STEP_Pos)

CoreDebug DEMCR: MON_STEP Mask

Definition at line 1881 of file core_armv8mml.h.

◆ CoreDebug_DEMCR_MON_STEP_Msk [6/6]

#define CoreDebug_DEMCR_MON_STEP_Msk   (1UL << CoreDebug_DEMCR_MON_STEP_Pos)

CoreDebug DEMCR: MON_STEP Mask

Definition at line 1956 of file core_cm33.h.

◆ CoreDebug_DEMCR_MON_STEP_Pos [1/6]

#define CoreDebug_DEMCR_MON_STEP_Pos   18U

CoreDebug DEMCR: MON_STEP Position

Definition at line 1293 of file core_sc300.h.

◆ CoreDebug_DEMCR_MON_STEP_Pos [2/6]

#define CoreDebug_DEMCR_MON_STEP_Pos   18U

CoreDebug DEMCR: MON_STEP Position

Definition at line 1313 of file core_cm3.h.

◆ CoreDebug_DEMCR_MON_STEP_Pos [3/6]

#define CoreDebug_DEMCR_MON_STEP_Pos   18U

CoreDebug DEMCR: MON_STEP Position

Definition at line 1484 of file core_cm4.h.

◆ CoreDebug_DEMCR_MON_STEP_Pos [4/6]

#define CoreDebug_DEMCR_MON_STEP_Pos   18U

CoreDebug DEMCR: MON_STEP Position

Definition at line 1692 of file core_cm7.h.

◆ CoreDebug_DEMCR_MON_STEP_Pos [5/6]

#define CoreDebug_DEMCR_MON_STEP_Pos   18U

CoreDebug DEMCR: MON_STEP Position

Definition at line 1880 of file core_armv8mml.h.

◆ CoreDebug_DEMCR_MON_STEP_Pos [6/6]

#define CoreDebug_DEMCR_MON_STEP_Pos   18U

CoreDebug DEMCR: MON_STEP Position

Definition at line 1955 of file core_cm33.h.

◆ CoreDebug_DEMCR_TRCENA_Msk [1/6]

#define CoreDebug_DEMCR_TRCENA_Msk   (1UL << CoreDebug_DEMCR_TRCENA_Pos)

CoreDebug DEMCR: TRCENA Mask

Definition at line 1288 of file core_sc300.h.

◆ CoreDebug_DEMCR_TRCENA_Msk [2/6]

#define CoreDebug_DEMCR_TRCENA_Msk   (1UL << CoreDebug_DEMCR_TRCENA_Pos)

CoreDebug DEMCR: TRCENA Mask

Definition at line 1308 of file core_cm3.h.

◆ CoreDebug_DEMCR_TRCENA_Msk [3/6]

#define CoreDebug_DEMCR_TRCENA_Msk   (1UL << CoreDebug_DEMCR_TRCENA_Pos)

CoreDebug DEMCR: TRCENA Mask

Definition at line 1479 of file core_cm4.h.

◆ CoreDebug_DEMCR_TRCENA_Msk [4/6]

#define CoreDebug_DEMCR_TRCENA_Msk   (1UL << CoreDebug_DEMCR_TRCENA_Pos)

CoreDebug DEMCR: TRCENA Mask

Definition at line 1687 of file core_cm7.h.

◆ CoreDebug_DEMCR_TRCENA_Msk [5/6]

#define CoreDebug_DEMCR_TRCENA_Msk   (1UL << CoreDebug_DEMCR_TRCENA_Pos)

CoreDebug DEMCR: TRCENA Mask

Definition at line 1875 of file core_armv8mml.h.

◆ CoreDebug_DEMCR_TRCENA_Msk [6/6]

#define CoreDebug_DEMCR_TRCENA_Msk   (1UL << CoreDebug_DEMCR_TRCENA_Pos)

CoreDebug DEMCR: TRCENA Mask

Definition at line 1950 of file core_cm33.h.

◆ CoreDebug_DEMCR_TRCENA_Pos [1/6]

#define CoreDebug_DEMCR_TRCENA_Pos   24U

CoreDebug DEMCR: TRCENA Position

Definition at line 1287 of file core_sc300.h.

◆ CoreDebug_DEMCR_TRCENA_Pos [2/6]

#define CoreDebug_DEMCR_TRCENA_Pos   24U

CoreDebug DEMCR: TRCENA Position

Definition at line 1307 of file core_cm3.h.

◆ CoreDebug_DEMCR_TRCENA_Pos [3/6]

#define CoreDebug_DEMCR_TRCENA_Pos   24U

CoreDebug DEMCR: TRCENA Position

Definition at line 1478 of file core_cm4.h.

◆ CoreDebug_DEMCR_TRCENA_Pos [4/6]

#define CoreDebug_DEMCR_TRCENA_Pos   24U

CoreDebug DEMCR: TRCENA Position

Definition at line 1686 of file core_cm7.h.

◆ CoreDebug_DEMCR_TRCENA_Pos [5/6]

#define CoreDebug_DEMCR_TRCENA_Pos   24U

CoreDebug DEMCR: TRCENA Position

Definition at line 1874 of file core_armv8mml.h.

◆ CoreDebug_DEMCR_TRCENA_Pos [6/6]

#define CoreDebug_DEMCR_TRCENA_Pos   24U

CoreDebug DEMCR: TRCENA Position

Definition at line 1949 of file core_cm33.h.

◆ CoreDebug_DEMCR_VC_BUSERR_Msk [1/6]

#define CoreDebug_DEMCR_VC_BUSERR_Msk   (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)

CoreDebug DEMCR: VC_BUSERR Mask

Definition at line 1309 of file core_sc300.h.

◆ CoreDebug_DEMCR_VC_BUSERR_Msk [2/6]

#define CoreDebug_DEMCR_VC_BUSERR_Msk   (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)

CoreDebug DEMCR: VC_BUSERR Mask

Definition at line 1329 of file core_cm3.h.

◆ CoreDebug_DEMCR_VC_BUSERR_Msk [3/6]

#define CoreDebug_DEMCR_VC_BUSERR_Msk   (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)

CoreDebug DEMCR: VC_BUSERR Mask

Definition at line 1500 of file core_cm4.h.

◆ CoreDebug_DEMCR_VC_BUSERR_Msk [4/6]

#define CoreDebug_DEMCR_VC_BUSERR_Msk   (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)

CoreDebug DEMCR: VC_BUSERR Mask

Definition at line 1708 of file core_cm7.h.

◆ CoreDebug_DEMCR_VC_BUSERR_Msk [5/6]

#define CoreDebug_DEMCR_VC_BUSERR_Msk   (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)

CoreDebug DEMCR: VC_BUSERR Mask

Definition at line 1896 of file core_armv8mml.h.

◆ CoreDebug_DEMCR_VC_BUSERR_Msk [6/6]

#define CoreDebug_DEMCR_VC_BUSERR_Msk   (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)

CoreDebug DEMCR: VC_BUSERR Mask

Definition at line 1971 of file core_cm33.h.

◆ CoreDebug_DEMCR_VC_BUSERR_Pos [1/6]

#define CoreDebug_DEMCR_VC_BUSERR_Pos   8U

CoreDebug DEMCR: VC_BUSERR Position

Definition at line 1308 of file core_sc300.h.

◆ CoreDebug_DEMCR_VC_BUSERR_Pos [2/6]

#define CoreDebug_DEMCR_VC_BUSERR_Pos   8U

CoreDebug DEMCR: VC_BUSERR Position

Definition at line 1328 of file core_cm3.h.

◆ CoreDebug_DEMCR_VC_BUSERR_Pos [3/6]

#define CoreDebug_DEMCR_VC_BUSERR_Pos   8U

CoreDebug DEMCR: VC_BUSERR Position

Definition at line 1499 of file core_cm4.h.

◆ CoreDebug_DEMCR_VC_BUSERR_Pos [4/6]

#define CoreDebug_DEMCR_VC_BUSERR_Pos   8U

CoreDebug DEMCR: VC_BUSERR Position

Definition at line 1707 of file core_cm7.h.

◆ CoreDebug_DEMCR_VC_BUSERR_Pos [5/6]

#define CoreDebug_DEMCR_VC_BUSERR_Pos   8U

CoreDebug DEMCR: VC_BUSERR Position

Definition at line 1895 of file core_armv8mml.h.

◆ CoreDebug_DEMCR_VC_BUSERR_Pos [6/6]

#define CoreDebug_DEMCR_VC_BUSERR_Pos   8U

CoreDebug DEMCR: VC_BUSERR Position

Definition at line 1970 of file core_cm33.h.

◆ CoreDebug_DEMCR_VC_CHKERR_Msk [1/6]

#define CoreDebug_DEMCR_VC_CHKERR_Msk   (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)

CoreDebug DEMCR: VC_CHKERR Mask

Definition at line 1315 of file core_sc300.h.

◆ CoreDebug_DEMCR_VC_CHKERR_Msk [2/6]

#define CoreDebug_DEMCR_VC_CHKERR_Msk   (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)

CoreDebug DEMCR: VC_CHKERR Mask

Definition at line 1335 of file core_cm3.h.

◆ CoreDebug_DEMCR_VC_CHKERR_Msk [3/6]

#define CoreDebug_DEMCR_VC_CHKERR_Msk   (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)

CoreDebug DEMCR: VC_CHKERR Mask

Definition at line 1506 of file core_cm4.h.

◆ CoreDebug_DEMCR_VC_CHKERR_Msk [4/6]

#define CoreDebug_DEMCR_VC_CHKERR_Msk   (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)

CoreDebug DEMCR: VC_CHKERR Mask

Definition at line 1714 of file core_cm7.h.

◆ CoreDebug_DEMCR_VC_CHKERR_Msk [5/6]

#define CoreDebug_DEMCR_VC_CHKERR_Msk   (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)

CoreDebug DEMCR: VC_CHKERR Mask

Definition at line 1902 of file core_armv8mml.h.

◆ CoreDebug_DEMCR_VC_CHKERR_Msk [6/6]

#define CoreDebug_DEMCR_VC_CHKERR_Msk   (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)

CoreDebug DEMCR: VC_CHKERR Mask

Definition at line 1977 of file core_cm33.h.

◆ CoreDebug_DEMCR_VC_CHKERR_Pos [1/6]

#define CoreDebug_DEMCR_VC_CHKERR_Pos   6U

CoreDebug DEMCR: VC_CHKERR Position

Definition at line 1314 of file core_sc300.h.

◆ CoreDebug_DEMCR_VC_CHKERR_Pos [2/6]

#define CoreDebug_DEMCR_VC_CHKERR_Pos   6U

CoreDebug DEMCR: VC_CHKERR Position

Definition at line 1334 of file core_cm3.h.

◆ CoreDebug_DEMCR_VC_CHKERR_Pos [3/6]

#define CoreDebug_DEMCR_VC_CHKERR_Pos   6U

CoreDebug DEMCR: VC_CHKERR Position

Definition at line 1505 of file core_cm4.h.

◆ CoreDebug_DEMCR_VC_CHKERR_Pos [4/6]

#define CoreDebug_DEMCR_VC_CHKERR_Pos   6U

CoreDebug DEMCR: VC_CHKERR Position

Definition at line 1713 of file core_cm7.h.

◆ CoreDebug_DEMCR_VC_CHKERR_Pos [5/6]

#define CoreDebug_DEMCR_VC_CHKERR_Pos   6U

CoreDebug DEMCR: VC_CHKERR Position

Definition at line 1901 of file core_armv8mml.h.

◆ CoreDebug_DEMCR_VC_CHKERR_Pos [6/6]

#define CoreDebug_DEMCR_VC_CHKERR_Pos   6U

CoreDebug DEMCR: VC_CHKERR Position

Definition at line 1976 of file core_cm33.h.

◆ CoreDebug_DEMCR_VC_CORERESET_Msk [1/8]

#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)

CoreDebug DEMCR: VC_CORERESET Mask

Definition at line 1051 of file core_armv8mbl.h.

◆ CoreDebug_DEMCR_VC_CORERESET_Msk [2/8]

#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)

CoreDebug DEMCR: VC_CORERESET Mask

Definition at line 1126 of file core_cm23.h.

◆ CoreDebug_DEMCR_VC_CORERESET_Msk [3/8]

#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)

CoreDebug DEMCR: VC_CORERESET Mask

Definition at line 1324 of file core_sc300.h.

◆ CoreDebug_DEMCR_VC_CORERESET_Msk [4/8]

#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)

CoreDebug DEMCR: VC_CORERESET Mask

Definition at line 1344 of file core_cm3.h.

◆ CoreDebug_DEMCR_VC_CORERESET_Msk [5/8]

#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)

CoreDebug DEMCR: VC_CORERESET Mask

Definition at line 1515 of file core_cm4.h.

◆ CoreDebug_DEMCR_VC_CORERESET_Msk [6/8]

#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)

CoreDebug DEMCR: VC_CORERESET Mask

Definition at line 1723 of file core_cm7.h.

◆ CoreDebug_DEMCR_VC_CORERESET_Msk [7/8]

#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)

CoreDebug DEMCR: VC_CORERESET Mask

Definition at line 1911 of file core_armv8mml.h.

◆ CoreDebug_DEMCR_VC_CORERESET_Msk [8/8]

#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)

CoreDebug DEMCR: VC_CORERESET Mask

Definition at line 1986 of file core_cm33.h.

◆ CoreDebug_DEMCR_VC_CORERESET_Pos [1/8]

#define CoreDebug_DEMCR_VC_CORERESET_Pos   0U

CoreDebug DEMCR: VC_CORERESET Position

Definition at line 1050 of file core_armv8mbl.h.

◆ CoreDebug_DEMCR_VC_CORERESET_Pos [2/8]

#define CoreDebug_DEMCR_VC_CORERESET_Pos   0U

CoreDebug DEMCR: VC_CORERESET Position

Definition at line 1125 of file core_cm23.h.

◆ CoreDebug_DEMCR_VC_CORERESET_Pos [3/8]

#define CoreDebug_DEMCR_VC_CORERESET_Pos   0U

CoreDebug DEMCR: VC_CORERESET Position

Definition at line 1323 of file core_sc300.h.

◆ CoreDebug_DEMCR_VC_CORERESET_Pos [4/8]

#define CoreDebug_DEMCR_VC_CORERESET_Pos   0U

CoreDebug DEMCR: VC_CORERESET Position

Definition at line 1343 of file core_cm3.h.

◆ CoreDebug_DEMCR_VC_CORERESET_Pos [5/8]

#define CoreDebug_DEMCR_VC_CORERESET_Pos   0U

CoreDebug DEMCR: VC_CORERESET Position

Definition at line 1514 of file core_cm4.h.

◆ CoreDebug_DEMCR_VC_CORERESET_Pos [6/8]

#define CoreDebug_DEMCR_VC_CORERESET_Pos   0U

CoreDebug DEMCR: VC_CORERESET Position

Definition at line 1722 of file core_cm7.h.

◆ CoreDebug_DEMCR_VC_CORERESET_Pos [7/8]

#define CoreDebug_DEMCR_VC_CORERESET_Pos   0U

CoreDebug DEMCR: VC_CORERESET Position

Definition at line 1910 of file core_armv8mml.h.

◆ CoreDebug_DEMCR_VC_CORERESET_Pos [8/8]

#define CoreDebug_DEMCR_VC_CORERESET_Pos   0U

CoreDebug DEMCR: VC_CORERESET Position

Definition at line 1985 of file core_cm33.h.

◆ CoreDebug_DEMCR_VC_HARDERR_Msk [1/8]

#define CoreDebug_DEMCR_VC_HARDERR_Msk   (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)

CoreDebug DEMCR: VC_HARDERR Mask

Definition at line 1048 of file core_armv8mbl.h.

◆ CoreDebug_DEMCR_VC_HARDERR_Msk [2/8]

#define CoreDebug_DEMCR_VC_HARDERR_Msk   (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)

CoreDebug DEMCR: VC_HARDERR Mask

Definition at line 1123 of file core_cm23.h.

◆ CoreDebug_DEMCR_VC_HARDERR_Msk [3/8]

#define CoreDebug_DEMCR_VC_HARDERR_Msk   (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)

CoreDebug DEMCR: VC_HARDERR Mask

Definition at line 1303 of file core_sc300.h.

◆ CoreDebug_DEMCR_VC_HARDERR_Msk [4/8]

#define CoreDebug_DEMCR_VC_HARDERR_Msk   (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)

CoreDebug DEMCR: VC_HARDERR Mask

Definition at line 1323 of file core_cm3.h.

◆ CoreDebug_DEMCR_VC_HARDERR_Msk [5/8]

#define CoreDebug_DEMCR_VC_HARDERR_Msk   (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)

CoreDebug DEMCR: VC_HARDERR Mask

Definition at line 1494 of file core_cm4.h.

◆ CoreDebug_DEMCR_VC_HARDERR_Msk [6/8]

#define CoreDebug_DEMCR_VC_HARDERR_Msk   (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)

CoreDebug DEMCR: VC_HARDERR Mask

Definition at line 1702 of file core_cm7.h.

◆ CoreDebug_DEMCR_VC_HARDERR_Msk [7/8]

#define CoreDebug_DEMCR_VC_HARDERR_Msk   (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)

CoreDebug DEMCR: VC_HARDERR Mask

Definition at line 1890 of file core_armv8mml.h.

◆ CoreDebug_DEMCR_VC_HARDERR_Msk [8/8]

#define CoreDebug_DEMCR_VC_HARDERR_Msk   (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)

CoreDebug DEMCR: VC_HARDERR Mask

Definition at line 1965 of file core_cm33.h.

◆ CoreDebug_DEMCR_VC_HARDERR_Pos [1/8]

#define CoreDebug_DEMCR_VC_HARDERR_Pos   10U

CoreDebug DEMCR: VC_HARDERR Position

Definition at line 1047 of file core_armv8mbl.h.

◆ CoreDebug_DEMCR_VC_HARDERR_Pos [2/8]

#define CoreDebug_DEMCR_VC_HARDERR_Pos   10U

CoreDebug DEMCR: VC_HARDERR Position

Definition at line 1122 of file core_cm23.h.

◆ CoreDebug_DEMCR_VC_HARDERR_Pos [3/8]

#define CoreDebug_DEMCR_VC_HARDERR_Pos   10U

CoreDebug DEMCR: VC_HARDERR Position

Definition at line 1302 of file core_sc300.h.

◆ CoreDebug_DEMCR_VC_HARDERR_Pos [4/8]

#define CoreDebug_DEMCR_VC_HARDERR_Pos   10U

CoreDebug DEMCR: VC_HARDERR Position

Definition at line 1322 of file core_cm3.h.

◆ CoreDebug_DEMCR_VC_HARDERR_Pos [5/8]

#define CoreDebug_DEMCR_VC_HARDERR_Pos   10U

CoreDebug DEMCR: VC_HARDERR Position

Definition at line 1493 of file core_cm4.h.

◆ CoreDebug_DEMCR_VC_HARDERR_Pos [6/8]

#define CoreDebug_DEMCR_VC_HARDERR_Pos   10U

CoreDebug DEMCR: VC_HARDERR Position

Definition at line 1701 of file core_cm7.h.

◆ CoreDebug_DEMCR_VC_HARDERR_Pos [7/8]

#define CoreDebug_DEMCR_VC_HARDERR_Pos   10U

CoreDebug DEMCR: VC_HARDERR Position

Definition at line 1889 of file core_armv8mml.h.

◆ CoreDebug_DEMCR_VC_HARDERR_Pos [8/8]

#define CoreDebug_DEMCR_VC_HARDERR_Pos   10U

CoreDebug DEMCR: VC_HARDERR Position

Definition at line 1964 of file core_cm33.h.

◆ CoreDebug_DEMCR_VC_INTERR_Msk [1/6]

#define CoreDebug_DEMCR_VC_INTERR_Msk   (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)

CoreDebug DEMCR: VC_INTERR Mask

Definition at line 1306 of file core_sc300.h.

◆ CoreDebug_DEMCR_VC_INTERR_Msk [2/6]

#define CoreDebug_DEMCR_VC_INTERR_Msk   (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)

CoreDebug DEMCR: VC_INTERR Mask

Definition at line 1326 of file core_cm3.h.

◆ CoreDebug_DEMCR_VC_INTERR_Msk [3/6]

#define CoreDebug_DEMCR_VC_INTERR_Msk   (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)

CoreDebug DEMCR: VC_INTERR Mask

Definition at line 1497 of file core_cm4.h.

◆ CoreDebug_DEMCR_VC_INTERR_Msk [4/6]

#define CoreDebug_DEMCR_VC_INTERR_Msk   (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)

CoreDebug DEMCR: VC_INTERR Mask

Definition at line 1705 of file core_cm7.h.

◆ CoreDebug_DEMCR_VC_INTERR_Msk [5/6]

#define CoreDebug_DEMCR_VC_INTERR_Msk   (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)

CoreDebug DEMCR: VC_INTERR Mask

Definition at line 1893 of file core_armv8mml.h.

◆ CoreDebug_DEMCR_VC_INTERR_Msk [6/6]

#define CoreDebug_DEMCR_VC_INTERR_Msk   (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)

CoreDebug DEMCR: VC_INTERR Mask

Definition at line 1968 of file core_cm33.h.

◆ CoreDebug_DEMCR_VC_INTERR_Pos [1/6]

#define CoreDebug_DEMCR_VC_INTERR_Pos   9U

CoreDebug DEMCR: VC_INTERR Position

Definition at line 1305 of file core_sc300.h.

◆ CoreDebug_DEMCR_VC_INTERR_Pos [2/6]

#define CoreDebug_DEMCR_VC_INTERR_Pos   9U

CoreDebug DEMCR: VC_INTERR Position

Definition at line 1325 of file core_cm3.h.

◆ CoreDebug_DEMCR_VC_INTERR_Pos [3/6]

#define CoreDebug_DEMCR_VC_INTERR_Pos   9U

CoreDebug DEMCR: VC_INTERR Position

Definition at line 1496 of file core_cm4.h.

◆ CoreDebug_DEMCR_VC_INTERR_Pos [4/6]

#define CoreDebug_DEMCR_VC_INTERR_Pos   9U

CoreDebug DEMCR: VC_INTERR Position

Definition at line 1704 of file core_cm7.h.

◆ CoreDebug_DEMCR_VC_INTERR_Pos [5/6]

#define CoreDebug_DEMCR_VC_INTERR_Pos   9U

CoreDebug DEMCR: VC_INTERR Position

Definition at line 1892 of file core_armv8mml.h.

◆ CoreDebug_DEMCR_VC_INTERR_Pos [6/6]

#define CoreDebug_DEMCR_VC_INTERR_Pos   9U

CoreDebug DEMCR: VC_INTERR Position

Definition at line 1967 of file core_cm33.h.

◆ CoreDebug_DEMCR_VC_MMERR_Msk [1/6]

#define CoreDebug_DEMCR_VC_MMERR_Msk   (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)

CoreDebug DEMCR: VC_MMERR Mask

Definition at line 1321 of file core_sc300.h.

◆ CoreDebug_DEMCR_VC_MMERR_Msk [2/6]

#define CoreDebug_DEMCR_VC_MMERR_Msk   (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)

CoreDebug DEMCR: VC_MMERR Mask

Definition at line 1341 of file core_cm3.h.

◆ CoreDebug_DEMCR_VC_MMERR_Msk [3/6]

#define CoreDebug_DEMCR_VC_MMERR_Msk   (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)

CoreDebug DEMCR: VC_MMERR Mask

Definition at line 1512 of file core_cm4.h.

◆ CoreDebug_DEMCR_VC_MMERR_Msk [4/6]

#define CoreDebug_DEMCR_VC_MMERR_Msk   (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)

CoreDebug DEMCR: VC_MMERR Mask

Definition at line 1720 of file core_cm7.h.

◆ CoreDebug_DEMCR_VC_MMERR_Msk [5/6]

#define CoreDebug_DEMCR_VC_MMERR_Msk   (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)

CoreDebug DEMCR: VC_MMERR Mask

Definition at line 1908 of file core_armv8mml.h.

◆ CoreDebug_DEMCR_VC_MMERR_Msk [6/6]

#define CoreDebug_DEMCR_VC_MMERR_Msk   (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)

CoreDebug DEMCR: VC_MMERR Mask

Definition at line 1983 of file core_cm33.h.

◆ CoreDebug_DEMCR_VC_MMERR_Pos [1/6]

#define CoreDebug_DEMCR_VC_MMERR_Pos   4U

CoreDebug DEMCR: VC_MMERR Position

Definition at line 1320 of file core_sc300.h.

◆ CoreDebug_DEMCR_VC_MMERR_Pos [2/6]

#define CoreDebug_DEMCR_VC_MMERR_Pos   4U

CoreDebug DEMCR: VC_MMERR Position

Definition at line 1340 of file core_cm3.h.

◆ CoreDebug_DEMCR_VC_MMERR_Pos [3/6]

#define CoreDebug_DEMCR_VC_MMERR_Pos   4U

CoreDebug DEMCR: VC_MMERR Position

Definition at line 1511 of file core_cm4.h.

◆ CoreDebug_DEMCR_VC_MMERR_Pos [4/6]

#define CoreDebug_DEMCR_VC_MMERR_Pos   4U

CoreDebug DEMCR: VC_MMERR Position

Definition at line 1719 of file core_cm7.h.

◆ CoreDebug_DEMCR_VC_MMERR_Pos [5/6]

#define CoreDebug_DEMCR_VC_MMERR_Pos   4U

CoreDebug DEMCR: VC_MMERR Position

Definition at line 1907 of file core_armv8mml.h.

◆ CoreDebug_DEMCR_VC_MMERR_Pos [6/6]

#define CoreDebug_DEMCR_VC_MMERR_Pos   4U

CoreDebug DEMCR: VC_MMERR Position

Definition at line 1982 of file core_cm33.h.

◆ CoreDebug_DEMCR_VC_NOCPERR_Msk [1/6]

#define CoreDebug_DEMCR_VC_NOCPERR_Msk   (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)

CoreDebug DEMCR: VC_NOCPERR Mask

Definition at line 1318 of file core_sc300.h.

◆ CoreDebug_DEMCR_VC_NOCPERR_Msk [2/6]

#define CoreDebug_DEMCR_VC_NOCPERR_Msk   (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)

CoreDebug DEMCR: VC_NOCPERR Mask

Definition at line 1338 of file core_cm3.h.

◆ CoreDebug_DEMCR_VC_NOCPERR_Msk [3/6]

#define CoreDebug_DEMCR_VC_NOCPERR_Msk   (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)

CoreDebug DEMCR: VC_NOCPERR Mask

Definition at line 1509 of file core_cm4.h.

◆ CoreDebug_DEMCR_VC_NOCPERR_Msk [4/6]

#define CoreDebug_DEMCR_VC_NOCPERR_Msk   (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)

CoreDebug DEMCR: VC_NOCPERR Mask

Definition at line 1717 of file core_cm7.h.

◆ CoreDebug_DEMCR_VC_NOCPERR_Msk [5/6]

#define CoreDebug_DEMCR_VC_NOCPERR_Msk   (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)

CoreDebug DEMCR: VC_NOCPERR Mask

Definition at line 1905 of file core_armv8mml.h.

◆ CoreDebug_DEMCR_VC_NOCPERR_Msk [6/6]

#define CoreDebug_DEMCR_VC_NOCPERR_Msk   (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)

CoreDebug DEMCR: VC_NOCPERR Mask

Definition at line 1980 of file core_cm33.h.

◆ CoreDebug_DEMCR_VC_NOCPERR_Pos [1/6]

#define CoreDebug_DEMCR_VC_NOCPERR_Pos   5U

CoreDebug DEMCR: VC_NOCPERR Position

Definition at line 1317 of file core_sc300.h.

◆ CoreDebug_DEMCR_VC_NOCPERR_Pos [2/6]

#define CoreDebug_DEMCR_VC_NOCPERR_Pos   5U

CoreDebug DEMCR: VC_NOCPERR Position

Definition at line 1337 of file core_cm3.h.

◆ CoreDebug_DEMCR_VC_NOCPERR_Pos [3/6]

#define CoreDebug_DEMCR_VC_NOCPERR_Pos   5U

CoreDebug DEMCR: VC_NOCPERR Position

Definition at line 1508 of file core_cm4.h.

◆ CoreDebug_DEMCR_VC_NOCPERR_Pos [4/6]

#define CoreDebug_DEMCR_VC_NOCPERR_Pos   5U

CoreDebug DEMCR: VC_NOCPERR Position

Definition at line 1716 of file core_cm7.h.

◆ CoreDebug_DEMCR_VC_NOCPERR_Pos [5/6]

#define CoreDebug_DEMCR_VC_NOCPERR_Pos   5U

CoreDebug DEMCR: VC_NOCPERR Position

Definition at line 1904 of file core_armv8mml.h.

◆ CoreDebug_DEMCR_VC_NOCPERR_Pos [6/6]

#define CoreDebug_DEMCR_VC_NOCPERR_Pos   5U

CoreDebug DEMCR: VC_NOCPERR Position

Definition at line 1979 of file core_cm33.h.

◆ CoreDebug_DEMCR_VC_STATERR_Msk [1/6]

#define CoreDebug_DEMCR_VC_STATERR_Msk   (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)

CoreDebug DEMCR: VC_STATERR Mask

Definition at line 1312 of file core_sc300.h.

◆ CoreDebug_DEMCR_VC_STATERR_Msk [2/6]

#define CoreDebug_DEMCR_VC_STATERR_Msk   (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)

CoreDebug DEMCR: VC_STATERR Mask

Definition at line 1332 of file core_cm3.h.

◆ CoreDebug_DEMCR_VC_STATERR_Msk [3/6]

#define CoreDebug_DEMCR_VC_STATERR_Msk   (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)

CoreDebug DEMCR: VC_STATERR Mask

Definition at line 1503 of file core_cm4.h.

◆ CoreDebug_DEMCR_VC_STATERR_Msk [4/6]

#define CoreDebug_DEMCR_VC_STATERR_Msk   (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)

CoreDebug DEMCR: VC_STATERR Mask

Definition at line 1711 of file core_cm7.h.

◆ CoreDebug_DEMCR_VC_STATERR_Msk [5/6]

#define CoreDebug_DEMCR_VC_STATERR_Msk   (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)

CoreDebug DEMCR: VC_STATERR Mask

Definition at line 1899 of file core_armv8mml.h.

◆ CoreDebug_DEMCR_VC_STATERR_Msk [6/6]

#define CoreDebug_DEMCR_VC_STATERR_Msk   (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)

CoreDebug DEMCR: VC_STATERR Mask

Definition at line 1974 of file core_cm33.h.

◆ CoreDebug_DEMCR_VC_STATERR_Pos [1/6]

#define CoreDebug_DEMCR_VC_STATERR_Pos   7U

CoreDebug DEMCR: VC_STATERR Position

Definition at line 1311 of file core_sc300.h.

◆ CoreDebug_DEMCR_VC_STATERR_Pos [2/6]

#define CoreDebug_DEMCR_VC_STATERR_Pos   7U

CoreDebug DEMCR: VC_STATERR Position

Definition at line 1331 of file core_cm3.h.

◆ CoreDebug_DEMCR_VC_STATERR_Pos [3/6]

#define CoreDebug_DEMCR_VC_STATERR_Pos   7U

CoreDebug DEMCR: VC_STATERR Position

Definition at line 1502 of file core_cm4.h.

◆ CoreDebug_DEMCR_VC_STATERR_Pos [4/6]

#define CoreDebug_DEMCR_VC_STATERR_Pos   7U

CoreDebug DEMCR: VC_STATERR Position

Definition at line 1710 of file core_cm7.h.

◆ CoreDebug_DEMCR_VC_STATERR_Pos [5/6]

#define CoreDebug_DEMCR_VC_STATERR_Pos   7U

CoreDebug DEMCR: VC_STATERR Position

Definition at line 1898 of file core_armv8mml.h.

◆ CoreDebug_DEMCR_VC_STATERR_Pos [6/6]

#define CoreDebug_DEMCR_VC_STATERR_Pos   7U

CoreDebug DEMCR: VC_STATERR Position

Definition at line 1973 of file core_cm33.h.

◆ CoreDebug_DHCSR_C_DEBUGEN_Msk [1/8]

#define CoreDebug_DHCSR_C_DEBUGEN_Msk   (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)

CoreDebug DHCSR: C_DEBUGEN Mask

Definition at line 1034 of file core_armv8mbl.h.

◆ CoreDebug_DHCSR_C_DEBUGEN_Msk [2/8]

#define CoreDebug_DHCSR_C_DEBUGEN_Msk   (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)

CoreDebug DHCSR: C_DEBUGEN Mask

Definition at line 1109 of file core_cm23.h.

◆ CoreDebug_DHCSR_C_DEBUGEN_Msk [3/8]

#define CoreDebug_DHCSR_C_DEBUGEN_Msk   (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)

CoreDebug DHCSR: C_DEBUGEN Mask

Definition at line 1277 of file core_sc300.h.

◆ CoreDebug_DHCSR_C_DEBUGEN_Msk [4/8]

#define CoreDebug_DHCSR_C_DEBUGEN_Msk   (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)

CoreDebug DHCSR: C_DEBUGEN Mask

Definition at line 1297 of file core_cm3.h.

◆ CoreDebug_DHCSR_C_DEBUGEN_Msk [5/8]

#define CoreDebug_DHCSR_C_DEBUGEN_Msk   (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)

CoreDebug DHCSR: C_DEBUGEN Mask

Definition at line 1468 of file core_cm4.h.

◆ CoreDebug_DHCSR_C_DEBUGEN_Msk [6/8]

#define CoreDebug_DHCSR_C_DEBUGEN_Msk   (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)

CoreDebug DHCSR: C_DEBUGEN Mask

Definition at line 1676 of file core_cm7.h.

◆ CoreDebug_DHCSR_C_DEBUGEN_Msk [7/8]

#define CoreDebug_DHCSR_C_DEBUGEN_Msk   (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)

CoreDebug DHCSR: C_DEBUGEN Mask

Definition at line 1864 of file core_armv8mml.h.

◆ CoreDebug_DHCSR_C_DEBUGEN_Msk [8/8]

#define CoreDebug_DHCSR_C_DEBUGEN_Msk   (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)

CoreDebug DHCSR: C_DEBUGEN Mask

Definition at line 1939 of file core_cm33.h.

◆ CoreDebug_DHCSR_C_DEBUGEN_Pos [1/8]

#define CoreDebug_DHCSR_C_DEBUGEN_Pos   0U

CoreDebug DHCSR: C_DEBUGEN Position

Definition at line 1033 of file core_armv8mbl.h.

◆ CoreDebug_DHCSR_C_DEBUGEN_Pos [2/8]

#define CoreDebug_DHCSR_C_DEBUGEN_Pos   0U

CoreDebug DHCSR: C_DEBUGEN Position

Definition at line 1108 of file core_cm23.h.

◆ CoreDebug_DHCSR_C_DEBUGEN_Pos [3/8]

#define CoreDebug_DHCSR_C_DEBUGEN_Pos   0U

CoreDebug DHCSR: C_DEBUGEN Position

Definition at line 1276 of file core_sc300.h.

◆ CoreDebug_DHCSR_C_DEBUGEN_Pos [4/8]

#define CoreDebug_DHCSR_C_DEBUGEN_Pos   0U

CoreDebug DHCSR: C_DEBUGEN Position

Definition at line 1296 of file core_cm3.h.

◆ CoreDebug_DHCSR_C_DEBUGEN_Pos [5/8]

#define CoreDebug_DHCSR_C_DEBUGEN_Pos   0U

CoreDebug DHCSR: C_DEBUGEN Position

Definition at line 1467 of file core_cm4.h.

◆ CoreDebug_DHCSR_C_DEBUGEN_Pos [6/8]

#define CoreDebug_DHCSR_C_DEBUGEN_Pos   0U

CoreDebug DHCSR: C_DEBUGEN Position

Definition at line 1675 of file core_cm7.h.

◆ CoreDebug_DHCSR_C_DEBUGEN_Pos [7/8]

#define CoreDebug_DHCSR_C_DEBUGEN_Pos   0U

CoreDebug DHCSR: C_DEBUGEN Position

Definition at line 1863 of file core_armv8mml.h.

◆ CoreDebug_DHCSR_C_DEBUGEN_Pos [8/8]

#define CoreDebug_DHCSR_C_DEBUGEN_Pos   0U

CoreDebug DHCSR: C_DEBUGEN Position

Definition at line 1938 of file core_cm33.h.

◆ CoreDebug_DHCSR_C_HALT_Msk [1/8]

#define CoreDebug_DHCSR_C_HALT_Msk   (1UL << CoreDebug_DHCSR_C_HALT_Pos)

CoreDebug DHCSR: C_HALT Mask

Definition at line 1031 of file core_armv8mbl.h.

◆ CoreDebug_DHCSR_C_HALT_Msk [2/8]

#define CoreDebug_DHCSR_C_HALT_Msk   (1UL << CoreDebug_DHCSR_C_HALT_Pos)

CoreDebug DHCSR: C_HALT Mask

Definition at line 1106 of file core_cm23.h.

◆ CoreDebug_DHCSR_C_HALT_Msk [3/8]

#define CoreDebug_DHCSR_C_HALT_Msk   (1UL << CoreDebug_DHCSR_C_HALT_Pos)

CoreDebug DHCSR: C_HALT Mask

Definition at line 1274 of file core_sc300.h.

◆ CoreDebug_DHCSR_C_HALT_Msk [4/8]

#define CoreDebug_DHCSR_C_HALT_Msk   (1UL << CoreDebug_DHCSR_C_HALT_Pos)

CoreDebug DHCSR: C_HALT Mask

Definition at line 1294 of file core_cm3.h.

◆ CoreDebug_DHCSR_C_HALT_Msk [5/8]

#define CoreDebug_DHCSR_C_HALT_Msk   (1UL << CoreDebug_DHCSR_C_HALT_Pos)

CoreDebug DHCSR: C_HALT Mask

Definition at line 1465 of file core_cm4.h.

◆ CoreDebug_DHCSR_C_HALT_Msk [6/8]

#define CoreDebug_DHCSR_C_HALT_Msk   (1UL << CoreDebug_DHCSR_C_HALT_Pos)

CoreDebug DHCSR: C_HALT Mask

Definition at line 1673 of file core_cm7.h.

◆ CoreDebug_DHCSR_C_HALT_Msk [7/8]

#define CoreDebug_DHCSR_C_HALT_Msk   (1UL << CoreDebug_DHCSR_C_HALT_Pos)

CoreDebug DHCSR: C_HALT Mask

Definition at line 1861 of file core_armv8mml.h.

◆ CoreDebug_DHCSR_C_HALT_Msk [8/8]

#define CoreDebug_DHCSR_C_HALT_Msk   (1UL << CoreDebug_DHCSR_C_HALT_Pos)

CoreDebug DHCSR: C_HALT Mask

Definition at line 1936 of file core_cm33.h.

◆ CoreDebug_DHCSR_C_HALT_Pos [1/8]

#define CoreDebug_DHCSR_C_HALT_Pos   1U

CoreDebug DHCSR: C_HALT Position

Definition at line 1030 of file core_armv8mbl.h.

◆ CoreDebug_DHCSR_C_HALT_Pos [2/8]

#define CoreDebug_DHCSR_C_HALT_Pos   1U

CoreDebug DHCSR: C_HALT Position

Definition at line 1105 of file core_cm23.h.

◆ CoreDebug_DHCSR_C_HALT_Pos [3/8]

#define CoreDebug_DHCSR_C_HALT_Pos   1U

CoreDebug DHCSR: C_HALT Position

Definition at line 1273 of file core_sc300.h.

◆ CoreDebug_DHCSR_C_HALT_Pos [4/8]

#define CoreDebug_DHCSR_C_HALT_Pos   1U

CoreDebug DHCSR: C_HALT Position

Definition at line 1293 of file core_cm3.h.

◆ CoreDebug_DHCSR_C_HALT_Pos [5/8]

#define CoreDebug_DHCSR_C_HALT_Pos   1U

CoreDebug DHCSR: C_HALT Position

Definition at line 1464 of file core_cm4.h.

◆ CoreDebug_DHCSR_C_HALT_Pos [6/8]

#define CoreDebug_DHCSR_C_HALT_Pos   1U

CoreDebug DHCSR: C_HALT Position

Definition at line 1672 of file core_cm7.h.

◆ CoreDebug_DHCSR_C_HALT_Pos [7/8]

#define CoreDebug_DHCSR_C_HALT_Pos   1U

CoreDebug DHCSR: C_HALT Position

Definition at line 1860 of file core_armv8mml.h.

◆ CoreDebug_DHCSR_C_HALT_Pos [8/8]

#define CoreDebug_DHCSR_C_HALT_Pos   1U

CoreDebug DHCSR: C_HALT Position

Definition at line 1935 of file core_cm33.h.

◆ CoreDebug_DHCSR_C_MASKINTS_Msk [1/8]

#define CoreDebug_DHCSR_C_MASKINTS_Msk   (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)

CoreDebug DHCSR: C_MASKINTS Mask

Definition at line 1025 of file core_armv8mbl.h.

◆ CoreDebug_DHCSR_C_MASKINTS_Msk [2/8]

#define CoreDebug_DHCSR_C_MASKINTS_Msk   (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)

CoreDebug DHCSR: C_MASKINTS Mask

Definition at line 1100 of file core_cm23.h.

◆ CoreDebug_DHCSR_C_MASKINTS_Msk [3/8]

#define CoreDebug_DHCSR_C_MASKINTS_Msk   (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)

CoreDebug DHCSR: C_MASKINTS Mask

Definition at line 1268 of file core_sc300.h.

◆ CoreDebug_DHCSR_C_MASKINTS_Msk [4/8]

#define CoreDebug_DHCSR_C_MASKINTS_Msk   (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)

CoreDebug DHCSR: C_MASKINTS Mask

Definition at line 1288 of file core_cm3.h.

◆ CoreDebug_DHCSR_C_MASKINTS_Msk [5/8]

#define CoreDebug_DHCSR_C_MASKINTS_Msk   (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)

CoreDebug DHCSR: C_MASKINTS Mask

Definition at line 1459 of file core_cm4.h.

◆ CoreDebug_DHCSR_C_MASKINTS_Msk [6/8]

#define CoreDebug_DHCSR_C_MASKINTS_Msk   (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)

CoreDebug DHCSR: C_MASKINTS Mask

Definition at line 1667 of file core_cm7.h.

◆ CoreDebug_DHCSR_C_MASKINTS_Msk [7/8]

#define CoreDebug_DHCSR_C_MASKINTS_Msk   (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)

CoreDebug DHCSR: C_MASKINTS Mask

Definition at line 1855 of file core_armv8mml.h.

◆ CoreDebug_DHCSR_C_MASKINTS_Msk [8/8]

#define CoreDebug_DHCSR_C_MASKINTS_Msk   (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)

CoreDebug DHCSR: C_MASKINTS Mask

Definition at line 1930 of file core_cm33.h.

◆ CoreDebug_DHCSR_C_MASKINTS_Pos [1/8]

#define CoreDebug_DHCSR_C_MASKINTS_Pos   3U

CoreDebug DHCSR: C_MASKINTS Position

Definition at line 1024 of file core_armv8mbl.h.

◆ CoreDebug_DHCSR_C_MASKINTS_Pos [2/8]

#define CoreDebug_DHCSR_C_MASKINTS_Pos   3U

CoreDebug DHCSR: C_MASKINTS Position

Definition at line 1099 of file core_cm23.h.

◆ CoreDebug_DHCSR_C_MASKINTS_Pos [3/8]

#define CoreDebug_DHCSR_C_MASKINTS_Pos   3U

CoreDebug DHCSR: C_MASKINTS Position

Definition at line 1267 of file core_sc300.h.

◆ CoreDebug_DHCSR_C_MASKINTS_Pos [4/8]

#define CoreDebug_DHCSR_C_MASKINTS_Pos   3U

CoreDebug DHCSR: C_MASKINTS Position

Definition at line 1287 of file core_cm3.h.

◆ CoreDebug_DHCSR_C_MASKINTS_Pos [5/8]

#define CoreDebug_DHCSR_C_MASKINTS_Pos   3U

CoreDebug DHCSR: C_MASKINTS Position

Definition at line 1458 of file core_cm4.h.

◆ CoreDebug_DHCSR_C_MASKINTS_Pos [6/8]

#define CoreDebug_DHCSR_C_MASKINTS_Pos   3U

CoreDebug DHCSR: C_MASKINTS Position

Definition at line 1666 of file core_cm7.h.

◆ CoreDebug_DHCSR_C_MASKINTS_Pos [7/8]

#define CoreDebug_DHCSR_C_MASKINTS_Pos   3U

CoreDebug DHCSR: C_MASKINTS Position

Definition at line 1854 of file core_armv8mml.h.

◆ CoreDebug_DHCSR_C_MASKINTS_Pos [8/8]

#define CoreDebug_DHCSR_C_MASKINTS_Pos   3U

CoreDebug DHCSR: C_MASKINTS Position

Definition at line 1929 of file core_cm33.h.

◆ CoreDebug_DHCSR_C_SNAPSTALL_Msk [1/6]

#define CoreDebug_DHCSR_C_SNAPSTALL_Msk   (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)

CoreDebug DHCSR: C_SNAPSTALL Mask

Definition at line 1265 of file core_sc300.h.

◆ CoreDebug_DHCSR_C_SNAPSTALL_Msk [2/6]

#define CoreDebug_DHCSR_C_SNAPSTALL_Msk   (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)

CoreDebug DHCSR: C_SNAPSTALL Mask

Definition at line 1285 of file core_cm3.h.

◆ CoreDebug_DHCSR_C_SNAPSTALL_Msk [3/6]

#define CoreDebug_DHCSR_C_SNAPSTALL_Msk   (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)

CoreDebug DHCSR: C_SNAPSTALL Mask

Definition at line 1456 of file core_cm4.h.

◆ CoreDebug_DHCSR_C_SNAPSTALL_Msk [4/6]

#define CoreDebug_DHCSR_C_SNAPSTALL_Msk   (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)

CoreDebug DHCSR: C_SNAPSTALL Mask

Definition at line 1664 of file core_cm7.h.

◆ CoreDebug_DHCSR_C_SNAPSTALL_Msk [5/6]

#define CoreDebug_DHCSR_C_SNAPSTALL_Msk   (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)

CoreDebug DHCSR: C_SNAPSTALL Mask

Definition at line 1852 of file core_armv8mml.h.

◆ CoreDebug_DHCSR_C_SNAPSTALL_Msk [6/6]

#define CoreDebug_DHCSR_C_SNAPSTALL_Msk   (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)

CoreDebug DHCSR: C_SNAPSTALL Mask

Definition at line 1927 of file core_cm33.h.

◆ CoreDebug_DHCSR_C_SNAPSTALL_Pos [1/6]

#define CoreDebug_DHCSR_C_SNAPSTALL_Pos   5U

CoreDebug DHCSR: C_SNAPSTALL Position

Definition at line 1264 of file core_sc300.h.

◆ CoreDebug_DHCSR_C_SNAPSTALL_Pos [2/6]

#define CoreDebug_DHCSR_C_SNAPSTALL_Pos   5U

CoreDebug DHCSR: C_SNAPSTALL Position

Definition at line 1284 of file core_cm3.h.

◆ CoreDebug_DHCSR_C_SNAPSTALL_Pos [3/6]

#define CoreDebug_DHCSR_C_SNAPSTALL_Pos   5U

CoreDebug DHCSR: C_SNAPSTALL Position

Definition at line 1455 of file core_cm4.h.

◆ CoreDebug_DHCSR_C_SNAPSTALL_Pos [4/6]

#define CoreDebug_DHCSR_C_SNAPSTALL_Pos   5U

CoreDebug DHCSR: C_SNAPSTALL Position

Definition at line 1663 of file core_cm7.h.

◆ CoreDebug_DHCSR_C_SNAPSTALL_Pos [5/6]

#define CoreDebug_DHCSR_C_SNAPSTALL_Pos   5U

CoreDebug DHCSR: C_SNAPSTALL Position

Definition at line 1851 of file core_armv8mml.h.

◆ CoreDebug_DHCSR_C_SNAPSTALL_Pos [6/6]

#define CoreDebug_DHCSR_C_SNAPSTALL_Pos   5U

CoreDebug DHCSR: C_SNAPSTALL Position

Definition at line 1926 of file core_cm33.h.

◆ CoreDebug_DHCSR_C_STEP_Msk [1/8]

#define CoreDebug_DHCSR_C_STEP_Msk   (1UL << CoreDebug_DHCSR_C_STEP_Pos)

CoreDebug DHCSR: C_STEP Mask

Definition at line 1028 of file core_armv8mbl.h.

◆ CoreDebug_DHCSR_C_STEP_Msk [2/8]

#define CoreDebug_DHCSR_C_STEP_Msk   (1UL << CoreDebug_DHCSR_C_STEP_Pos)

CoreDebug DHCSR: C_STEP Mask

Definition at line 1103 of file core_cm23.h.

◆ CoreDebug_DHCSR_C_STEP_Msk [3/8]

#define CoreDebug_DHCSR_C_STEP_Msk   (1UL << CoreDebug_DHCSR_C_STEP_Pos)

CoreDebug DHCSR: C_STEP Mask

Definition at line 1271 of file core_sc300.h.

◆ CoreDebug_DHCSR_C_STEP_Msk [4/8]

#define CoreDebug_DHCSR_C_STEP_Msk   (1UL << CoreDebug_DHCSR_C_STEP_Pos)

CoreDebug DHCSR: C_STEP Mask

Definition at line 1291 of file core_cm3.h.

◆ CoreDebug_DHCSR_C_STEP_Msk [5/8]

#define CoreDebug_DHCSR_C_STEP_Msk   (1UL << CoreDebug_DHCSR_C_STEP_Pos)

CoreDebug DHCSR: C_STEP Mask

Definition at line 1462 of file core_cm4.h.

◆ CoreDebug_DHCSR_C_STEP_Msk [6/8]

#define CoreDebug_DHCSR_C_STEP_Msk   (1UL << CoreDebug_DHCSR_C_STEP_Pos)

CoreDebug DHCSR: C_STEP Mask

Definition at line 1670 of file core_cm7.h.

◆ CoreDebug_DHCSR_C_STEP_Msk [7/8]

#define CoreDebug_DHCSR_C_STEP_Msk   (1UL << CoreDebug_DHCSR_C_STEP_Pos)

CoreDebug DHCSR: C_STEP Mask

Definition at line 1858 of file core_armv8mml.h.

◆ CoreDebug_DHCSR_C_STEP_Msk [8/8]

#define CoreDebug_DHCSR_C_STEP_Msk   (1UL << CoreDebug_DHCSR_C_STEP_Pos)

CoreDebug DHCSR: C_STEP Mask

Definition at line 1933 of file core_cm33.h.

◆ CoreDebug_DHCSR_C_STEP_Pos [1/8]

#define CoreDebug_DHCSR_C_STEP_Pos   2U

CoreDebug DHCSR: C_STEP Position

Definition at line 1027 of file core_armv8mbl.h.

◆ CoreDebug_DHCSR_C_STEP_Pos [2/8]

#define CoreDebug_DHCSR_C_STEP_Pos   2U

CoreDebug DHCSR: C_STEP Position

Definition at line 1102 of file core_cm23.h.

◆ CoreDebug_DHCSR_C_STEP_Pos [3/8]

#define CoreDebug_DHCSR_C_STEP_Pos   2U

CoreDebug DHCSR: C_STEP Position

Definition at line 1270 of file core_sc300.h.

◆ CoreDebug_DHCSR_C_STEP_Pos [4/8]

#define CoreDebug_DHCSR_C_STEP_Pos   2U

CoreDebug DHCSR: C_STEP Position

Definition at line 1290 of file core_cm3.h.

◆ CoreDebug_DHCSR_C_STEP_Pos [5/8]

#define CoreDebug_DHCSR_C_STEP_Pos   2U

CoreDebug DHCSR: C_STEP Position

Definition at line 1461 of file core_cm4.h.

◆ CoreDebug_DHCSR_C_STEP_Pos [6/8]

#define CoreDebug_DHCSR_C_STEP_Pos   2U

CoreDebug DHCSR: C_STEP Position

Definition at line 1669 of file core_cm7.h.

◆ CoreDebug_DHCSR_C_STEP_Pos [7/8]

#define CoreDebug_DHCSR_C_STEP_Pos   2U

CoreDebug DHCSR: C_STEP Position

Definition at line 1857 of file core_armv8mml.h.

◆ CoreDebug_DHCSR_C_STEP_Pos [8/8]

#define CoreDebug_DHCSR_C_STEP_Pos   2U

CoreDebug DHCSR: C_STEP Position

Definition at line 1932 of file core_cm33.h.

◆ CoreDebug_DHCSR_DBGKEY_Msk [1/8]

#define CoreDebug_DHCSR_DBGKEY_Msk   (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)

CoreDebug DHCSR: DBGKEY Mask

Definition at line 1001 of file core_armv8mbl.h.

◆ CoreDebug_DHCSR_DBGKEY_Msk [2/8]

#define CoreDebug_DHCSR_DBGKEY_Msk   (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)

CoreDebug DHCSR: DBGKEY Mask

Definition at line 1076 of file core_cm23.h.

◆ CoreDebug_DHCSR_DBGKEY_Msk [3/8]

#define CoreDebug_DHCSR_DBGKEY_Msk   (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)

CoreDebug DHCSR: DBGKEY Mask

Definition at line 1244 of file core_sc300.h.

◆ CoreDebug_DHCSR_DBGKEY_Msk [4/8]

#define CoreDebug_DHCSR_DBGKEY_Msk   (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)

CoreDebug DHCSR: DBGKEY Mask

Definition at line 1264 of file core_cm3.h.

◆ CoreDebug_DHCSR_DBGKEY_Msk [5/8]

#define CoreDebug_DHCSR_DBGKEY_Msk   (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)

CoreDebug DHCSR: DBGKEY Mask

Definition at line 1435 of file core_cm4.h.

◆ CoreDebug_DHCSR_DBGKEY_Msk [6/8]

#define CoreDebug_DHCSR_DBGKEY_Msk   (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)

CoreDebug DHCSR: DBGKEY Mask

Definition at line 1643 of file core_cm7.h.

◆ CoreDebug_DHCSR_DBGKEY_Msk [7/8]

#define CoreDebug_DHCSR_DBGKEY_Msk   (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)

CoreDebug DHCSR: DBGKEY Mask

Definition at line 1828 of file core_armv8mml.h.

◆ CoreDebug_DHCSR_DBGKEY_Msk [8/8]

#define CoreDebug_DHCSR_DBGKEY_Msk   (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)

CoreDebug DHCSR: DBGKEY Mask

Definition at line 1903 of file core_cm33.h.

◆ CoreDebug_DHCSR_DBGKEY_Pos [1/8]

#define CoreDebug_DHCSR_DBGKEY_Pos   16U

CoreDebug DHCSR: DBGKEY Position

Definition at line 1000 of file core_armv8mbl.h.

◆ CoreDebug_DHCSR_DBGKEY_Pos [2/8]

#define CoreDebug_DHCSR_DBGKEY_Pos   16U

CoreDebug DHCSR: DBGKEY Position

Definition at line 1075 of file core_cm23.h.

◆ CoreDebug_DHCSR_DBGKEY_Pos [3/8]

#define CoreDebug_DHCSR_DBGKEY_Pos   16U

CoreDebug DHCSR: DBGKEY Position

Definition at line 1243 of file core_sc300.h.

◆ CoreDebug_DHCSR_DBGKEY_Pos [4/8]

#define CoreDebug_DHCSR_DBGKEY_Pos   16U

CoreDebug DHCSR: DBGKEY Position

Definition at line 1263 of file core_cm3.h.

◆ CoreDebug_DHCSR_DBGKEY_Pos [5/8]

#define CoreDebug_DHCSR_DBGKEY_Pos   16U

CoreDebug DHCSR: DBGKEY Position

Definition at line 1434 of file core_cm4.h.

◆ CoreDebug_DHCSR_DBGKEY_Pos [6/8]

#define CoreDebug_DHCSR_DBGKEY_Pos   16U

CoreDebug DHCSR: DBGKEY Position

Definition at line 1642 of file core_cm7.h.

◆ CoreDebug_DHCSR_DBGKEY_Pos [7/8]

#define CoreDebug_DHCSR_DBGKEY_Pos   16U

CoreDebug DHCSR: DBGKEY Position

Definition at line 1827 of file core_armv8mml.h.

◆ CoreDebug_DHCSR_DBGKEY_Pos [8/8]

#define CoreDebug_DHCSR_DBGKEY_Pos   16U

CoreDebug DHCSR: DBGKEY Position

Definition at line 1902 of file core_cm33.h.

◆ CoreDebug_DHCSR_S_HALT_Msk [1/8]

#define CoreDebug_DHCSR_S_HALT_Msk   (1UL << CoreDebug_DHCSR_S_HALT_Pos)

CoreDebug DHCSR: S_HALT Mask

Definition at line 1019 of file core_armv8mbl.h.

◆ CoreDebug_DHCSR_S_HALT_Msk [2/8]

#define CoreDebug_DHCSR_S_HALT_Msk   (1UL << CoreDebug_DHCSR_S_HALT_Pos)

CoreDebug DHCSR: S_HALT Mask

Definition at line 1094 of file core_cm23.h.

◆ CoreDebug_DHCSR_S_HALT_Msk [3/8]

#define CoreDebug_DHCSR_S_HALT_Msk   (1UL << CoreDebug_DHCSR_S_HALT_Pos)

CoreDebug DHCSR: S_HALT Mask

Definition at line 1259 of file core_sc300.h.

◆ CoreDebug_DHCSR_S_HALT_Msk [4/8]

#define CoreDebug_DHCSR_S_HALT_Msk   (1UL << CoreDebug_DHCSR_S_HALT_Pos)

CoreDebug DHCSR: S_HALT Mask

Definition at line 1279 of file core_cm3.h.

◆ CoreDebug_DHCSR_S_HALT_Msk [5/8]

#define CoreDebug_DHCSR_S_HALT_Msk   (1UL << CoreDebug_DHCSR_S_HALT_Pos)

CoreDebug DHCSR: S_HALT Mask

Definition at line 1450 of file core_cm4.h.

◆ CoreDebug_DHCSR_S_HALT_Msk [6/8]

#define CoreDebug_DHCSR_S_HALT_Msk   (1UL << CoreDebug_DHCSR_S_HALT_Pos)

CoreDebug DHCSR: S_HALT Mask

Definition at line 1658 of file core_cm7.h.

◆ CoreDebug_DHCSR_S_HALT_Msk [7/8]

#define CoreDebug_DHCSR_S_HALT_Msk   (1UL << CoreDebug_DHCSR_S_HALT_Pos)

CoreDebug DHCSR: S_HALT Mask

Definition at line 1846 of file core_armv8mml.h.

◆ CoreDebug_DHCSR_S_HALT_Msk [8/8]

#define CoreDebug_DHCSR_S_HALT_Msk   (1UL << CoreDebug_DHCSR_S_HALT_Pos)

CoreDebug DHCSR: S_HALT Mask

Definition at line 1921 of file core_cm33.h.

◆ CoreDebug_DHCSR_S_HALT_Pos [1/8]

#define CoreDebug_DHCSR_S_HALT_Pos   17U

CoreDebug DHCSR: S_HALT Position

Definition at line 1018 of file core_armv8mbl.h.

◆ CoreDebug_DHCSR_S_HALT_Pos [2/8]

#define CoreDebug_DHCSR_S_HALT_Pos   17U

CoreDebug DHCSR: S_HALT Position

Definition at line 1093 of file core_cm23.h.

◆ CoreDebug_DHCSR_S_HALT_Pos [3/8]

#define CoreDebug_DHCSR_S_HALT_Pos   17U

CoreDebug DHCSR: S_HALT Position

Definition at line 1258 of file core_sc300.h.

◆ CoreDebug_DHCSR_S_HALT_Pos [4/8]

#define CoreDebug_DHCSR_S_HALT_Pos   17U

CoreDebug DHCSR: S_HALT Position

Definition at line 1278 of file core_cm3.h.

◆ CoreDebug_DHCSR_S_HALT_Pos [5/8]

#define CoreDebug_DHCSR_S_HALT_Pos   17U

CoreDebug DHCSR: S_HALT Position

Definition at line 1449 of file core_cm4.h.

◆ CoreDebug_DHCSR_S_HALT_Pos [6/8]

#define CoreDebug_DHCSR_S_HALT_Pos   17U

CoreDebug DHCSR: S_HALT Position

Definition at line 1657 of file core_cm7.h.

◆ CoreDebug_DHCSR_S_HALT_Pos [7/8]

#define CoreDebug_DHCSR_S_HALT_Pos   17U

CoreDebug DHCSR: S_HALT Position

Definition at line 1845 of file core_armv8mml.h.

◆ CoreDebug_DHCSR_S_HALT_Pos [8/8]

#define CoreDebug_DHCSR_S_HALT_Pos   17U

CoreDebug DHCSR: S_HALT Position

Definition at line 1920 of file core_cm33.h.

◆ CoreDebug_DHCSR_S_LOCKUP_Msk [1/8]

#define CoreDebug_DHCSR_S_LOCKUP_Msk   (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)

CoreDebug DHCSR: S_LOCKUP Mask

Definition at line 1013 of file core_armv8mbl.h.

◆ CoreDebug_DHCSR_S_LOCKUP_Msk [2/8]

#define CoreDebug_DHCSR_S_LOCKUP_Msk   (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)

CoreDebug DHCSR: S_LOCKUP Mask

Definition at line 1088 of file core_cm23.h.

◆ CoreDebug_DHCSR_S_LOCKUP_Msk [3/8]

#define CoreDebug_DHCSR_S_LOCKUP_Msk   (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)

CoreDebug DHCSR: S_LOCKUP Mask

Definition at line 1253 of file core_sc300.h.

◆ CoreDebug_DHCSR_S_LOCKUP_Msk [4/8]

#define CoreDebug_DHCSR_S_LOCKUP_Msk   (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)

CoreDebug DHCSR: S_LOCKUP Mask

Definition at line 1273 of file core_cm3.h.

◆ CoreDebug_DHCSR_S_LOCKUP_Msk [5/8]

#define CoreDebug_DHCSR_S_LOCKUP_Msk   (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)

CoreDebug DHCSR: S_LOCKUP Mask

Definition at line 1444 of file core_cm4.h.

◆ CoreDebug_DHCSR_S_LOCKUP_Msk [6/8]

#define CoreDebug_DHCSR_S_LOCKUP_Msk   (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)

CoreDebug DHCSR: S_LOCKUP Mask

Definition at line 1652 of file core_cm7.h.

◆ CoreDebug_DHCSR_S_LOCKUP_Msk [7/8]

#define CoreDebug_DHCSR_S_LOCKUP_Msk   (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)

CoreDebug DHCSR: S_LOCKUP Mask

Definition at line 1840 of file core_armv8mml.h.

◆ CoreDebug_DHCSR_S_LOCKUP_Msk [8/8]

#define CoreDebug_DHCSR_S_LOCKUP_Msk   (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)

CoreDebug DHCSR: S_LOCKUP Mask

Definition at line 1915 of file core_cm33.h.

◆ CoreDebug_DHCSR_S_LOCKUP_Pos [1/8]

#define CoreDebug_DHCSR_S_LOCKUP_Pos   19U

CoreDebug DHCSR: S_LOCKUP Position

Definition at line 1012 of file core_armv8mbl.h.

◆ CoreDebug_DHCSR_S_LOCKUP_Pos [2/8]

#define CoreDebug_DHCSR_S_LOCKUP_Pos   19U

CoreDebug DHCSR: S_LOCKUP Position

Definition at line 1087 of file core_cm23.h.

◆ CoreDebug_DHCSR_S_LOCKUP_Pos [3/8]

#define CoreDebug_DHCSR_S_LOCKUP_Pos   19U

CoreDebug DHCSR: S_LOCKUP Position

Definition at line 1252 of file core_sc300.h.

◆ CoreDebug_DHCSR_S_LOCKUP_Pos [4/8]

#define CoreDebug_DHCSR_S_LOCKUP_Pos   19U

CoreDebug DHCSR: S_LOCKUP Position

Definition at line 1272 of file core_cm3.h.

◆ CoreDebug_DHCSR_S_LOCKUP_Pos [5/8]

#define CoreDebug_DHCSR_S_LOCKUP_Pos   19U

CoreDebug DHCSR: S_LOCKUP Position

Definition at line 1443 of file core_cm4.h.

◆ CoreDebug_DHCSR_S_LOCKUP_Pos [6/8]

#define CoreDebug_DHCSR_S_LOCKUP_Pos   19U

CoreDebug DHCSR: S_LOCKUP Position

Definition at line 1651 of file core_cm7.h.

◆ CoreDebug_DHCSR_S_LOCKUP_Pos [7/8]

#define CoreDebug_DHCSR_S_LOCKUP_Pos   19U

CoreDebug DHCSR: S_LOCKUP Position

Definition at line 1839 of file core_armv8mml.h.

◆ CoreDebug_DHCSR_S_LOCKUP_Pos [8/8]

#define CoreDebug_DHCSR_S_LOCKUP_Pos   19U

CoreDebug DHCSR: S_LOCKUP Position

Definition at line 1914 of file core_cm33.h.

◆ CoreDebug_DHCSR_S_REGRDY_Msk [1/8]

#define CoreDebug_DHCSR_S_REGRDY_Msk   (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)

CoreDebug DHCSR: S_REGRDY Mask

Definition at line 1022 of file core_armv8mbl.h.

◆ CoreDebug_DHCSR_S_REGRDY_Msk [2/8]

#define CoreDebug_DHCSR_S_REGRDY_Msk   (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)

CoreDebug DHCSR: S_REGRDY Mask

Definition at line 1097 of file core_cm23.h.

◆ CoreDebug_DHCSR_S_REGRDY_Msk [3/8]

#define CoreDebug_DHCSR_S_REGRDY_Msk   (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)

CoreDebug DHCSR: S_REGRDY Mask

Definition at line 1262 of file core_sc300.h.

◆ CoreDebug_DHCSR_S_REGRDY_Msk [4/8]

#define CoreDebug_DHCSR_S_REGRDY_Msk   (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)

CoreDebug DHCSR: S_REGRDY Mask

Definition at line 1282 of file core_cm3.h.

◆ CoreDebug_DHCSR_S_REGRDY_Msk [5/8]

#define CoreDebug_DHCSR_S_REGRDY_Msk   (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)

CoreDebug DHCSR: S_REGRDY Mask

Definition at line 1453 of file core_cm4.h.

◆ CoreDebug_DHCSR_S_REGRDY_Msk [6/8]

#define CoreDebug_DHCSR_S_REGRDY_Msk   (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)

CoreDebug DHCSR: S_REGRDY Mask

Definition at line 1661 of file core_cm7.h.

◆ CoreDebug_DHCSR_S_REGRDY_Msk [7/8]

#define CoreDebug_DHCSR_S_REGRDY_Msk   (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)

CoreDebug DHCSR: S_REGRDY Mask

Definition at line 1849 of file core_armv8mml.h.

◆ CoreDebug_DHCSR_S_REGRDY_Msk [8/8]

#define CoreDebug_DHCSR_S_REGRDY_Msk   (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)

CoreDebug DHCSR: S_REGRDY Mask

Definition at line 1924 of file core_cm33.h.

◆ CoreDebug_DHCSR_S_REGRDY_Pos [1/8]

#define CoreDebug_DHCSR_S_REGRDY_Pos   16U

CoreDebug DHCSR: S_REGRDY Position

Definition at line 1021 of file core_armv8mbl.h.

◆ CoreDebug_DHCSR_S_REGRDY_Pos [2/8]

#define CoreDebug_DHCSR_S_REGRDY_Pos   16U

CoreDebug DHCSR: S_REGRDY Position

Definition at line 1096 of file core_cm23.h.

◆ CoreDebug_DHCSR_S_REGRDY_Pos [3/8]

#define CoreDebug_DHCSR_S_REGRDY_Pos   16U

CoreDebug DHCSR: S_REGRDY Position

Definition at line 1261 of file core_sc300.h.

◆ CoreDebug_DHCSR_S_REGRDY_Pos [4/8]

#define CoreDebug_DHCSR_S_REGRDY_Pos   16U

CoreDebug DHCSR: S_REGRDY Position

Definition at line 1281 of file core_cm3.h.

◆ CoreDebug_DHCSR_S_REGRDY_Pos [5/8]

#define CoreDebug_DHCSR_S_REGRDY_Pos   16U

CoreDebug DHCSR: S_REGRDY Position

Definition at line 1452 of file core_cm4.h.

◆ CoreDebug_DHCSR_S_REGRDY_Pos [6/8]

#define CoreDebug_DHCSR_S_REGRDY_Pos   16U

CoreDebug DHCSR: S_REGRDY Position

Definition at line 1660 of file core_cm7.h.

◆ CoreDebug_DHCSR_S_REGRDY_Pos [7/8]

#define CoreDebug_DHCSR_S_REGRDY_Pos   16U

CoreDebug DHCSR: S_REGRDY Position

Definition at line 1848 of file core_armv8mml.h.

◆ CoreDebug_DHCSR_S_REGRDY_Pos [8/8]

#define CoreDebug_DHCSR_S_REGRDY_Pos   16U

CoreDebug DHCSR: S_REGRDY Position

Definition at line 1923 of file core_cm33.h.

◆ CoreDebug_DHCSR_S_RESET_ST_Msk [1/8]

#define CoreDebug_DHCSR_S_RESET_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)

CoreDebug DHCSR: S_RESET_ST Mask

Definition at line 1007 of file core_armv8mbl.h.

◆ CoreDebug_DHCSR_S_RESET_ST_Msk [2/8]

#define CoreDebug_DHCSR_S_RESET_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)

CoreDebug DHCSR: S_RESET_ST Mask

Definition at line 1082 of file core_cm23.h.

◆ CoreDebug_DHCSR_S_RESET_ST_Msk [3/8]

#define CoreDebug_DHCSR_S_RESET_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)

CoreDebug DHCSR: S_RESET_ST Mask

Definition at line 1247 of file core_sc300.h.

◆ CoreDebug_DHCSR_S_RESET_ST_Msk [4/8]

#define CoreDebug_DHCSR_S_RESET_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)

CoreDebug DHCSR: S_RESET_ST Mask

Definition at line 1267 of file core_cm3.h.

◆ CoreDebug_DHCSR_S_RESET_ST_Msk [5/8]

#define CoreDebug_DHCSR_S_RESET_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)

CoreDebug DHCSR: S_RESET_ST Mask

Definition at line 1438 of file core_cm4.h.

◆ CoreDebug_DHCSR_S_RESET_ST_Msk [6/8]

#define CoreDebug_DHCSR_S_RESET_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)

CoreDebug DHCSR: S_RESET_ST Mask

Definition at line 1646 of file core_cm7.h.

◆ CoreDebug_DHCSR_S_RESET_ST_Msk [7/8]

#define CoreDebug_DHCSR_S_RESET_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)

CoreDebug DHCSR: S_RESET_ST Mask

Definition at line 1834 of file core_armv8mml.h.

◆ CoreDebug_DHCSR_S_RESET_ST_Msk [8/8]

#define CoreDebug_DHCSR_S_RESET_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)

CoreDebug DHCSR: S_RESET_ST Mask

Definition at line 1909 of file core_cm33.h.

◆ CoreDebug_DHCSR_S_RESET_ST_Pos [1/8]

#define CoreDebug_DHCSR_S_RESET_ST_Pos   25U

CoreDebug DHCSR: S_RESET_ST Position

Definition at line 1006 of file core_armv8mbl.h.

◆ CoreDebug_DHCSR_S_RESET_ST_Pos [2/8]

#define CoreDebug_DHCSR_S_RESET_ST_Pos   25U

CoreDebug DHCSR: S_RESET_ST Position

Definition at line 1081 of file core_cm23.h.

◆ CoreDebug_DHCSR_S_RESET_ST_Pos [3/8]

#define CoreDebug_DHCSR_S_RESET_ST_Pos   25U

CoreDebug DHCSR: S_RESET_ST Position

Definition at line 1246 of file core_sc300.h.

◆ CoreDebug_DHCSR_S_RESET_ST_Pos [4/8]

#define CoreDebug_DHCSR_S_RESET_ST_Pos   25U

CoreDebug DHCSR: S_RESET_ST Position

Definition at line 1266 of file core_cm3.h.

◆ CoreDebug_DHCSR_S_RESET_ST_Pos [5/8]

#define CoreDebug_DHCSR_S_RESET_ST_Pos   25U

CoreDebug DHCSR: S_RESET_ST Position

Definition at line 1437 of file core_cm4.h.

◆ CoreDebug_DHCSR_S_RESET_ST_Pos [6/8]

#define CoreDebug_DHCSR_S_RESET_ST_Pos   25U

CoreDebug DHCSR: S_RESET_ST Position

Definition at line 1645 of file core_cm7.h.

◆ CoreDebug_DHCSR_S_RESET_ST_Pos [7/8]

#define CoreDebug_DHCSR_S_RESET_ST_Pos   25U

CoreDebug DHCSR: S_RESET_ST Position

Definition at line 1833 of file core_armv8mml.h.

◆ CoreDebug_DHCSR_S_RESET_ST_Pos [8/8]

#define CoreDebug_DHCSR_S_RESET_ST_Pos   25U

CoreDebug DHCSR: S_RESET_ST Position

Definition at line 1908 of file core_cm33.h.

◆ CoreDebug_DHCSR_S_RESTART_ST_Msk [1/4]

#define CoreDebug_DHCSR_S_RESTART_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)

CoreDebug DHCSR: S_RESTART_ST Mask

Definition at line 1004 of file core_armv8mbl.h.

◆ CoreDebug_DHCSR_S_RESTART_ST_Msk [2/4]

#define CoreDebug_DHCSR_S_RESTART_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)

CoreDebug DHCSR: S_RESTART_ST Mask

Definition at line 1079 of file core_cm23.h.

◆ CoreDebug_DHCSR_S_RESTART_ST_Msk [3/4]

#define CoreDebug_DHCSR_S_RESTART_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)

CoreDebug DHCSR: S_RESTART_ST Mask

Definition at line 1831 of file core_armv8mml.h.

◆ CoreDebug_DHCSR_S_RESTART_ST_Msk [4/4]

#define CoreDebug_DHCSR_S_RESTART_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)

CoreDebug DHCSR: S_RESTART_ST Mask

Definition at line 1906 of file core_cm33.h.

◆ CoreDebug_DHCSR_S_RESTART_ST_Pos [1/4]

#define CoreDebug_DHCSR_S_RESTART_ST_Pos   26U

CoreDebug DHCSR: S_RESTART_ST Position

Definition at line 1003 of file core_armv8mbl.h.

◆ CoreDebug_DHCSR_S_RESTART_ST_Pos [2/4]

#define CoreDebug_DHCSR_S_RESTART_ST_Pos   26U

CoreDebug DHCSR: S_RESTART_ST Position

Definition at line 1078 of file core_cm23.h.

◆ CoreDebug_DHCSR_S_RESTART_ST_Pos [3/4]

#define CoreDebug_DHCSR_S_RESTART_ST_Pos   26U

CoreDebug DHCSR: S_RESTART_ST Position

Definition at line 1830 of file core_armv8mml.h.

◆ CoreDebug_DHCSR_S_RESTART_ST_Pos [4/4]

#define CoreDebug_DHCSR_S_RESTART_ST_Pos   26U

CoreDebug DHCSR: S_RESTART_ST Position

Definition at line 1905 of file core_cm33.h.

◆ CoreDebug_DHCSR_S_RETIRE_ST_Msk [1/8]

#define CoreDebug_DHCSR_S_RETIRE_ST_Msk   (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)

CoreDebug DHCSR: S_RETIRE_ST Mask

Definition at line 1010 of file core_armv8mbl.h.

◆ CoreDebug_DHCSR_S_RETIRE_ST_Msk [2/8]

#define CoreDebug_DHCSR_S_RETIRE_ST_Msk   (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)

CoreDebug DHCSR: S_RETIRE_ST Mask

Definition at line 1085 of file core_cm23.h.

◆ CoreDebug_DHCSR_S_RETIRE_ST_Msk [3/8]

#define CoreDebug_DHCSR_S_RETIRE_ST_Msk   (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)

CoreDebug DHCSR: S_RETIRE_ST Mask

Definition at line 1250 of file core_sc300.h.

◆ CoreDebug_DHCSR_S_RETIRE_ST_Msk [4/8]

#define CoreDebug_DHCSR_S_RETIRE_ST_Msk   (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)

CoreDebug DHCSR: S_RETIRE_ST Mask

Definition at line 1270 of file core_cm3.h.

◆ CoreDebug_DHCSR_S_RETIRE_ST_Msk [5/8]

#define CoreDebug_DHCSR_S_RETIRE_ST_Msk   (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)

CoreDebug DHCSR: S_RETIRE_ST Mask

Definition at line 1441 of file core_cm4.h.

◆ CoreDebug_DHCSR_S_RETIRE_ST_Msk [6/8]

#define CoreDebug_DHCSR_S_RETIRE_ST_Msk   (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)

CoreDebug DHCSR: S_RETIRE_ST Mask

Definition at line 1649 of file core_cm7.h.

◆ CoreDebug_DHCSR_S_RETIRE_ST_Msk [7/8]

#define CoreDebug_DHCSR_S_RETIRE_ST_Msk   (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)

CoreDebug DHCSR: S_RETIRE_ST Mask

Definition at line 1837 of file core_armv8mml.h.

◆ CoreDebug_DHCSR_S_RETIRE_ST_Msk [8/8]

#define CoreDebug_DHCSR_S_RETIRE_ST_Msk   (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)

CoreDebug DHCSR: S_RETIRE_ST Mask

Definition at line 1912 of file core_cm33.h.

◆ CoreDebug_DHCSR_S_RETIRE_ST_Pos [1/8]

#define CoreDebug_DHCSR_S_RETIRE_ST_Pos   24U

CoreDebug DHCSR: S_RETIRE_ST Position

Definition at line 1009 of file core_armv8mbl.h.

◆ CoreDebug_DHCSR_S_RETIRE_ST_Pos [2/8]

#define CoreDebug_DHCSR_S_RETIRE_ST_Pos   24U

CoreDebug DHCSR: S_RETIRE_ST Position

Definition at line 1084 of file core_cm23.h.

◆ CoreDebug_DHCSR_S_RETIRE_ST_Pos [3/8]

#define CoreDebug_DHCSR_S_RETIRE_ST_Pos   24U

CoreDebug DHCSR: S_RETIRE_ST Position

Definition at line 1249 of file core_sc300.h.

◆ CoreDebug_DHCSR_S_RETIRE_ST_Pos [4/8]

#define CoreDebug_DHCSR_S_RETIRE_ST_Pos   24U

CoreDebug DHCSR: S_RETIRE_ST Position

Definition at line 1269 of file core_cm3.h.

◆ CoreDebug_DHCSR_S_RETIRE_ST_Pos [5/8]

#define CoreDebug_DHCSR_S_RETIRE_ST_Pos   24U

CoreDebug DHCSR: S_RETIRE_ST Position

Definition at line 1440 of file core_cm4.h.

◆ CoreDebug_DHCSR_S_RETIRE_ST_Pos [6/8]

#define CoreDebug_DHCSR_S_RETIRE_ST_Pos   24U

CoreDebug DHCSR: S_RETIRE_ST Position

Definition at line 1648 of file core_cm7.h.

◆ CoreDebug_DHCSR_S_RETIRE_ST_Pos [7/8]

#define CoreDebug_DHCSR_S_RETIRE_ST_Pos   24U

CoreDebug DHCSR: S_RETIRE_ST Position

Definition at line 1836 of file core_armv8mml.h.

◆ CoreDebug_DHCSR_S_RETIRE_ST_Pos [8/8]

#define CoreDebug_DHCSR_S_RETIRE_ST_Pos   24U

CoreDebug DHCSR: S_RETIRE_ST Position

Definition at line 1911 of file core_cm33.h.

◆ CoreDebug_DHCSR_S_SLEEP_Msk [1/8]

#define CoreDebug_DHCSR_S_SLEEP_Msk   (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)

CoreDebug DHCSR: S_SLEEP Mask

Definition at line 1016 of file core_armv8mbl.h.

◆ CoreDebug_DHCSR_S_SLEEP_Msk [2/8]

#define CoreDebug_DHCSR_S_SLEEP_Msk   (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)

CoreDebug DHCSR: S_SLEEP Mask

Definition at line 1091 of file core_cm23.h.

◆ CoreDebug_DHCSR_S_SLEEP_Msk [3/8]

#define CoreDebug_DHCSR_S_SLEEP_Msk   (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)

CoreDebug DHCSR: S_SLEEP Mask

Definition at line 1256 of file core_sc300.h.

◆ CoreDebug_DHCSR_S_SLEEP_Msk [4/8]

#define CoreDebug_DHCSR_S_SLEEP_Msk   (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)

CoreDebug DHCSR: S_SLEEP Mask

Definition at line 1276 of file core_cm3.h.

◆ CoreDebug_DHCSR_S_SLEEP_Msk [5/8]

#define CoreDebug_DHCSR_S_SLEEP_Msk   (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)

CoreDebug DHCSR: S_SLEEP Mask

Definition at line 1447 of file core_cm4.h.

◆ CoreDebug_DHCSR_S_SLEEP_Msk [6/8]

#define CoreDebug_DHCSR_S_SLEEP_Msk   (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)

CoreDebug DHCSR: S_SLEEP Mask

Definition at line 1655 of file core_cm7.h.

◆ CoreDebug_DHCSR_S_SLEEP_Msk [7/8]

#define CoreDebug_DHCSR_S_SLEEP_Msk   (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)

CoreDebug DHCSR: S_SLEEP Mask

Definition at line 1843 of file core_armv8mml.h.

◆ CoreDebug_DHCSR_S_SLEEP_Msk [8/8]

#define CoreDebug_DHCSR_S_SLEEP_Msk   (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)

CoreDebug DHCSR: S_SLEEP Mask

Definition at line 1918 of file core_cm33.h.

◆ CoreDebug_DHCSR_S_SLEEP_Pos [1/8]

#define CoreDebug_DHCSR_S_SLEEP_Pos   18U

CoreDebug DHCSR: S_SLEEP Position

Definition at line 1015 of file core_armv8mbl.h.

◆ CoreDebug_DHCSR_S_SLEEP_Pos [2/8]

#define CoreDebug_DHCSR_S_SLEEP_Pos   18U

CoreDebug DHCSR: S_SLEEP Position

Definition at line 1090 of file core_cm23.h.

◆ CoreDebug_DHCSR_S_SLEEP_Pos [3/8]

#define CoreDebug_DHCSR_S_SLEEP_Pos   18U

CoreDebug DHCSR: S_SLEEP Position

Definition at line 1255 of file core_sc300.h.

◆ CoreDebug_DHCSR_S_SLEEP_Pos [4/8]

#define CoreDebug_DHCSR_S_SLEEP_Pos   18U

CoreDebug DHCSR: S_SLEEP Position

Definition at line 1275 of file core_cm3.h.

◆ CoreDebug_DHCSR_S_SLEEP_Pos [5/8]

#define CoreDebug_DHCSR_S_SLEEP_Pos   18U

CoreDebug DHCSR: S_SLEEP Position

Definition at line 1446 of file core_cm4.h.

◆ CoreDebug_DHCSR_S_SLEEP_Pos [6/8]

#define CoreDebug_DHCSR_S_SLEEP_Pos   18U

CoreDebug DHCSR: S_SLEEP Position

Definition at line 1654 of file core_cm7.h.

◆ CoreDebug_DHCSR_S_SLEEP_Pos [7/8]

#define CoreDebug_DHCSR_S_SLEEP_Pos   18U

CoreDebug DHCSR: S_SLEEP Position

Definition at line 1842 of file core_armv8mml.h.

◆ CoreDebug_DHCSR_S_SLEEP_Pos [8/8]

#define CoreDebug_DHCSR_S_SLEEP_Pos   18U

CoreDebug DHCSR: S_SLEEP Position

Definition at line 1917 of file core_cm33.h.

◆ CoreDebug_DSCSR_CDS_Msk [1/4]

#define CoreDebug_DSCSR_CDS_Msk   (1UL << CoreDebug_DSCSR_CDS_Pos)

CoreDebug DSCSR: CDS Mask

Definition at line 1068 of file core_armv8mbl.h.

◆ CoreDebug_DSCSR_CDS_Msk [2/4]

#define CoreDebug_DSCSR_CDS_Msk   (1UL << CoreDebug_DSCSR_CDS_Pos)

CoreDebug DSCSR: CDS Mask

Definition at line 1143 of file core_cm23.h.

◆ CoreDebug_DSCSR_CDS_Msk [3/4]

#define CoreDebug_DSCSR_CDS_Msk   (1UL << CoreDebug_DSCSR_CDS_Pos)

CoreDebug DSCSR: CDS Mask

Definition at line 1928 of file core_armv8mml.h.

◆ CoreDebug_DSCSR_CDS_Msk [4/4]

#define CoreDebug_DSCSR_CDS_Msk   (1UL << CoreDebug_DSCSR_CDS_Pos)

CoreDebug DSCSR: CDS Mask

Definition at line 2003 of file core_cm33.h.

◆ CoreDebug_DSCSR_CDS_Pos [1/4]

#define CoreDebug_DSCSR_CDS_Pos   16U

CoreDebug DSCSR: CDS Position

Definition at line 1067 of file core_armv8mbl.h.

◆ CoreDebug_DSCSR_CDS_Pos [2/4]

#define CoreDebug_DSCSR_CDS_Pos   16U

CoreDebug DSCSR: CDS Position

Definition at line 1142 of file core_cm23.h.

◆ CoreDebug_DSCSR_CDS_Pos [3/4]

#define CoreDebug_DSCSR_CDS_Pos   16U

CoreDebug DSCSR: CDS Position

Definition at line 1927 of file core_armv8mml.h.

◆ CoreDebug_DSCSR_CDS_Pos [4/4]

#define CoreDebug_DSCSR_CDS_Pos   16U

CoreDebug DSCSR: CDS Position

Definition at line 2002 of file core_cm33.h.

◆ CoreDebug_DSCSR_SBRSEL_Msk [1/4]

#define CoreDebug_DSCSR_SBRSEL_Msk   (1UL << CoreDebug_DSCSR_SBRSEL_Pos)

CoreDebug DSCSR: SBRSEL Mask

Definition at line 1071 of file core_armv8mbl.h.

◆ CoreDebug_DSCSR_SBRSEL_Msk [2/4]

#define CoreDebug_DSCSR_SBRSEL_Msk   (1UL << CoreDebug_DSCSR_SBRSEL_Pos)

CoreDebug DSCSR: SBRSEL Mask

Definition at line 1146 of file core_cm23.h.

◆ CoreDebug_DSCSR_SBRSEL_Msk [3/4]

#define CoreDebug_DSCSR_SBRSEL_Msk   (1UL << CoreDebug_DSCSR_SBRSEL_Pos)

CoreDebug DSCSR: SBRSEL Mask

Definition at line 1931 of file core_armv8mml.h.

◆ CoreDebug_DSCSR_SBRSEL_Msk [4/4]

#define CoreDebug_DSCSR_SBRSEL_Msk   (1UL << CoreDebug_DSCSR_SBRSEL_Pos)

CoreDebug DSCSR: SBRSEL Mask

Definition at line 2006 of file core_cm33.h.

◆ CoreDebug_DSCSR_SBRSEL_Pos [1/4]

#define CoreDebug_DSCSR_SBRSEL_Pos   1U

CoreDebug DSCSR: SBRSEL Position

Definition at line 1070 of file core_armv8mbl.h.

◆ CoreDebug_DSCSR_SBRSEL_Pos [2/4]

#define CoreDebug_DSCSR_SBRSEL_Pos   1U

CoreDebug DSCSR: SBRSEL Position

Definition at line 1145 of file core_cm23.h.

◆ CoreDebug_DSCSR_SBRSEL_Pos [3/4]

#define CoreDebug_DSCSR_SBRSEL_Pos   1U

CoreDebug DSCSR: SBRSEL Position

Definition at line 1930 of file core_armv8mml.h.

◆ CoreDebug_DSCSR_SBRSEL_Pos [4/4]

#define CoreDebug_DSCSR_SBRSEL_Pos   1U

CoreDebug DSCSR: SBRSEL Position

Definition at line 2005 of file core_cm33.h.

◆ CoreDebug_DSCSR_SBRSELEN_Msk [1/4]

#define CoreDebug_DSCSR_SBRSELEN_Msk   (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)

CoreDebug DSCSR: SBRSELEN Mask

Definition at line 1074 of file core_armv8mbl.h.

◆ CoreDebug_DSCSR_SBRSELEN_Msk [2/4]

#define CoreDebug_DSCSR_SBRSELEN_Msk   (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)

CoreDebug DSCSR: SBRSELEN Mask

Definition at line 1149 of file core_cm23.h.

◆ CoreDebug_DSCSR_SBRSELEN_Msk [3/4]

#define CoreDebug_DSCSR_SBRSELEN_Msk   (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)

CoreDebug DSCSR: SBRSELEN Mask

Definition at line 1934 of file core_armv8mml.h.

◆ CoreDebug_DSCSR_SBRSELEN_Msk [4/4]

#define CoreDebug_DSCSR_SBRSELEN_Msk   (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)

CoreDebug DSCSR: SBRSELEN Mask

Definition at line 2009 of file core_cm33.h.

◆ CoreDebug_DSCSR_SBRSELEN_Pos [1/4]

#define CoreDebug_DSCSR_SBRSELEN_Pos   0U

CoreDebug DSCSR: SBRSELEN Position

Definition at line 1073 of file core_armv8mbl.h.

◆ CoreDebug_DSCSR_SBRSELEN_Pos [2/4]

#define CoreDebug_DSCSR_SBRSELEN_Pos   0U

CoreDebug DSCSR: SBRSELEN Position

Definition at line 1148 of file core_cm23.h.

◆ CoreDebug_DSCSR_SBRSELEN_Pos [3/4]

#define CoreDebug_DSCSR_SBRSELEN_Pos   0U

CoreDebug DSCSR: SBRSELEN Position

Definition at line 1933 of file core_armv8mml.h.

◆ CoreDebug_DSCSR_SBRSELEN_Pos [4/4]

#define CoreDebug_DSCSR_SBRSELEN_Pos   0U

CoreDebug DSCSR: SBRSELEN Position

Definition at line 2008 of file core_cm33.h.