DIY Logging Volt/Ampmeter
stm32f1xx_ll_utils.h
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1 /**
2  ******************************************************************************
3  * @file stm32f1xx_ll_utils.h
4  * @author MCD Application Team
5  * @brief Header file of UTILS LL module.
6  @verbatim
7  ==============================================================================
8  ##### How to use this driver #####
9  ==============================================================================
10  [..]
11  The LL UTILS driver contains a set of generic APIs that can be
12  used by user:
13  (+) Device electronic signature
14  (+) Timing functions
15  (+) PLL configuration functions
16 
17  @endverbatim
18  ******************************************************************************
19  * @attention
20  *
21  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
22  * All rights reserved.</center></h2>
23  *
24  * This software component is licensed by ST under BSD 3-Clause license,
25  * the "License"; You may not use this file except in compliance with the
26  * License. You may obtain a copy of the License at:
27  * opensource.org/licenses/BSD-3-Clause
28  *
29  ******************************************************************************
30  */
31 
32 /* Define to prevent recursive inclusion -------------------------------------*/
33 #ifndef __STM32F1xx_LL_UTILS_H
34 #define __STM32F1xx_LL_UTILS_H
35 
36 #ifdef __cplusplus
37 extern "C" {
38 #endif
39 
40 /* Includes ------------------------------------------------------------------*/
41 #include "stm32f1xx.h"
42 
43 /** @addtogroup STM32F1xx_LL_Driver
44  * @{
45  */
46 
47 /** @defgroup UTILS_LL UTILS
48  * @{
49  */
50 
51 /* Private types -------------------------------------------------------------*/
52 /* Private variables ---------------------------------------------------------*/
53 
54 /* Private constants ---------------------------------------------------------*/
55 /** @defgroup UTILS_LL_Private_Constants UTILS Private Constants
56  * @{
57  */
58 
59 /* Max delay can be used in LL_mDelay */
60 #define LL_MAX_DELAY 0xFFFFFFFFU
61 
62 /**
63  * @brief Unique device ID register base address
64  */
65 #define UID_BASE_ADDRESS UID_BASE
66 
67 /**
68  * @brief Flash size data register base address
69  */
70 #define FLASHSIZE_BASE_ADDRESS FLASHSIZE_BASE
71 
72 /**
73  * @}
74  */
75 
76 /* Private macros ------------------------------------------------------------*/
77 /** @defgroup UTILS_LL_Private_Macros UTILS Private Macros
78  * @{
79  */
80 /**
81  * @}
82  */
83 /* Exported types ------------------------------------------------------------*/
84 /** @defgroup UTILS_LL_ES_INIT UTILS Exported structures
85  * @{
86  */
87 /**
88  * @brief UTILS PLL structure definition
89  */
90 typedef struct
91 {
92  uint32_t PLLMul; /*!< Multiplication factor for PLL VCO input clock.
93  This parameter can be a value of @ref RCC_LL_EC_PLL_MUL
94 
95  This feature can be modified afterwards using unitary function
96  @ref LL_RCC_PLL_ConfigDomain_SYS(). */
97 
98  uint32_t Prediv; /*!< Division factor for HSE used as PLL clock source.
99  This parameter can be a value of @ref RCC_LL_EC_PREDIV_DIV
100 
101  This feature can be modified afterwards using unitary function
102  @ref LL_RCC_PLL_ConfigDomain_SYS(). */
104 
105 /**
106  * @brief UTILS System, AHB and APB buses clock configuration structure definition
107  */
108 typedef struct
109 {
110  uint32_t AHBCLKDivider; /*!< The AHB clock (HCLK) divider. This clock is derived from the system clock (SYSCLK).
111  This parameter can be a value of @ref RCC_LL_EC_SYSCLK_DIV
112 
113  This feature can be modified afterwards using unitary function
114  @ref LL_RCC_SetAHBPrescaler(). */
115 
116  uint32_t APB1CLKDivider; /*!< The APB1 clock (PCLK1) divider. This clock is derived from the AHB clock (HCLK).
117  This parameter can be a value of @ref RCC_LL_EC_APB1_DIV
118 
119  This feature can be modified afterwards using unitary function
120  @ref LL_RCC_SetAPB1Prescaler(). */
121 
122  uint32_t APB2CLKDivider; /*!< The APB2 clock (PCLK2) divider. This clock is derived from the AHB clock (HCLK).
123  This parameter can be a value of @ref RCC_LL_EC_APB2_DIV
124 
125  This feature can be modified afterwards using unitary function
126  @ref LL_RCC_SetAPB2Prescaler(). */
127 
129 
130 /**
131  * @}
132  */
133 
134 /* Exported constants --------------------------------------------------------*/
135 /** @defgroup UTILS_LL_Exported_Constants UTILS Exported Constants
136  * @{
137  */
138 
139 /** @defgroup UTILS_EC_HSE_BYPASS HSE Bypass activation
140  * @{
141  */
142 #define LL_UTILS_HSEBYPASS_OFF 0x00000000U /*!< HSE Bypass is not enabled */
143 #define LL_UTILS_HSEBYPASS_ON 0x00000001U /*!< HSE Bypass is enabled */
144 /**
145  * @}
146  */
147 
148 /**
149  * @}
150  */
151 
152 /* Exported macro ------------------------------------------------------------*/
153 
154 /* Exported functions --------------------------------------------------------*/
155 /** @defgroup UTILS_LL_Exported_Functions UTILS Exported Functions
156  * @{
157  */
158 
159 /** @defgroup UTILS_EF_DEVICE_ELECTRONIC_SIGNATURE DEVICE ELECTRONIC SIGNATURE
160  * @{
161  */
162 
163 /**
164  * @brief Get Word0 of the unique device identifier (UID based on 96 bits)
165  * @retval UID[31:0]
166  */
168 {
169  return (uint32_t)(READ_REG(*((uint32_t *)UID_BASE_ADDRESS)));
170 }
171 
172 /**
173  * @brief Get Word1 of the unique device identifier (UID based on 96 bits)
174  * @retval UID[63:32]
175  */
177 {
178  return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 4U))));
179 }
180 
181 /**
182  * @brief Get Word2 of the unique device identifier (UID based on 96 bits)
183  * @retval UID[95:64]
184  */
186 {
187  return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 8U))));
188 }
189 
190 /**
191  * @brief Get Flash memory size
192  * @note This bitfield indicates the size of the device Flash memory expressed in
193  * Kbytes. As an example, 0x040 corresponds to 64 Kbytes.
194  * @retval FLASH_SIZE[15:0]: Flash memory size
195  */
197 {
198  return (uint16_t)(READ_REG(*((uint32_t *)FLASHSIZE_BASE_ADDRESS)));
199 }
200 
201 
202 /**
203  * @}
204  */
205 
206 /** @defgroup UTILS_LL_EF_DELAY DELAY
207  * @{
208  */
209 
210 /**
211  * @brief This function configures the Cortex-M SysTick source of the time base.
212  * @param HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro)
213  * @note When a RTOS is used, it is recommended to avoid changing the SysTick
214  * configuration by calling this function, for a delay use rather osDelay RTOS service.
215  * @param Ticks Number of ticks
216  * @retval None
217  */
218 __STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks)
219 {
220  /* Configure the SysTick to have interrupt in 1ms time base */
221  SysTick->LOAD = (uint32_t)((HCLKFrequency / Ticks) - 1UL); /* set reload register */
222  SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
224  SysTick_CTRL_ENABLE_Msk; /* Enable the Systick Timer */
225 }
226 
227 void LL_Init1msTick(uint32_t HCLKFrequency);
228 void LL_mDelay(uint32_t Delay);
229 
230 /**
231  * @}
232  */
233 
234 /** @defgroup UTILS_EF_SYSTEM SYSTEM
235  * @{
236  */
237 
238 void LL_SetSystemCoreClock(uint32_t HCLKFrequency);
239 #if defined(FLASH_ACR_LATENCY)
240 ErrorStatus LL_SetFlashLatency(uint32_t Frequency);
241 #endif /* FLASH_ACR_LATENCY */
243  LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
244 ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency, uint32_t HSEBypass,
245  LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct);
246 
247 /**
248  * @}
249  */
250 
251 /**
252  * @}
253  */
254 
255 /**
256  * @}
257  */
258 
259 /**
260  * @}
261  */
262 
263 #ifdef __cplusplus
264 }
265 #endif
266 
267 #endif /* __STM32F1xx_LL_UTILS_H */
268 
269 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
LL_InitTick
__STATIC_INLINE void LL_InitTick(uint32_t HCLKFrequency, uint32_t Ticks)
This function configures the Cortex-M SysTick source of the time base.
Definition: stm32f1xx_ll_utils.h:218
UID_BASE_ADDRESS
#define UID_BASE_ADDRESS
Unique device ID register base address.
Definition: stm32f1xx_ll_utils.h:65
LL_SetSystemCoreClock
void LL_SetSystemCoreClock(uint32_t HCLKFrequency)
This function sets directly SystemCoreClock CMSIS variable.
Definition: stm32f1xx_ll_utils.c:240
SysTick_CTRL_CLKSOURCE_Msk
#define SysTick_CTRL_CLKSOURCE_Msk
Definition: core_armv8mbl.h:571
LL_PLL_ConfigSystemClock_HSE
ErrorStatus LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency, uint32_t HSEBypass, LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct)
This function configures system clock with HSE as clock source of the PLL.
Definition: stm32f1xx_ll_utils.c:399
LL_UTILS_ClkInitTypeDef::APB2CLKDivider
uint32_t APB2CLKDivider
Definition: stm32f1xx_ll_utils.h:122
READ_REG
#define READ_REG(REG)
Definition: stm32f1xx.h:188
LL_UTILS_PLLInitTypeDef::Prediv
uint32_t Prediv
Definition: stm32f1xx_ll_utils.h:98
LL_mDelay
void LL_mDelay(uint32_t Delay)
This function provides accurate delay (in milliseconds) based on SysTick counter flag.
Definition: stm32f1xx_ll_utils.c:182
LL_GetUID_Word2
__STATIC_INLINE uint32_t LL_GetUID_Word2(void)
Get Word2 of the unique device identifier (UID based on 96 bits)
Definition: stm32f1xx_ll_utils.h:185
LL_GetUID_Word0
__STATIC_INLINE uint32_t LL_GetUID_Word0(void)
Get Word0 of the unique device identifier (UID based on 96 bits)
Definition: stm32f1xx_ll_utils.h:167
LL_PLL_ConfigSystemClock_HSI
ErrorStatus LL_PLL_ConfigSystemClock_HSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct, LL_UTILS_ClkInitTypeDef *UTILS_ClkInitStruct)
Update number of Flash wait states in line with new frequency and current voltage range.
Definition: stm32f1xx_ll_utils.c:334
__STATIC_INLINE
#define __STATIC_INLINE
Definition: cmsis_armcc.h:59
LL_UTILS_PLLInitTypeDef
UTILS PLL structure definition.
Definition: stm32f1xx_ll_utils.h:90
stm32f1xx.h
CMSIS STM32F1xx Device Peripheral Access Layer Header File.
LL_UTILS_ClkInitTypeDef::APB1CLKDivider
uint32_t APB1CLKDivider
Definition: stm32f1xx_ll_utils.h:116
LL_Init1msTick
void LL_Init1msTick(uint32_t HCLKFrequency)
This function configures the Cortex-M SysTick source to have 1ms time base.
Definition: stm32f1xx_ll_utils.c:166
SysTick_CTRL_ENABLE_Msk
#define SysTick_CTRL_ENABLE_Msk
Definition: core_armv8mbl.h:577
LL_UTILS_ClkInitTypeDef::AHBCLKDivider
uint32_t AHBCLKDivider
Definition: stm32f1xx_ll_utils.h:110
LL_GetFlashSize
__STATIC_INLINE uint32_t LL_GetFlashSize(void)
Get Flash memory size.
Definition: stm32f1xx_ll_utils.h:196
LL_UTILS_PLLInitTypeDef::PLLMul
uint32_t PLLMul
Definition: stm32f1xx_ll_utils.h:92
SysTick
#define SysTick
Definition: core_armv8mbl.h:1123
LL_UTILS_ClkInitTypeDef
UTILS System, AHB and APB buses clock configuration structure definition.
Definition: stm32f1xx_ll_utils.h:108
FLASHSIZE_BASE_ADDRESS
#define FLASHSIZE_BASE_ADDRESS
Flash size data register base address.
Definition: stm32f1xx_ll_utils.h:70
ErrorStatus
ErrorStatus
Definition: stm32f1xx.h:164
LL_GetUID_Word1
__STATIC_INLINE uint32_t LL_GetUID_Word1(void)
Get Word1 of the unique device identifier (UID based on 96 bits)
Definition: stm32f1xx_ll_utils.h:176