DIY Logging Volt/Ampmeter
stm32f1xx_ll_rtc.h
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1 /**
2  ******************************************************************************
3  * @file stm32f1xx_ll_rtc.h
4  * @author MCD Application Team
5  * @brief Header file of RTC LL module.
6  ******************************************************************************
7  * @attention
8  *
9  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
10  * All rights reserved.</center></h2>
11  *
12  * This software component is licensed by ST under BSD 3-Clause license,
13  * the "License"; You may not use this file except in compliance with the
14  * License. You may obtain a copy of the License at:
15  * opensource.org/licenses/BSD-3-Clause
16  *
17  ******************************************************************************
18  */
19 
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef __STM32F1xx_LL_RTC_H
22 #define __STM32F1xx_LL_RTC_H
23 
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27 
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm32f1xx.h"
30 
31 /** @addtogroup STM32F1xx_LL_Driver
32  * @{
33  */
34 
35 #if defined(RTC)
36 
37 /** @defgroup RTC_LL RTC
38  * @{
39  */
40 
41 /* Private types -------------------------------------------------------------*/
42 /* Private variables ---------------------------------------------------------*/
43 /* Private constants ---------------------------------------------------------*/
44 
45 /* Private macros ------------------------------------------------------------*/
46 #if defined(USE_FULL_LL_DRIVER)
47 /** @defgroup RTC_LL_Private_Macros RTC Private Macros
48  * @{
49  */
50 /**
51  * @}
52  */
53 #endif /*USE_FULL_LL_DRIVER*/
54 
55 /* Exported types ------------------------------------------------------------*/
56 #if defined(USE_FULL_LL_DRIVER)
57 /** @defgroup RTC_LL_ES_INIT RTC Exported Init structure
58  * @{
59  */
60 
61 /**
62  * @brief RTC Init structures definition
63  */
64 typedef struct
65 {
66  uint32_t AsynchPrescaler; /*!< Specifies the RTC Asynchronous Predivider value.
67  This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFFFFF
68 
69  This feature can be modified afterwards using unitary function
70  @ref LL_RTC_SetAsynchPrescaler(). */
71 
72  uint32_t OutPutSource; /*!< Specifies which signal will be routed to the RTC Tamper pin.
73  This parameter can be a value of @ref LL_RTC_Output_Source
74 
75  This feature can be modified afterwards using unitary function
76  @ref LL_RTC_SetOutputSource(). */
77 
78 } LL_RTC_InitTypeDef;
79 
80 /**
81  * @brief RTC Time structure definition
82  */
83 typedef struct
84 {
85  uint8_t Hours; /*!< Specifies the RTC Time Hours.
86  This parameter must be a number between Min_Data = 0 and Max_Data = 23 */
87 
88  uint8_t Minutes; /*!< Specifies the RTC Time Minutes.
89  This parameter must be a number between Min_Data = 0 and Max_Data = 59 */
90 
91  uint8_t Seconds; /*!< Specifies the RTC Time Seconds.
92  This parameter must be a number between Min_Data = 0 and Max_Data = 59 */
93 } LL_RTC_TimeTypeDef;
94 
95 
96 /**
97  * @brief RTC Alarm structure definition
98  */
99 typedef struct
100 {
101  LL_RTC_TimeTypeDef AlarmTime; /*!< Specifies the RTC Alarm Time members. */
102 
103 } LL_RTC_AlarmTypeDef;
104 
105 /**
106  * @}
107  */
108 #endif /* USE_FULL_LL_DRIVER */
109 
110 /* Exported constants --------------------------------------------------------*/
111 /** @defgroup RTC_LL_Exported_Constants RTC Exported Constants
112  * @{
113  */
114 
115 #if defined(USE_FULL_LL_DRIVER)
116 /** @defgroup RTC_LL_EC_FORMAT FORMAT
117  * @{
118  */
119 #define LL_RTC_FORMAT_BIN (0x000000000U) /*!< Binary data format */
120 #define LL_RTC_FORMAT_BCD (0x000000001U) /*!< BCD data format */
121 /**
122  * @}
123  */
124 #endif /* USE_FULL_LL_DRIVER */
125 
126 /** @defgroup RTC_LL_EC_BKP BACKUP
127  * @{
128  */
129 #if RTC_BKP_NUMBER > 0
130 #define LL_RTC_BKP_DR1 (0x00000001U)
131 #define LL_RTC_BKP_DR2 (0x00000002U)
132 #define LL_RTC_BKP_DR3 (0x00000003U)
133 #define LL_RTC_BKP_DR4 (0x00000004U)
134 #define LL_RTC_BKP_DR5 (0x00000005U)
135 #define LL_RTC_BKP_DR6 (0x00000006U)
136 #define LL_RTC_BKP_DR7 (0x00000007U)
137 #define LL_RTC_BKP_DR8 (0x00000008U)
138 #define LL_RTC_BKP_DR9 (0x00000009U)
139 #define LL_RTC_BKP_DR10 (0x0000000AU)
140 #endif /* RTC_BKP_NUMBER > 0 */
141 #if RTC_BKP_NUMBER > 10
142 #define LL_RTC_BKP_DR11 (0x0000000BU)
143 #define LL_RTC_BKP_DR12 (0x0000000CU)
144 #define LL_RTC_BKP_DR13 (0x0000000DU)
145 #define LL_RTC_BKP_DR14 (0x0000000EU)
146 #define LL_RTC_BKP_DR15 (0x0000000FU)
147 #define LL_RTC_BKP_DR16 (0x00000010U)
148 #define LL_RTC_BKP_DR17 (0x00000011U)
149 #define LL_RTC_BKP_DR18 (0x00000012U)
150 #define LL_RTC_BKP_DR19 (0x00000013U)
151 #define LL_RTC_BKP_DR20 (0x00000014U)
152 #define LL_RTC_BKP_DR21 (0x00000015U)
153 #define LL_RTC_BKP_DR22 (0x00000016U)
154 #define LL_RTC_BKP_DR23 (0x00000017U)
155 #define LL_RTC_BKP_DR24 (0x00000018U)
156 #define LL_RTC_BKP_DR25 (0x00000019U)
157 #define LL_RTC_BKP_DR26 (0x0000001AU)
158 #define LL_RTC_BKP_DR27 (0x0000001BU)
159 #define LL_RTC_BKP_DR28 (0x0000001CU)
160 #define LL_RTC_BKP_DR29 (0x0000001DU)
161 #define LL_RTC_BKP_DR30 (0x0000001EU)
162 #define LL_RTC_BKP_DR31 (0x0000001FU)
163 #define LL_RTC_BKP_DR32 (0x00000020U)
164 #define LL_RTC_BKP_DR33 (0x00000021U)
165 #define LL_RTC_BKP_DR34 (0x00000022U)
166 #define LL_RTC_BKP_DR35 (0x00000023U)
167 #define LL_RTC_BKP_DR36 (0x00000024U)
168 #define LL_RTC_BKP_DR37 (0x00000025U)
169 #define LL_RTC_BKP_DR38 (0x00000026U)
170 #define LL_RTC_BKP_DR39 (0x00000027U)
171 #define LL_RTC_BKP_DR40 (0x00000028U)
172 #define LL_RTC_BKP_DR41 (0x00000029U)
173 #define LL_RTC_BKP_DR42 (0x0000002AU)
174 #endif /* RTC_BKP_NUMBER > 10 */
175 
176 /**
177  * @}
178  */
179 
180 /** @defgroup RTC_LL_EC_TAMPLEVEL Tamper Active Level
181  * @{
182  */
183 #define LL_RTC_TAMPER_ACTIVELEVEL_LOW BKP_CR_TPAL /*!< A high level on the TAMPER pin resets all data backup registers (if TPE bit is set) */
184 #define LL_RTC_TAMPER_ACTIVELEVEL_HIGH (0x00000000U) /*!< A low level on the TAMPER pin resets all data backup registers (if TPE bit is set) */
185 
186 /**
187  * @}
188  */
189 
190 /** @defgroup LL_RTC_Output_Source Clock Source to output on the Tamper Pin
191  * @{
192  */
193 #define LL_RTC_CALIB_OUTPUT_NONE (0x00000000U) /*!< Calibration output disabled */
194 #define LL_RTC_CALIB_OUTPUT_RTCCLOCK BKP_RTCCR_CCO /*!< Calibration output is RTC Clock with a frequency divided by 64 on the TAMPER Pin */
195 #define LL_RTC_CALIB_OUTPUT_ALARM BKP_RTCCR_ASOE /*!< Calibration output is Alarm pulse signal on the TAMPER pin */
196 #define LL_RTC_CALIB_OUTPUT_SECOND (BKP_RTCCR_ASOS | BKP_RTCCR_ASOE) /*!< Calibration output is Second pulse signal on the TAMPER pin*/
197 /**
198  * @}
199  */
200 
201 /**
202  * @}
203  */
204 
205 /* Exported macro ------------------------------------------------------------*/
206 /** @defgroup RTC_LL_Exported_Macros RTC Exported Macros
207  * @{
208  */
209 
210 /** @defgroup RTC_LL_EM_WRITE_READ Common Write and read registers Macros
211  * @{
212  */
213 
214 /**
215  * @brief Write a value in RTC register
216  * @param __INSTANCE__ RTC Instance
217  * @param __REG__ Register to be written
218  * @param __VALUE__ Value to be written in the register
219  * @retval None
220  */
221 #define LL_RTC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
222 
223 /**
224  * @brief Read a value in RTC register
225  * @param __INSTANCE__ RTC Instance
226  * @param __REG__ Register to be read
227  * @retval Register value
228  */
229 #define LL_RTC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
230 /**
231  * @}
232  */
233 
234 /** @defgroup RTC_LL_EM_Convert Convert helper Macros
235  * @{
236  */
237 
238 /**
239  * @brief Helper macro to convert a value from 2 digit decimal format to BCD format
240  * @param __VALUE__ Byte to be converted
241  * @retval Converted byte
242  */
243 #define __LL_RTC_CONVERT_BIN2BCD(__VALUE__) (uint8_t)((((__VALUE__) / 10U) << 4U) | ((__VALUE__) % 10U))
244 
245 /**
246  * @brief Helper macro to convert a value from BCD format to 2 digit decimal format
247  * @param __VALUE__ BCD value to be converted
248  * @retval Converted byte
249  */
250 #define __LL_RTC_CONVERT_BCD2BIN(__VALUE__) (uint8_t)(((uint8_t)((__VALUE__) & (uint8_t)0xF0U) >> (uint8_t)0x4U) * 10U + ((__VALUE__) & (uint8_t)0x0FU))
251 
252 /**
253  * @}
254  */
255 
256 /**
257  * @}
258  */
259 
260 /* Exported functions --------------------------------------------------------*/
261 /** @defgroup RTC_LL_Exported_Functions RTC Exported Functions
262  * @{
263  */
264 
265 /** @defgroup RTC_LL_EF_Configuration Configuration
266  * @{
267  */
268 
269 /**
270  * @brief Set Asynchronous prescaler factor
271  * @rmtoll PRLH PRL LL_RTC_SetAsynchPrescaler\n
272  * @rmtoll PRLL PRL LL_RTC_SetAsynchPrescaler\n
273  * @param RTCx RTC Instance
274  * @param AsynchPrescaler Value between Min_Data = 0 and Max_Data = 0xFFFFF
275  * @retval None
276  */
277 __STATIC_INLINE void LL_RTC_SetAsynchPrescaler(RTC_TypeDef *RTCx, uint32_t AsynchPrescaler)
278 {
279  MODIFY_REG(RTCx->PRLH, RTC_PRLH_PRL, (AsynchPrescaler >> 16));
280  MODIFY_REG(RTCx->PRLL, RTC_PRLL_PRL, (AsynchPrescaler & RTC_PRLL_PRL));
281 }
282 
283 /**
284  * @brief Get Asynchronous prescaler factor
285  * @rmtoll DIVH DIV LL_RTC_GetDivider\n
286  * @rmtoll DIVL DIV LL_RTC_GetDivider\n
287  * @param RTCx RTC Instance
288  * @retval Value between Min_Data = 0 and Max_Data = 0xFFFFF
289  */
290 __STATIC_INLINE uint32_t LL_RTC_GetDivider(RTC_TypeDef *RTCx)
291 {
292  register uint16_t Highprescaler = 0, Lowprescaler = 0;
293  Highprescaler = READ_REG(RTCx->DIVH & RTC_DIVH_RTC_DIV);
294  Lowprescaler = READ_REG(RTCx->DIVL & RTC_DIVL_RTC_DIV);
295 
296  return (((uint32_t) Highprescaler << 16U) | Lowprescaler);
297 }
298 
299 /**
300  * @brief Set Output Source
301  * @rmtoll RTCCR CCO LL_RTC_SetOutputSource
302  * @rmtoll RTCCR ASOE LL_RTC_SetOutputSource
303  * @rmtoll RTCCR ASOS LL_RTC_SetOutputSource
304  * @param BKPx BKP Instance
305  * @param OutputSource This parameter can be one of the following values:
306  * @arg @ref LL_RTC_CALIB_OUTPUT_NONE
307  * @arg @ref LL_RTC_CALIB_OUTPUT_RTCCLOCK
308  * @arg @ref LL_RTC_CALIB_OUTPUT_ALARM
309  * @arg @ref LL_RTC_CALIB_OUTPUT_SECOND
310  * @retval None
311  */
312 __STATIC_INLINE void LL_RTC_SetOutputSource(BKP_TypeDef *BKPx, uint32_t OutputSource)
313 {
314  MODIFY_REG(BKPx->RTCCR, (BKP_RTCCR_CCO | BKP_RTCCR_ASOE | BKP_RTCCR_ASOS), OutputSource);
315 }
316 
317 /**
318  * @brief Get Output Source
319  * @rmtoll RTCCR CCO LL_RTC_GetOutPutSource
320  * @rmtoll RTCCR ASOE LL_RTC_GetOutPutSource
321  * @rmtoll RTCCR ASOS LL_RTC_GetOutPutSource
322  * @param BKPx BKP Instance
323  * @retval Returned value can be one of the following values:
324  * @arg @ref LL_RTC_CALIB_OUTPUT_NONE
325  * @arg @ref LL_RTC_CALIB_OUTPUT_RTCCLOCK
326  * @arg @ref LL_RTC_CALIB_OUTPUT_ALARM
327  * @arg @ref LL_RTC_CALIB_OUTPUT_SECOND
328  */
329 __STATIC_INLINE uint32_t LL_RTC_GetOutPutSource(BKP_TypeDef *BKPx)
330 {
331  return (uint32_t)(READ_BIT(BKPx->RTCCR, (BKP_RTCCR_CCO | BKP_RTCCR_ASOE | BKP_RTCCR_ASOS)));
332 }
333 
334 /**
335  * @brief Enable the write protection for RTC registers.
336  * @rmtoll CRL CNF LL_RTC_EnableWriteProtection
337  * @param RTCx RTC Instance
338  * @retval None
339  */
340 __STATIC_INLINE void LL_RTC_EnableWriteProtection(RTC_TypeDef *RTCx)
341 {
342  CLEAR_BIT(RTCx->CRL, RTC_CRL_CNF);
343 }
344 
345 /**
346  * @brief Disable the write protection for RTC registers.
347  * @rmtoll CRL RTC_CRL_CNF LL_RTC_DisableWriteProtection
348  * @param RTCx RTC Instance
349  * @retval None
350  */
351 __STATIC_INLINE void LL_RTC_DisableWriteProtection(RTC_TypeDef *RTCx)
352 {
353  SET_BIT(RTCx->CRL, RTC_CRL_CNF);
354 }
355 
356 /**
357  * @}
358  */
359 
360 /** @defgroup RTC_LL_EF_Time Time
361  * @{
362  */
363 
364 /**
365  * @brief Set time counter in BCD format
366  * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
367  * @note It can be written in initialization mode only (@ref LL_RTC_EnterInitMode function)
368  * @rmtoll CNTH CNT LL_RTC_TIME_Set\n
369  * CNTL CNT LL_RTC_TIME_Set\n
370  * @param RTCx RTC Instance
371  * @param TimeCounter Value between Min_Data=0x00 and Max_Data=0xFFFFF
372  * @retval None
373  */
374 __STATIC_INLINE void LL_RTC_TIME_Set(RTC_TypeDef *RTCx, uint32_t TimeCounter)
375 {
376  /* Set RTC COUNTER MSB word */
377  WRITE_REG(RTCx->CNTH, (TimeCounter >> 16U));
378  /* Set RTC COUNTER LSB word */
379  WRITE_REG(RTCx->CNTL, (TimeCounter & RTC_CNTL_RTC_CNT));
380 }
381 
382 /**
383  * @brief Get time counter in BCD format
384  * @rmtoll CNTH CNT LL_RTC_TIME_Get\n
385  * CNTL CNT LL_RTC_TIME_Get\n
386  * @param RTCx RTC Instance
387  * @retval Value between Min_Data = 0 and Max_Data = 0xFFFFF
388  */
389 __STATIC_INLINE uint32_t LL_RTC_TIME_Get(RTC_TypeDef *RTCx)
390 {
391  register uint16_t high = 0, low = 0;
392 
393  high = READ_REG(RTCx->CNTH & RTC_CNTH_RTC_CNT);
394  low = READ_REG(RTCx->CNTL & RTC_CNTL_RTC_CNT);
395  return ((uint32_t)(((uint32_t) high << 16U) | low));
396 }
397 
398 /**
399  * @}
400  */
401 
402 /** @defgroup RTC_LL_EF_ALARM ALARM
403  * @{
404  */
405 
406 /**
407  * @brief Set Alarm Counter
408  * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
409  * @rmtoll ALRH ALR LL_RTC_ALARM_Set\n
410  * @rmtoll ALRL ALR LL_RTC_ALARM_Set\n
411  * @param RTCx RTC Instance
412  * @param AlarmCounter Value between Min_Data=0x00 and Max_Data=0xFFFFF
413  * @retval None
414  */
415 __STATIC_INLINE void LL_RTC_ALARM_Set(RTC_TypeDef *RTCx, uint32_t AlarmCounter)
416 {
417  /* Set RTC COUNTER MSB word */
418  WRITE_REG(RTCx->ALRH, (AlarmCounter >> 16));
419  /* Set RTC COUNTER LSB word */
420  WRITE_REG(RTCx->ALRL, (AlarmCounter & RTC_ALRL_RTC_ALR));
421 }
422 
423 /**
424  * @brief Get Alarm Counter
425  * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
426  * @rmtoll ALRH ALR LL_RTC_ALARM_Get\n
427  * @rmtoll ALRL ALR LL_RTC_ALARM_Get\n
428  * @param RTCx RTC Instance
429  * @retval None
430  */
431 __STATIC_INLINE uint32_t LL_RTC_ALARM_Get(RTC_TypeDef *RTCx)
432 {
433  register uint16_t high = 0, low = 0;
434 
435  high = READ_REG(RTCx->ALRH & RTC_ALRH_RTC_ALR);
436  low = READ_REG(RTCx->ALRL & RTC_ALRL_RTC_ALR);
437 
438  return (((uint32_t) high << 16U) | low);
439 }
440 
441 /**
442  * @}
443  */
444 
445 /** @defgroup RTC_LL_EF_Tamper Tamper
446  * @{
447  */
448 
449 /**
450  * @brief Enable RTC_TAMPx input detection
451  * @rmtoll CR TPE LL_RTC_TAMPER_Enable\n
452  * @retval None
453  */
454 __STATIC_INLINE void LL_RTC_TAMPER_Enable(BKP_TypeDef *BKPx)
455 {
456  SET_BIT(BKPx->CR, BKP_CR_TPE);
457 }
458 
459 /**
460  * @brief Disable RTC_TAMPx Tamper
461  * @rmtoll CR TPE LL_RTC_TAMPER_Disable\n
462  * @retval None
463  */
464 __STATIC_INLINE void LL_RTC_TAMPER_Disable(BKP_TypeDef *BKPx)
465 {
466  CLEAR_BIT(BKP->CR, BKP_CR_TPE);
467 }
468 
469 /**
470  * @brief Enable Active level for Tamper input
471  * @rmtoll CR TPAL LL_RTC_TAMPER_SetActiveLevel\n
472  * @param BKPx BKP Instance
473  * @param Tamper This parameter can be a combination of the following values:
474  * @arg @ref LL_RTC_TAMPER_ACTIVELEVEL_LOW
475  * @arg @ref LL_RTC_TAMPER_ACTIVELEVEL_HIGH
476  * @retval None
477  */
478 __STATIC_INLINE void LL_RTC_TAMPER_SetActiveLevel(BKP_TypeDef *BKPx, uint32_t Tamper)
479 {
480  MODIFY_REG(BKPx->CR, BKP_CR_TPAL, Tamper);
481 }
482 
483 /**
484  * @brief Disable Active level for Tamper input
485  * @rmtoll CR TPAL LL_RTC_TAMPER_SetActiveLevel\n
486  * @retval None
487  */
488 __STATIC_INLINE uint32_t LL_RTC_TAMPER_GetActiveLevel(BKP_TypeDef *BKPx)
489 {
490  return (uint32_t)(READ_BIT(BKPx->CR, BKP_CR_TPAL));
491 }
492 
493 /**
494  * @}
495  */
496 
497 /** @defgroup RTC_LL_EF_Backup_Registers Backup_Registers
498  * @{
499  */
500 
501 /**
502  * @brief Writes a data in a specified RTC Backup data register.
503  * @rmtoll BKPDR DR LL_RTC_BKP_SetRegister
504  * @param BKPx BKP Instance
505  * @param BackupRegister This parameter can be one of the following values:
506  * @arg @ref LL_RTC_BKP_DR1
507  * @arg @ref LL_RTC_BKP_DR2
508  * @arg @ref LL_RTC_BKP_DR3
509  * @arg @ref LL_RTC_BKP_DR4
510  * @arg @ref LL_RTC_BKP_DR5
511  * @arg @ref LL_RTC_BKP_DR6
512  * @arg @ref LL_RTC_BKP_DR7
513  * @arg @ref LL_RTC_BKP_DR8
514  * @arg @ref LL_RTC_BKP_DR9
515  * @arg @ref LL_RTC_BKP_DR10
516  * @arg @ref LL_RTC_BKP_DR11 (*)
517  * @arg @ref LL_RTC_BKP_DR12 (*)
518  * @arg @ref LL_RTC_BKP_DR13 (*)
519  * @arg @ref LL_RTC_BKP_DR14 (*)
520  * @arg @ref LL_RTC_BKP_DR15 (*)
521  * @arg @ref LL_RTC_BKP_DR16 (*)
522  * @arg @ref LL_RTC_BKP_DR17 (*)
523  * @arg @ref LL_RTC_BKP_DR18 (*)
524  * @arg @ref LL_RTC_BKP_DR19 (*)
525  * @arg @ref LL_RTC_BKP_DR20 (*)
526  * @arg @ref LL_RTC_BKP_DR21 (*)
527  * @arg @ref LL_RTC_BKP_DR22 (*)
528  * @arg @ref LL_RTC_BKP_DR23 (*)
529  * @arg @ref LL_RTC_BKP_DR24 (*)
530  * @arg @ref LL_RTC_BKP_DR25 (*)
531  * @arg @ref LL_RTC_BKP_DR26 (*)
532  * @arg @ref LL_RTC_BKP_DR27 (*)
533  * @arg @ref LL_RTC_BKP_DR28 (*)
534  * @arg @ref LL_RTC_BKP_DR29 (*)
535  * @arg @ref LL_RTC_BKP_DR30 (*)
536  * @arg @ref LL_RTC_BKP_DR31 (*)
537  * @arg @ref LL_RTC_BKP_DR32 (*)
538  * @arg @ref LL_RTC_BKP_DR33 (*)
539  * @arg @ref LL_RTC_BKP_DR34 (*)
540  * @arg @ref LL_RTC_BKP_DR35 (*)
541  * @arg @ref LL_RTC_BKP_DR36 (*)
542  * @arg @ref LL_RTC_BKP_DR37 (*)
543  * @arg @ref LL_RTC_BKP_DR38 (*)
544  * @arg @ref LL_RTC_BKP_DR39 (*)
545  * @arg @ref LL_RTC_BKP_DR40 (*)
546  * @arg @ref LL_RTC_BKP_DR41 (*)
547  * @arg @ref LL_RTC_BKP_DR42 (*)
548  * (*) value not defined in all devices.
549  * @param Data Value between Min_Data=0x00 and Max_Data=0xFFFFFFFF
550  * @retval None
551  */
552 __STATIC_INLINE void LL_RTC_BKP_SetRegister(BKP_TypeDef *BKPx, uint32_t BackupRegister, uint32_t Data)
553 {
554  register uint32_t tmp = 0U;
555 
556  tmp = (uint32_t)BKP_BASE;
557  tmp += (BackupRegister * 4U);
558 
559  /* Write the specified register */
560  *(__IO uint32_t *)tmp = (uint32_t)Data;
561 }
562 
563 /**
564  * @brief Reads data from the specified RTC Backup data Register.
565  * @rmtoll BKPDR DR LL_RTC_BKP_GetRegister
566  * @param BKPx BKP Instance
567  * @param BackupRegister This parameter can be one of the following values:
568  * @arg @ref LL_RTC_BKP_DR1
569  * @arg @ref LL_RTC_BKP_DR2
570  * @arg @ref LL_RTC_BKP_DR3
571  * @arg @ref LL_RTC_BKP_DR4
572  * @arg @ref LL_RTC_BKP_DR5
573  * @arg @ref LL_RTC_BKP_DR6
574  * @arg @ref LL_RTC_BKP_DR7
575  * @arg @ref LL_RTC_BKP_DR8
576  * @arg @ref LL_RTC_BKP_DR9
577  * @arg @ref LL_RTC_BKP_DR10
578  * @arg @ref LL_RTC_BKP_DR11 (*)
579  * @arg @ref LL_RTC_BKP_DR12 (*)
580  * @arg @ref LL_RTC_BKP_DR13 (*)
581  * @arg @ref LL_RTC_BKP_DR14 (*)
582  * @arg @ref LL_RTC_BKP_DR15 (*)
583  * @arg @ref LL_RTC_BKP_DR16 (*)
584  * @arg @ref LL_RTC_BKP_DR17 (*)
585  * @arg @ref LL_RTC_BKP_DR18 (*)
586  * @arg @ref LL_RTC_BKP_DR19 (*)
587  * @arg @ref LL_RTC_BKP_DR20 (*)
588  * @arg @ref LL_RTC_BKP_DR21 (*)
589  * @arg @ref LL_RTC_BKP_DR22 (*)
590  * @arg @ref LL_RTC_BKP_DR23 (*)
591  * @arg @ref LL_RTC_BKP_DR24 (*)
592  * @arg @ref LL_RTC_BKP_DR25 (*)
593  * @arg @ref LL_RTC_BKP_DR26 (*)
594  * @arg @ref LL_RTC_BKP_DR27 (*)
595  * @arg @ref LL_RTC_BKP_DR28 (*)
596  * @arg @ref LL_RTC_BKP_DR29 (*)
597  * @arg @ref LL_RTC_BKP_DR30 (*)
598  * @arg @ref LL_RTC_BKP_DR31 (*)
599  * @arg @ref LL_RTC_BKP_DR32 (*)
600  * @arg @ref LL_RTC_BKP_DR33 (*)
601  * @arg @ref LL_RTC_BKP_DR34 (*)
602  * @arg @ref LL_RTC_BKP_DR35 (*)
603  * @arg @ref LL_RTC_BKP_DR36 (*)
604  * @arg @ref LL_RTC_BKP_DR37 (*)
605  * @arg @ref LL_RTC_BKP_DR38 (*)
606  * @arg @ref LL_RTC_BKP_DR39 (*)
607  * @arg @ref LL_RTC_BKP_DR40 (*)
608  * @arg @ref LL_RTC_BKP_DR41 (*)
609  * @arg @ref LL_RTC_BKP_DR42 (*)
610  * @retval Value between Min_Data=0x00 and Max_Data=0xFFFFFFFF
611  */
612 __STATIC_INLINE uint32_t LL_RTC_BKP_GetRegister(BKP_TypeDef *BKPx, uint32_t BackupRegister)
613 {
614  register uint32_t tmp = 0U;
615 
616  tmp = (uint32_t)BKP_BASE;
617  tmp += (BackupRegister * 4U);
618 
619  /* Read the specified register */
620  return ((*(__IO uint32_t *)tmp) & BKP_DR1_D);
621 }
622 
623 /**
624  * @}
625  */
626 
627 /** @defgroup RTC_LL_EF_Calibration Calibration
628  * @{
629  */
630 
631 /**
632  * @brief Set the coarse digital calibration
633  * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
634  * @note It can be written in initialization mode only (@ref LL_RTC_EnterInitMode function)
635  * @rmtoll RTCCR CAL LL_RTC_CAL_SetCoarseDigital\n
636  * @param BKPx RTC Instance
637  * @param Value value of coarse calibration expressed in ppm (coded on 5 bits)
638  * @note This Calibration value should be between 0 and 121 when using positive sign with a 4-ppm step.
639  * @retval None
640  */
641 __STATIC_INLINE void LL_RTC_CAL_SetCoarseDigital(BKP_TypeDef *BKPx, uint32_t Value)
642 {
643  MODIFY_REG(BKPx->RTCCR, BKP_RTCCR_CAL, Value);
644 }
645 
646 /**
647  * @brief Get the coarse digital calibration value
648  * @rmtoll RTCCR CAL LL_RTC_CAL_SetCoarseDigital\n
649  * @param BKPx BKP Instance
650  * @retval value of coarse calibration expressed in ppm (coded on 5 bits)
651  */
652 __STATIC_INLINE uint32_t LL_RTC_CAL_GetCoarseDigital(BKP_TypeDef *BKPx)
653 {
654  return (uint32_t)(READ_BIT(BKPx->RTCCR, BKP_RTCCR_CAL));
655 }
656 /**
657  * @}
658  */
659 
660 /** @defgroup RTC_LL_EF_FLAG_Management FLAG_Management
661  * @{
662  */
663 
664 /**
665  * @brief Get RTC_TAMPI Interruption detection flag
666  * @rmtoll CSR TIF LL_RTC_IsActiveFlag_TAMPI
667  * @param BKPx BKP Instance
668  * @retval State of bit (1 or 0).
669  */
670 __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMPI(BKP_TypeDef *BKPx)
671 {
672  return (READ_BIT(BKPx->CSR, BKP_CSR_TIF) == (BKP_CSR_TIF));
673 }
674 
675 /**
676  * @brief Clear RTC_TAMP Interruption detection flag
677  * @rmtoll CSR CTI LL_RTC_ClearFlag_TAMPI
678  * @param BKPx BKP Instance
679  * @retval None
680  */
681 __STATIC_INLINE void LL_RTC_ClearFlag_TAMPI(BKP_TypeDef *BKPx)
682 {
683  SET_BIT(BKPx->CSR, BKP_CSR_CTI);
684 }
685 
686 /**
687  * @brief Get RTC_TAMPE Event detection flag
688  * @rmtoll CSR TEF LL_RTC_IsActiveFlag_TAMPE
689  * @param BKPx BKP Instance
690  * @retval State of bit (1 or 0).
691  */
692 __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_TAMPE(BKP_TypeDef *BKPx)
693 {
694  return (READ_BIT(BKPx->CSR, BKP_CSR_TEF) == (BKP_CSR_TEF));
695 }
696 
697 /**
698  * @brief Clear RTC_TAMPE Even detection flag
699  * @rmtoll CSR CTE LL_RTC_ClearFlag_TAMPE
700  * @param BKPx BKP Instance
701  * @retval None
702  */
703 __STATIC_INLINE void LL_RTC_ClearFlag_TAMPE(BKP_TypeDef *BKPx)
704 {
705  SET_BIT(BKPx->CSR, BKP_CSR_CTE);
706 }
707 
708 /**
709  * @brief Get Alarm flag
710  * @rmtoll CRL ALRF LL_RTC_IsActiveFlag_ALR
711  * @param RTCx RTC Instance
712  * @retval State of bit (1 or 0).
713  */
714 __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_ALR(RTC_TypeDef *RTCx)
715 {
716  return (READ_BIT(RTCx->CRL, RTC_CRL_ALRF) == (RTC_CRL_ALRF));
717 }
718 
719 /**
720  * @brief Clear Alarm flag
721  * @rmtoll CRL ALRF LL_RTC_ClearFlag_ALR
722  * @param RTCx RTC Instance
723  * @retval None
724  */
725 __STATIC_INLINE void LL_RTC_ClearFlag_ALR(RTC_TypeDef *RTCx)
726 {
727  CLEAR_BIT(RTCx->CRL, RTC_CRL_ALRF);
728 }
729 
730 /**
731  * @brief Get Registers synchronization flag
732  * @rmtoll CRL RSF LL_RTC_IsActiveFlag_RS
733  * @param RTCx RTC Instance
734  * @retval State of bit (1 or 0).
735  */
736 __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_RS(RTC_TypeDef *RTCx)
737 {
738  return (READ_BIT(RTCx->CRL, RTC_CRL_RSF) == (RTC_CRL_RSF));
739 }
740 
741 /**
742  * @brief Clear Registers synchronization flag
743  * @rmtoll CRL RSF LL_RTC_ClearFlag_RS
744  * @param RTCx RTC Instance
745  * @retval None
746  */
747 __STATIC_INLINE void LL_RTC_ClearFlag_RS(RTC_TypeDef *RTCx)
748 {
749  CLEAR_BIT(RTCx->CRL, RTC_CRL_RSF);
750 }
751 
752 /**
753  * @brief Get Registers OverFlow flag
754  * @rmtoll CRL OWF LL_RTC_IsActiveFlag_OW
755  * @param RTCx RTC Instance
756  * @retval State of bit (1 or 0).
757  */
758 __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_OW(RTC_TypeDef *RTCx)
759 {
760  return (READ_BIT(RTCx->CRL, RTC_CRL_OWF) == (RTC_CRL_OWF));
761 }
762 
763 /**
764  * @brief Clear Registers OverFlow flag
765  * @rmtoll CRL OWF LL_RTC_ClearFlag_OW
766  * @param RTCx RTC Instance
767  * @retval None
768  */
769 __STATIC_INLINE void LL_RTC_ClearFlag_OW(RTC_TypeDef *RTCx)
770 {
771  CLEAR_BIT(RTCx->CRL, RTC_CRL_OWF);
772 }
773 
774 /**
775  * @brief Get Registers synchronization flag
776  * @rmtoll CRL SECF LL_RTC_IsActiveFlag_SEC
777  * @param RTCx RTC Instance
778  * @retval State of bit (1 or 0).
779  */
780 __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_SEC(RTC_TypeDef *RTCx)
781 {
782  return (READ_BIT(RTCx->CRL, RTC_CRL_SECF) == (RTC_CRL_SECF));
783 }
784 
785 /**
786  * @brief Clear Registers synchronization flag
787  * @rmtoll CRL SECF LL_RTC_ClearFlag_SEC
788  * @param RTCx RTC Instance
789  * @retval None
790  */
791 __STATIC_INLINE void LL_RTC_ClearFlag_SEC(RTC_TypeDef *RTCx)
792 {
793  CLEAR_BIT(RTCx->CRL, RTC_CRL_SECF);
794 }
795 
796 /**
797  * @brief Get RTC Operation OFF status flag
798  * @rmtoll CRL RTOFF LL_RTC_IsActiveFlag_RTOF
799  * @param RTCx RTC Instance
800  * @retval State of bit (1 or 0).
801  */
802 __STATIC_INLINE uint32_t LL_RTC_IsActiveFlag_RTOF(RTC_TypeDef *RTCx)
803 {
804  return (READ_BIT(RTCx->CRL, RTC_CRL_RTOFF) == (RTC_CRL_RTOFF));
805 }
806 
807 /**
808  * @}
809  */
810 
811 /** @defgroup RTC_LL_EF_IT_Management IT_Management
812  * @{
813  */
814 
815 /**
816  * @brief Enable Alarm interrupt
817  * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
818  * @rmtoll CRH ALRIE LL_RTC_EnableIT_ALR
819  * @param RTCx RTC Instance
820  * @retval None
821  */
822 __STATIC_INLINE void LL_RTC_EnableIT_ALR(RTC_TypeDef *RTCx)
823 {
824  SET_BIT(RTCx->CRH, RTC_CRH_ALRIE);
825 }
826 
827 /**
828  * @brief Disable Alarm interrupt
829  * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
830  * @rmtoll CRH ALRIE LL_RTC_DisableIT_ALR
831  * @param RTCx RTC Instance
832  * @retval None
833  */
834 __STATIC_INLINE void LL_RTC_DisableIT_ALR(RTC_TypeDef *RTCx)
835 {
836  CLEAR_BIT(RTCx->CRH, RTC_CRH_ALRIE);
837 }
838 
839 /**
840  * @brief Check if Alarm interrupt is enabled or not
841  * @rmtoll CRH ALRIE LL_RTC_IsEnabledIT_ALR
842  * @param RTCx RTC Instance
843  * @retval State of bit (1 or 0).
844  */
845 __STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_ALR(RTC_TypeDef *RTCx)
846 {
847  return (READ_BIT(RTCx->CRH, RTC_CRH_ALRIE) == (RTC_CRH_ALRIE));
848 }
849 
850 /**
851  * @brief Enable Second Interrupt interrupt
852  * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
853  * @rmtoll CRH SECIE LL_RTC_EnableIT_SEC
854  * @param RTCx RTC Instance
855  * @retval None
856  */
857 __STATIC_INLINE void LL_RTC_EnableIT_SEC(RTC_TypeDef *RTCx)
858 {
859  SET_BIT(RTCx->CRH, RTC_CRH_SECIE);
860 }
861 
862 /**
863  * @brief Disable Second interrupt
864  * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
865  * @rmtoll CRH SECIE LL_RTC_DisableIT_SEC
866  * @param RTCx RTC Instance
867  * @retval None
868  */
869 __STATIC_INLINE void LL_RTC_DisableIT_SEC(RTC_TypeDef *RTCx)
870 {
871  CLEAR_BIT(RTCx->CRH, RTC_CRH_SECIE);
872 }
873 
874 /**
875  * @brief Check if Second interrupt is enabled or not
876  * @rmtoll CRH SECIE LL_RTC_IsEnabledIT_SEC
877  * @param RTCx RTC Instance
878  * @retval State of bit (1 or 0).
879  */
880 __STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_SEC(RTC_TypeDef *RTCx)
881 {
882  return (READ_BIT(RTCx->CRH, RTC_CRH_SECIE) == (RTC_CRH_SECIE));
883 }
884 
885 /**
886  * @brief Enable OverFlow interrupt
887  * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
888  * @rmtoll CRH OWIE LL_RTC_EnableIT_OW
889  * @param RTCx RTC Instance
890  * @retval None
891  */
892 __STATIC_INLINE void LL_RTC_EnableIT_OW(RTC_TypeDef *RTCx)
893 {
894  SET_BIT(RTCx->CRH, RTC_CRH_OWIE);
895 }
896 
897 /**
898  * @brief Disable OverFlow interrupt
899  * @note Bit is write-protected. @ref LL_RTC_DisableWriteProtection function should be called before.
900  * @rmtoll CRH OWIE LL_RTC_DisableIT_OW
901  * @param RTCx RTC Instance
902  * @retval None
903  */
904 __STATIC_INLINE void LL_RTC_DisableIT_OW(RTC_TypeDef *RTCx)
905 {
906  CLEAR_BIT(RTCx->CRH, RTC_CRH_OWIE);
907 }
908 
909 /**
910  * @brief Check if OverFlow interrupt is enabled or not
911  * @rmtoll CRH OWIE LL_RTC_IsEnabledIT_OW
912  * @param RTCx RTC Instance
913  * @retval State of bit (1 or 0).
914  */
915 __STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_OW(RTC_TypeDef *RTCx)
916 {
917  return (READ_BIT(RTCx->CRH, RTC_CRH_OWIE) == (RTC_CRH_OWIE));
918 }
919 
920 /**
921  * @brief Enable Tamper interrupt
922  * @rmtoll CSR TPIE LL_RTC_EnableIT_TAMP
923  * @param BKPx BKP Instance
924  * @retval None
925  */
926 __STATIC_INLINE void LL_RTC_EnableIT_TAMP(BKP_TypeDef *BKPx)
927 {
928  SET_BIT(BKPx->CSR, BKP_CSR_TPIE);
929 }
930 
931 /**
932  * @brief Disable Tamper interrupt
933  * @rmtoll CSR TPIE LL_RTC_EnableIT_TAMP
934  * @param BKPx BKP Instance
935  * @retval None
936  */
937 __STATIC_INLINE void LL_RTC_DisableIT_TAMP(BKP_TypeDef *BKPx)
938 {
939  CLEAR_BIT(BKPx->CSR, BKP_CSR_TPIE);
940 }
941 
942 /**
943  * @brief Check if all the TAMPER interrupts are enabled or not
944  * @rmtoll CSR TPIE LL_RTC_IsEnabledIT_TAMP
945  * @param BKPx BKP Instance
946  * @retval State of bit (1 or 0).
947  */
948 __STATIC_INLINE uint32_t LL_RTC_IsEnabledIT_TAMP(BKP_TypeDef *BKPx)
949 {
950  return (READ_BIT(BKPx->CSR, BKP_CSR_TPIE) == BKP_CSR_TPIE);
951 }
952 /**
953  * @}
954  */
955 
956 #if defined(USE_FULL_LL_DRIVER)
957 /** @defgroup RTC_LL_EF_Init Initialization and de-initialization functions
958  * @{
959  */
960 
961 ErrorStatus LL_RTC_DeInit(RTC_TypeDef *RTCx);
962 ErrorStatus LL_RTC_Init(RTC_TypeDef *RTCx, LL_RTC_InitTypeDef *RTC_InitStruct);
963 void LL_RTC_StructInit(LL_RTC_InitTypeDef *RTC_InitStruct);
964 ErrorStatus LL_RTC_TIME_Init(RTC_TypeDef *RTCx, uint32_t RTC_Format, LL_RTC_TimeTypeDef *RTC_TimeStruct);
965 void LL_RTC_TIME_StructInit(LL_RTC_TimeTypeDef *RTC_TimeStruct);
966 ErrorStatus LL_RTC_ALARM_Init(RTC_TypeDef *RTCx, uint32_t RTC_Format, LL_RTC_AlarmTypeDef *RTC_AlarmStruct);
967 void LL_RTC_ALARM_StructInit(LL_RTC_AlarmTypeDef *RTC_AlarmStruct);
968 ErrorStatus LL_RTC_EnterInitMode(RTC_TypeDef *RTCx);
969 ErrorStatus LL_RTC_ExitInitMode(RTC_TypeDef *RTCx);
970 ErrorStatus LL_RTC_WaitForSynchro(RTC_TypeDef *RTCx);
971 ErrorStatus LL_RTC_TIME_SetCounter(RTC_TypeDef *RTCx, uint32_t TimeCounter);
972 ErrorStatus LL_RTC_ALARM_SetCounter(RTC_TypeDef *RTCx, uint32_t AlarmCounter);
973 
974 /**
975  * @}
976  */
977 #endif /* USE_FULL_LL_DRIVER */
978 
979 /**
980  * @}
981  */
982 
983 /**
984  * @}
985  */
986 
987 /**
988  * @}
989  */
990 
991 #endif /* defined(RTC) */
992 
993 /**
994  * @}
995  */
996 
997 #ifdef __cplusplus
998 }
999 #endif
1000 
1001 #endif /* __STM32F1xx_LL_RTC_H */
1002 
1003 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
RTC_CRH_ALRIE
#define RTC_CRH_ALRIE
Definition: stm32f103xb.h:4347
RTC_CRL_OWF
#define RTC_CRL_OWF
Definition: stm32f103xb.h:4361
BKP_CSR_TEF
#define BKP_CSR_TEF
Definition: stm32f103xb.h:889
RTC_CRH_OWIE
#define RTC_CRH_OWIE
Definition: stm32f103xb.h:4350
RTC_CRH_SECIE
#define RTC_CRH_SECIE
Definition: stm32f103xb.h:4344
BKP_TypeDef::CSR
__IO uint32_t CSR
Definition: stm32f103xb.h:196
BKP_RTCCR_ASOS
#define BKP_RTCCR_ASOS
Definition: stm32f103xb.h:867
READ_BIT
#define READ_BIT(REG, BIT)
Definition: stm32f1xx.h:182
BKP_RTCCR_ASOE
#define BKP_RTCCR_ASOE
Definition: stm32f103xb.h:864
RTC_CRL_RTOFF
#define RTC_CRL_RTOFF
Definition: stm32f103xb.h:4370
READ_REG
#define READ_REG(REG)
Definition: stm32f1xx.h:188
RTC_CRL_CNF
#define RTC_CRL_CNF
Definition: stm32f103xb.h:4367
RTC_TypeDef::ALRH
__IO uint32_t ALRH
Definition: stm32f103xb.h:454
RTC_TypeDef::DIVL
__IO uint32_t DIVL
Definition: stm32f103xb.h:451
BKP_CSR_TPIE
#define BKP_CSR_TPIE
Definition: stm32f103xb.h:886
BKP_DR1_D
#define BKP_DR1_D
Definition: stm32f103xb.h:806
RTC_ALRL_RTC_ALR
#define RTC_ALRL_RTC_ALR
Definition: stm32f103xb.h:4410
BKP_TypeDef::CR
__IO uint32_t CR
Definition: stm32f103xb.h:195
RTC_TypeDef::DIVH
__IO uint32_t DIVH
Definition: stm32f103xb.h:450
BKP_CR_TPE
#define BKP_CR_TPE
Definition: stm32f103xb.h:872
BKP_TypeDef
Backup Registers
Definition: stm32f103xb.h:181
MODIFY_REG
#define MODIFY_REG(REG, CLEARMASK, SETMASK)
Definition: stm32f1xx.h:190
RTC_TypeDef::CRH
__IO uint32_t CRH
Definition: stm32f103xb.h:446
RTC_TypeDef::PRLH
__IO uint32_t PRLH
Definition: stm32f103xb.h:448
RTC_CRL_ALRF
#define RTC_CRL_ALRF
Definition: stm32f103xb.h:4358
RTC_DIVH_RTC_DIV
#define RTC_DIVH_RTC_DIV
Definition: stm32f103xb.h:4385
__STATIC_INLINE
#define __STATIC_INLINE
Definition: cmsis_armcc.h:59
RTC_TypeDef::CNTH
__IO uint32_t CNTH
Definition: stm32f103xb.h:452
RTC_PRLH_PRL
#define RTC_PRLH_PRL
Definition: stm32f103xb.h:4375
BKP
#define BKP
Definition: stm32f103xb.h:661
RTC_CNTL_RTC_CNT
#define RTC_CNTL_RTC_CNT
Definition: stm32f103xb.h:4400
BKP_RTCCR_CAL
#define BKP_RTCCR_CAL
Definition: stm32f103xb.h:858
BKP_CSR_TIF
#define BKP_CSR_TIF
Definition: stm32f103xb.h:892
WRITE_REG
#define WRITE_REG(REG, VAL)
Definition: stm32f1xx.h:186
BKP_RTCCR_CCO
#define BKP_RTCCR_CCO
Definition: stm32f103xb.h:861
RTC_ALRH_RTC_ALR
#define RTC_ALRH_RTC_ALR
Definition: stm32f103xb.h:4405
stm32f1xx.h
CMSIS STM32F1xx Device Peripheral Access Layer Header File.
__IO
#define __IO
Definition: core_armv8mbl.h:196
RTC_DIVL_RTC_DIV
#define RTC_DIVL_RTC_DIV
Definition: stm32f103xb.h:4390
BKP_BASE
#define BKP_BASE
Definition: stm32f103xb.h:599
RTC_CRL_RSF
#define RTC_CRL_RSF
Definition: stm32f103xb.h:4364
RTC_CRL_SECF
#define RTC_CRL_SECF
Definition: stm32f103xb.h:4355
BKP_CSR_CTE
#define BKP_CSR_CTE
Definition: stm32f103xb.h:880
RTC_TypeDef::CNTL
__IO uint32_t CNTL
Definition: stm32f103xb.h:453
BKP_CSR_CTI
#define BKP_CSR_CTI
Definition: stm32f103xb.h:883
RTC_TypeDef::ALRL
__IO uint32_t ALRL
Definition: stm32f103xb.h:455
SET_BIT
#define SET_BIT(REG, BIT)
Definition: stm32f1xx.h:178
RTC_PRLL_PRL
#define RTC_PRLL_PRL
Definition: stm32f103xb.h:4380
RTC_TypeDef::CRL
__IO uint32_t CRL
Definition: stm32f103xb.h:447
BKP_CR_TPAL
#define BKP_CR_TPAL
Definition: stm32f103xb.h:875
CLEAR_BIT
#define CLEAR_BIT(REG, BIT)
Definition: stm32f1xx.h:180
BKP_TypeDef::RTCCR
__IO uint32_t RTCCR
Definition: stm32f103xb.h:194
RTC_TypeDef
Real-Time Clock.
Definition: stm32f103xb.h:444
ErrorStatus
ErrorStatus
Definition: stm32f1xx.h:164
RTC_CNTH_RTC_CNT
#define RTC_CNTH_RTC_CNT
Definition: stm32f103xb.h:4395
RTC_TypeDef::PRLL
__IO uint32_t PRLL
Definition: stm32f103xb.h:449