DIY Logging Volt/Ampmeter
Macros
Peripheral_memory_map
CMSIS » Stm32f103xb

Macros

#define FLASH_BASE   0x08000000UL
 
#define FLASH_BANK1_END   0x0801FFFFUL
 
#define SRAM_BASE   0x20000000UL
 
#define PERIPH_BASE   0x40000000UL
 
#define SRAM_BB_BASE   0x22000000UL
 
#define PERIPH_BB_BASE   0x42000000UL
 
#define APB1PERIPH_BASE   PERIPH_BASE
 
#define APB2PERIPH_BASE   (PERIPH_BASE + 0x00010000UL)
 
#define AHBPERIPH_BASE   (PERIPH_BASE + 0x00020000UL)
 
#define TIM2_BASE   (APB1PERIPH_BASE + 0x00000000UL)
 
#define TIM3_BASE   (APB1PERIPH_BASE + 0x00000400UL)
 
#define TIM4_BASE   (APB1PERIPH_BASE + 0x00000800UL)
 
#define RTC_BASE   (APB1PERIPH_BASE + 0x00002800UL)
 
#define WWDG_BASE   (APB1PERIPH_BASE + 0x00002C00UL)
 
#define IWDG_BASE   (APB1PERIPH_BASE + 0x00003000UL)
 
#define SPI2_BASE   (APB1PERIPH_BASE + 0x00003800UL)
 
#define USART2_BASE   (APB1PERIPH_BASE + 0x00004400UL)
 
#define USART3_BASE   (APB1PERIPH_BASE + 0x00004800UL)
 
#define I2C1_BASE   (APB1PERIPH_BASE + 0x00005400UL)
 
#define I2C2_BASE   (APB1PERIPH_BASE + 0x00005800UL)
 
#define CAN1_BASE   (APB1PERIPH_BASE + 0x00006400UL)
 
#define BKP_BASE   (APB1PERIPH_BASE + 0x00006C00UL)
 
#define PWR_BASE   (APB1PERIPH_BASE + 0x00007000UL)
 
#define AFIO_BASE   (APB2PERIPH_BASE + 0x00000000UL)
 
#define EXTI_BASE   (APB2PERIPH_BASE + 0x00000400UL)
 
#define GPIOA_BASE   (APB2PERIPH_BASE + 0x00000800UL)
 
#define GPIOB_BASE   (APB2PERIPH_BASE + 0x00000C00UL)
 
#define GPIOC_BASE   (APB2PERIPH_BASE + 0x00001000UL)
 
#define GPIOD_BASE   (APB2PERIPH_BASE + 0x00001400UL)
 
#define GPIOE_BASE   (APB2PERIPH_BASE + 0x00001800UL)
 
#define ADC1_BASE   (APB2PERIPH_BASE + 0x00002400UL)
 
#define ADC2_BASE   (APB2PERIPH_BASE + 0x00002800UL)
 
#define TIM1_BASE   (APB2PERIPH_BASE + 0x00002C00UL)
 
#define SPI1_BASE   (APB2PERIPH_BASE + 0x00003000UL)
 
#define USART1_BASE   (APB2PERIPH_BASE + 0x00003800UL)
 
#define DMA1_BASE   (AHBPERIPH_BASE + 0x00000000UL)
 
#define DMA1_Channel1_BASE   (AHBPERIPH_BASE + 0x00000008UL)
 
#define DMA1_Channel2_BASE   (AHBPERIPH_BASE + 0x0000001CUL)
 
#define DMA1_Channel3_BASE   (AHBPERIPH_BASE + 0x00000030UL)
 
#define DMA1_Channel4_BASE   (AHBPERIPH_BASE + 0x00000044UL)
 
#define DMA1_Channel5_BASE   (AHBPERIPH_BASE + 0x00000058UL)
 
#define DMA1_Channel6_BASE   (AHBPERIPH_BASE + 0x0000006CUL)
 
#define DMA1_Channel7_BASE   (AHBPERIPH_BASE + 0x00000080UL)
 
#define RCC_BASE   (AHBPERIPH_BASE + 0x00001000UL)
 
#define CRC_BASE   (AHBPERIPH_BASE + 0x00003000UL)
 
#define FLASH_R_BASE   (AHBPERIPH_BASE + 0x00002000UL)
 
#define FLASHSIZE_BASE   0x1FFFF7E0UL
 
#define UID_BASE   0x1FFFF7E8UL
 
#define OB_BASE   0x1FFFF800UL
 
#define DBGMCU_BASE   0xE0042000UL
 
#define USB_BASE   (APB1PERIPH_BASE + 0x00005C00UL)
 
#define USB_PMAADDR   (APB1PERIPH_BASE + 0x00006000UL)
 

Detailed Description

Macro Definition Documentation

◆ ADC1_BASE

#define ADC1_BASE   (APB2PERIPH_BASE + 0x00002400UL)

Definition at line 608 of file stm32f103xb.h.

◆ ADC2_BASE

#define ADC2_BASE   (APB2PERIPH_BASE + 0x00002800UL)

Definition at line 609 of file stm32f103xb.h.

◆ AFIO_BASE

#define AFIO_BASE   (APB2PERIPH_BASE + 0x00000000UL)

Definition at line 601 of file stm32f103xb.h.

◆ AHBPERIPH_BASE

#define AHBPERIPH_BASE   (PERIPH_BASE + 0x00020000UL)

Definition at line 585 of file stm32f103xb.h.

◆ APB1PERIPH_BASE

#define APB1PERIPH_BASE   PERIPH_BASE

Definition at line 583 of file stm32f103xb.h.

◆ APB2PERIPH_BASE

#define APB2PERIPH_BASE   (PERIPH_BASE + 0x00010000UL)

Definition at line 584 of file stm32f103xb.h.

◆ BKP_BASE

#define BKP_BASE   (APB1PERIPH_BASE + 0x00006C00UL)

Definition at line 599 of file stm32f103xb.h.

◆ CAN1_BASE

#define CAN1_BASE   (APB1PERIPH_BASE + 0x00006400UL)

Definition at line 598 of file stm32f103xb.h.

◆ CRC_BASE

#define CRC_BASE   (AHBPERIPH_BASE + 0x00003000UL)

Definition at line 624 of file stm32f103xb.h.

◆ DBGMCU_BASE

#define DBGMCU_BASE   0xE0042000UL

Debug MCU registers base address

Definition at line 633 of file stm32f103xb.h.

◆ DMA1_BASE

#define DMA1_BASE   (AHBPERIPH_BASE + 0x00000000UL)

Definition at line 615 of file stm32f103xb.h.

◆ DMA1_Channel1_BASE

#define DMA1_Channel1_BASE   (AHBPERIPH_BASE + 0x00000008UL)

Definition at line 616 of file stm32f103xb.h.

◆ DMA1_Channel2_BASE

#define DMA1_Channel2_BASE   (AHBPERIPH_BASE + 0x0000001CUL)

Definition at line 617 of file stm32f103xb.h.

◆ DMA1_Channel3_BASE

#define DMA1_Channel3_BASE   (AHBPERIPH_BASE + 0x00000030UL)

Definition at line 618 of file stm32f103xb.h.

◆ DMA1_Channel4_BASE

#define DMA1_Channel4_BASE   (AHBPERIPH_BASE + 0x00000044UL)

Definition at line 619 of file stm32f103xb.h.

◆ DMA1_Channel5_BASE

#define DMA1_Channel5_BASE   (AHBPERIPH_BASE + 0x00000058UL)

Definition at line 620 of file stm32f103xb.h.

◆ DMA1_Channel6_BASE

#define DMA1_Channel6_BASE   (AHBPERIPH_BASE + 0x0000006CUL)

Definition at line 621 of file stm32f103xb.h.

◆ DMA1_Channel7_BASE

#define DMA1_Channel7_BASE   (AHBPERIPH_BASE + 0x00000080UL)

Definition at line 622 of file stm32f103xb.h.

◆ EXTI_BASE

#define EXTI_BASE   (APB2PERIPH_BASE + 0x00000400UL)

Definition at line 602 of file stm32f103xb.h.

◆ FLASH_BANK1_END

#define FLASH_BANK1_END   0x0801FFFFUL

FLASH END address of bank1

Definition at line 574 of file stm32f103xb.h.

◆ FLASH_BASE

#define FLASH_BASE   0x08000000UL

FLASH base address in the alias region

Definition at line 573 of file stm32f103xb.h.

◆ FLASH_R_BASE

#define FLASH_R_BASE   (AHBPERIPH_BASE + 0x00002000UL)

Flash registers base address

Definition at line 626 of file stm32f103xb.h.

◆ FLASHSIZE_BASE

#define FLASHSIZE_BASE   0x1FFFF7E0UL

FLASH Size register base address

Definition at line 627 of file stm32f103xb.h.

◆ GPIOA_BASE

#define GPIOA_BASE   (APB2PERIPH_BASE + 0x00000800UL)

Definition at line 603 of file stm32f103xb.h.

◆ GPIOB_BASE

#define GPIOB_BASE   (APB2PERIPH_BASE + 0x00000C00UL)

Definition at line 604 of file stm32f103xb.h.

◆ GPIOC_BASE

#define GPIOC_BASE   (APB2PERIPH_BASE + 0x00001000UL)

Definition at line 605 of file stm32f103xb.h.

◆ GPIOD_BASE

#define GPIOD_BASE   (APB2PERIPH_BASE + 0x00001400UL)

Definition at line 606 of file stm32f103xb.h.

◆ GPIOE_BASE

#define GPIOE_BASE   (APB2PERIPH_BASE + 0x00001800UL)

Definition at line 607 of file stm32f103xb.h.

◆ I2C1_BASE

#define I2C1_BASE   (APB1PERIPH_BASE + 0x00005400UL)

Definition at line 596 of file stm32f103xb.h.

◆ I2C2_BASE

#define I2C2_BASE   (APB1PERIPH_BASE + 0x00005800UL)

Definition at line 597 of file stm32f103xb.h.

◆ IWDG_BASE

#define IWDG_BASE   (APB1PERIPH_BASE + 0x00003000UL)

Definition at line 592 of file stm32f103xb.h.

◆ OB_BASE

#define OB_BASE   0x1FFFF800UL

Flash Option Bytes base address

Definition at line 629 of file stm32f103xb.h.

◆ PERIPH_BASE

#define PERIPH_BASE   0x40000000UL

Peripheral base address in the alias region

Definition at line 576 of file stm32f103xb.h.

◆ PERIPH_BB_BASE

#define PERIPH_BB_BASE   0x42000000UL

Peripheral base address in the bit-band region Peripheral memory map

Definition at line 579 of file stm32f103xb.h.

◆ PWR_BASE

#define PWR_BASE   (APB1PERIPH_BASE + 0x00007000UL)

Definition at line 600 of file stm32f103xb.h.

◆ RCC_BASE

#define RCC_BASE   (AHBPERIPH_BASE + 0x00001000UL)

Definition at line 623 of file stm32f103xb.h.

◆ RTC_BASE

#define RTC_BASE   (APB1PERIPH_BASE + 0x00002800UL)

Definition at line 590 of file stm32f103xb.h.

◆ SPI1_BASE

#define SPI1_BASE   (APB2PERIPH_BASE + 0x00003000UL)

Definition at line 611 of file stm32f103xb.h.

◆ SPI2_BASE

#define SPI2_BASE   (APB1PERIPH_BASE + 0x00003800UL)

Definition at line 593 of file stm32f103xb.h.

◆ SRAM_BASE

#define SRAM_BASE   0x20000000UL

SRAM base address in the alias region

Definition at line 575 of file stm32f103xb.h.

◆ SRAM_BB_BASE

#define SRAM_BB_BASE   0x22000000UL

SRAM base address in the bit-band region

Definition at line 578 of file stm32f103xb.h.

◆ TIM1_BASE

#define TIM1_BASE   (APB2PERIPH_BASE + 0x00002C00UL)

Definition at line 610 of file stm32f103xb.h.

◆ TIM2_BASE

#define TIM2_BASE   (APB1PERIPH_BASE + 0x00000000UL)

Definition at line 587 of file stm32f103xb.h.

◆ TIM3_BASE

#define TIM3_BASE   (APB1PERIPH_BASE + 0x00000400UL)

Definition at line 588 of file stm32f103xb.h.

◆ TIM4_BASE

#define TIM4_BASE   (APB1PERIPH_BASE + 0x00000800UL)

Definition at line 589 of file stm32f103xb.h.

◆ UID_BASE

#define UID_BASE   0x1FFFF7E8UL

Unique device ID register base address

Definition at line 628 of file stm32f103xb.h.

◆ USART1_BASE

#define USART1_BASE   (APB2PERIPH_BASE + 0x00003800UL)

Definition at line 612 of file stm32f103xb.h.

◆ USART2_BASE

#define USART2_BASE   (APB1PERIPH_BASE + 0x00004400UL)

Definition at line 594 of file stm32f103xb.h.

◆ USART3_BASE

#define USART3_BASE   (APB1PERIPH_BASE + 0x00004800UL)

Definition at line 595 of file stm32f103xb.h.

◆ USB_BASE

#define USB_BASE   (APB1PERIPH_BASE + 0x00005C00UL)

USB_IP Peripheral Registers base address

Definition at line 636 of file stm32f103xb.h.

◆ USB_PMAADDR

#define USB_PMAADDR   (APB1PERIPH_BASE + 0x00006000UL)

USB_IP Packet Memory Area base address

Definition at line 637 of file stm32f103xb.h.

◆ WWDG_BASE

#define WWDG_BASE   (APB1PERIPH_BASE + 0x00002C00UL)

Definition at line 591 of file stm32f103xb.h.