DIY Logging Volt/Ampmeter
stm32f1xx_ll_usart.h
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1 /**
2  ******************************************************************************
3  * @file stm32f1xx_ll_usart.h
4  * @author MCD Application Team
5  * @brief Header file of USART LL module.
6  ******************************************************************************
7  * @attention
8  *
9  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
10  * All rights reserved.</center></h2>
11  *
12  * This software component is licensed by ST under BSD 3-Clause license,
13  * the "License"; You may not use this file except in compliance with the
14  * License. You may obtain a copy of the License at:
15  * opensource.org/licenses/BSD-3-Clause
16  *
17  ******************************************************************************
18  */
19 
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef __STM32F1xx_LL_USART_H
22 #define __STM32F1xx_LL_USART_H
23 
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27 
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm32f1xx.h"
30 
31 /** @addtogroup STM32F1xx_LL_Driver
32  * @{
33  */
34 
35 #if defined (USART1) || defined (USART2) || defined (USART3) || defined (UART4) || defined (UART5)
36 
37 /** @defgroup USART_LL USART
38  * @{
39  */
40 
41 /* Private types -------------------------------------------------------------*/
42 /* Private variables ---------------------------------------------------------*/
43 
44 /* Private constants ---------------------------------------------------------*/
45 /** @defgroup USART_LL_Private_Constants USART Private Constants
46  * @{
47  */
48 
49 /* Defines used for the bit position in the register and perform offsets*/
50 #define USART_POSITION_GTPR_GT USART_GTPR_GT_Pos
51 /**
52  * @}
53  */
54 
55 /* Private macros ------------------------------------------------------------*/
56 #if defined(USE_FULL_LL_DRIVER)
57 /** @defgroup USART_LL_Private_Macros USART Private Macros
58  * @{
59  */
60 /**
61  * @}
62  */
63 #endif /*USE_FULL_LL_DRIVER*/
64 
65 /* Exported types ------------------------------------------------------------*/
66 #if defined(USE_FULL_LL_DRIVER)
67 /** @defgroup USART_LL_ES_INIT USART Exported Init structures
68  * @{
69  */
70 
71 /**
72  * @brief LL USART Init Structure definition
73  */
74 typedef struct
75 {
76  uint32_t BaudRate; /*!< This field defines expected Usart communication baud rate.
77 
78  This feature can be modified afterwards using unitary function @ref LL_USART_SetBaudRate().*/
79 
80  uint32_t DataWidth; /*!< Specifies the number of data bits transmitted or received in a frame.
81  This parameter can be a value of @ref USART_LL_EC_DATAWIDTH.
82 
83  This feature can be modified afterwards using unitary function @ref LL_USART_SetDataWidth().*/
84 
85  uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
86  This parameter can be a value of @ref USART_LL_EC_STOPBITS.
87 
88  This feature can be modified afterwards using unitary function @ref LL_USART_SetStopBitsLength().*/
89 
90  uint32_t Parity; /*!< Specifies the parity mode.
91  This parameter can be a value of @ref USART_LL_EC_PARITY.
92 
93  This feature can be modified afterwards using unitary function @ref LL_USART_SetParity().*/
94 
95  uint32_t TransferDirection; /*!< Specifies whether the Receive and/or Transmit mode is enabled or disabled.
96  This parameter can be a value of @ref USART_LL_EC_DIRECTION.
97 
98  This feature can be modified afterwards using unitary function @ref LL_USART_SetTransferDirection().*/
99 
100  uint32_t HardwareFlowControl; /*!< Specifies whether the hardware flow control mode is enabled or disabled.
101  This parameter can be a value of @ref USART_LL_EC_HWCONTROL.
102 
103  This feature can be modified afterwards using unitary function @ref LL_USART_SetHWFlowCtrl().*/
104 
105  uint32_t OverSampling; /*!< Specifies whether USART oversampling mode is 16 or 8.
106  This parameter can be a value of @ref USART_LL_EC_OVERSAMPLING.
107 
108  This feature can be modified afterwards using unitary function @ref LL_USART_SetOverSampling().*/
109 
110 } LL_USART_InitTypeDef;
111 
112 /**
113  * @brief LL USART Clock Init Structure definition
114  */
115 typedef struct
116 {
117  uint32_t ClockOutput; /*!< Specifies whether the USART clock is enabled or disabled.
118  This parameter can be a value of @ref USART_LL_EC_CLOCK.
119 
120  USART HW configuration can be modified afterwards using unitary functions
121  @ref LL_USART_EnableSCLKOutput() or @ref LL_USART_DisableSCLKOutput().
122  For more details, refer to description of this function. */
123 
124  uint32_t ClockPolarity; /*!< Specifies the steady state of the serial clock.
125  This parameter can be a value of @ref USART_LL_EC_POLARITY.
126 
127  USART HW configuration can be modified afterwards using unitary functions @ref LL_USART_SetClockPolarity().
128  For more details, refer to description of this function. */
129 
130  uint32_t ClockPhase; /*!< Specifies the clock transition on which the bit capture is made.
131  This parameter can be a value of @ref USART_LL_EC_PHASE.
132 
133  USART HW configuration can be modified afterwards using unitary functions @ref LL_USART_SetClockPhase().
134  For more details, refer to description of this function. */
135 
136  uint32_t LastBitClockPulse; /*!< Specifies whether the clock pulse corresponding to the last transmitted
137  data bit (MSB) has to be output on the SCLK pin in synchronous mode.
138  This parameter can be a value of @ref USART_LL_EC_LASTCLKPULSE.
139 
140  USART HW configuration can be modified afterwards using unitary functions @ref LL_USART_SetLastClkPulseOutput().
141  For more details, refer to description of this function. */
142 
143 } LL_USART_ClockInitTypeDef;
144 
145 /**
146  * @}
147  */
148 #endif /* USE_FULL_LL_DRIVER */
149 
150 /* Exported constants --------------------------------------------------------*/
151 /** @defgroup USART_LL_Exported_Constants USART Exported Constants
152  * @{
153  */
154 
155 /** @defgroup USART_LL_EC_GET_FLAG Get Flags Defines
156  * @brief Flags defines which can be used with LL_USART_ReadReg function
157  * @{
158  */
159 #define LL_USART_SR_PE USART_SR_PE /*!< Parity error flag */
160 #define LL_USART_SR_FE USART_SR_FE /*!< Framing error flag */
161 #define LL_USART_SR_NE USART_SR_NE /*!< Noise detected flag */
162 #define LL_USART_SR_ORE USART_SR_ORE /*!< Overrun error flag */
163 #define LL_USART_SR_IDLE USART_SR_IDLE /*!< Idle line detected flag */
164 #define LL_USART_SR_RXNE USART_SR_RXNE /*!< Read data register not empty flag */
165 #define LL_USART_SR_TC USART_SR_TC /*!< Transmission complete flag */
166 #define LL_USART_SR_TXE USART_SR_TXE /*!< Transmit data register empty flag */
167 #define LL_USART_SR_LBD USART_SR_LBD /*!< LIN break detection flag */
168 #define LL_USART_SR_CTS USART_SR_CTS /*!< CTS flag */
169 /**
170  * @}
171  */
172 
173 /** @defgroup USART_LL_EC_IT IT Defines
174  * @brief IT defines which can be used with LL_USART_ReadReg and LL_USART_WriteReg functions
175  * @{
176  */
177 #define LL_USART_CR1_IDLEIE USART_CR1_IDLEIE /*!< IDLE interrupt enable */
178 #define LL_USART_CR1_RXNEIE USART_CR1_RXNEIE /*!< Read data register not empty interrupt enable */
179 #define LL_USART_CR1_TCIE USART_CR1_TCIE /*!< Transmission complete interrupt enable */
180 #define LL_USART_CR1_TXEIE USART_CR1_TXEIE /*!< Transmit data register empty interrupt enable */
181 #define LL_USART_CR1_PEIE USART_CR1_PEIE /*!< Parity error */
182 #define LL_USART_CR2_LBDIE USART_CR2_LBDIE /*!< LIN break detection interrupt enable */
183 #define LL_USART_CR3_EIE USART_CR3_EIE /*!< Error interrupt enable */
184 #define LL_USART_CR3_CTSIE USART_CR3_CTSIE /*!< CTS interrupt enable */
185 /**
186  * @}
187  */
188 
189 /** @defgroup USART_LL_EC_DIRECTION Communication Direction
190  * @{
191  */
192 #define LL_USART_DIRECTION_NONE 0x00000000U /*!< Transmitter and Receiver are disabled */
193 #define LL_USART_DIRECTION_RX USART_CR1_RE /*!< Transmitter is disabled and Receiver is enabled */
194 #define LL_USART_DIRECTION_TX USART_CR1_TE /*!< Transmitter is enabled and Receiver is disabled */
195 #define LL_USART_DIRECTION_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< Transmitter and Receiver are enabled */
196 /**
197  * @}
198  */
199 
200 /** @defgroup USART_LL_EC_PARITY Parity Control
201  * @{
202  */
203 #define LL_USART_PARITY_NONE 0x00000000U /*!< Parity control disabled */
204 #define LL_USART_PARITY_EVEN USART_CR1_PCE /*!< Parity control enabled and Even Parity is selected */
205 #define LL_USART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Parity control enabled and Odd Parity is selected */
206 /**
207  * @}
208  */
209 
210 /** @defgroup USART_LL_EC_WAKEUP Wakeup
211  * @{
212  */
213 #define LL_USART_WAKEUP_IDLELINE 0x00000000U /*!< USART wake up from Mute mode on Idle Line */
214 #define LL_USART_WAKEUP_ADDRESSMARK USART_CR1_WAKE /*!< USART wake up from Mute mode on Address Mark */
215 /**
216  * @}
217  */
218 
219 /** @defgroup USART_LL_EC_DATAWIDTH Datawidth
220  * @{
221  */
222 #define LL_USART_DATAWIDTH_8B 0x00000000U /*!< 8 bits word length : Start bit, 8 data bits, n stop bits */
223 #define LL_USART_DATAWIDTH_9B USART_CR1_M /*!< 9 bits word length : Start bit, 9 data bits, n stop bits */
224 /**
225  * @}
226  */
227 
228 /** @defgroup USART_LL_EC_OVERSAMPLING Oversampling
229  * @{
230  */
231 #define LL_USART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */
232 #if defined(USART_CR1_OVER8)
233 #define LL_USART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */
234 #endif /* USART_OverSampling_Feature */
235 /**
236  * @}
237  */
238 
239 #if defined(USE_FULL_LL_DRIVER)
240 /** @defgroup USART_LL_EC_CLOCK Clock Signal
241  * @{
242  */
243 
244 #define LL_USART_CLOCK_DISABLE 0x00000000U /*!< Clock signal not provided */
245 #define LL_USART_CLOCK_ENABLE USART_CR2_CLKEN /*!< Clock signal provided */
246 /**
247  * @}
248  */
249 #endif /*USE_FULL_LL_DRIVER*/
250 
251 /** @defgroup USART_LL_EC_LASTCLKPULSE Last Clock Pulse
252  * @{
253  */
254 #define LL_USART_LASTCLKPULSE_NO_OUTPUT 0x00000000U /*!< The clock pulse of the last data bit is not output to the SCLK pin */
255 #define LL_USART_LASTCLKPULSE_OUTPUT USART_CR2_LBCL /*!< The clock pulse of the last data bit is output to the SCLK pin */
256 /**
257  * @}
258  */
259 
260 /** @defgroup USART_LL_EC_PHASE Clock Phase
261  * @{
262  */
263 #define LL_USART_PHASE_1EDGE 0x00000000U /*!< The first clock transition is the first data capture edge */
264 #define LL_USART_PHASE_2EDGE USART_CR2_CPHA /*!< The second clock transition is the first data capture edge */
265 /**
266  * @}
267  */
268 
269 /** @defgroup USART_LL_EC_POLARITY Clock Polarity
270  * @{
271  */
272 #define LL_USART_POLARITY_LOW 0x00000000U /*!< Steady low value on SCLK pin outside transmission window*/
273 #define LL_USART_POLARITY_HIGH USART_CR2_CPOL /*!< Steady high value on SCLK pin outside transmission window */
274 /**
275  * @}
276  */
277 
278 /** @defgroup USART_LL_EC_STOPBITS Stop Bits
279  * @{
280  */
281 #define LL_USART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< 0.5 stop bit */
282 #define LL_USART_STOPBITS_1 0x00000000U /*!< 1 stop bit */
283 #define LL_USART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< 1.5 stop bits */
284 #define LL_USART_STOPBITS_2 USART_CR2_STOP_1 /*!< 2 stop bits */
285 /**
286  * @}
287  */
288 
289 /** @defgroup USART_LL_EC_HWCONTROL Hardware Control
290  * @{
291  */
292 #define LL_USART_HWCONTROL_NONE 0x00000000U /*!< CTS and RTS hardware flow control disabled */
293 #define LL_USART_HWCONTROL_RTS USART_CR3_RTSE /*!< RTS output enabled, data is only requested when there is space in the receive buffer */
294 #define LL_USART_HWCONTROL_CTS USART_CR3_CTSE /*!< CTS mode enabled, data is only transmitted when the nCTS input is asserted (tied to 0) */
295 #define LL_USART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< CTS and RTS hardware flow control enabled */
296 /**
297  * @}
298  */
299 
300 /** @defgroup USART_LL_EC_IRDA_POWER IrDA Power
301  * @{
302  */
303 #define LL_USART_IRDA_POWER_NORMAL 0x00000000U /*!< IrDA normal power mode */
304 #define LL_USART_IRDA_POWER_LOW USART_CR3_IRLP /*!< IrDA low power mode */
305 /**
306  * @}
307  */
308 
309 /** @defgroup USART_LL_EC_LINBREAK_DETECT LIN Break Detection Length
310  * @{
311  */
312 #define LL_USART_LINBREAK_DETECT_10B 0x00000000U /*!< 10-bit break detection method selected */
313 #define LL_USART_LINBREAK_DETECT_11B USART_CR2_LBDL /*!< 11-bit break detection method selected */
314 /**
315  * @}
316  */
317 
318 /**
319  * @}
320  */
321 
322 /* Exported macro ------------------------------------------------------------*/
323 /** @defgroup USART_LL_Exported_Macros USART Exported Macros
324  * @{
325  */
326 
327 /** @defgroup USART_LL_EM_WRITE_READ Common Write and read registers Macros
328  * @{
329  */
330 
331 /**
332  * @brief Write a value in USART register
333  * @param __INSTANCE__ USART Instance
334  * @param __REG__ Register to be written
335  * @param __VALUE__ Value to be written in the register
336  * @retval None
337  */
338 #define LL_USART_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
339 
340 /**
341  * @brief Read a value in USART register
342  * @param __INSTANCE__ USART Instance
343  * @param __REG__ Register to be read
344  * @retval Register value
345  */
346 #define LL_USART_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
347 /**
348  * @}
349  */
350 
351 /** @defgroup USART_LL_EM_Exported_Macros_Helper Exported_Macros_Helper
352  * @{
353  */
354 
355 /**
356  * @brief Compute USARTDIV value according to Peripheral Clock and
357  * expected Baud Rate in 8 bits sampling mode (32 bits value of USARTDIV is returned)
358  * @param __PERIPHCLK__ Peripheral Clock frequency used for USART instance
359  * @param __BAUDRATE__ Baud rate value to achieve
360  * @retval USARTDIV value to be used for BRR register filling in OverSampling_8 case
361  */
362 #define __LL_USART_DIV_SAMPLING8_100(__PERIPHCLK__, __BAUDRATE__) (((__PERIPHCLK__)*25)/(2*(__BAUDRATE__)))
363 #define __LL_USART_DIVMANT_SAMPLING8(__PERIPHCLK__, __BAUDRATE__) (__LL_USART_DIV_SAMPLING8_100((__PERIPHCLK__), (__BAUDRATE__))/100)
364 #define __LL_USART_DIVFRAQ_SAMPLING8(__PERIPHCLK__, __BAUDRATE__) (((__LL_USART_DIV_SAMPLING8_100((__PERIPHCLK__), (__BAUDRATE__)) - (__LL_USART_DIVMANT_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) * 100)) * 8 + 50) / 100)
365 /* UART BRR = mantissa + overflow + fraction
366  = (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07) */
367 #define __LL_USART_DIV_SAMPLING8(__PERIPHCLK__, __BAUDRATE__) (((__LL_USART_DIVMANT_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) << 4) + \
368  ((__LL_USART_DIVFRAQ_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) & 0xF8) << 1)) + \
369  (__LL_USART_DIVFRAQ_SAMPLING8((__PERIPHCLK__), (__BAUDRATE__)) & 0x07))
370 
371 /**
372  * @brief Compute USARTDIV value according to Peripheral Clock and
373  * expected Baud Rate in 16 bits sampling mode (32 bits value of USARTDIV is returned)
374  * @param __PERIPHCLK__ Peripheral Clock frequency used for USART instance
375  * @param __BAUDRATE__ Baud rate value to achieve
376  * @retval USARTDIV value to be used for BRR register filling in OverSampling_16 case
377  */
378 #define __LL_USART_DIV_SAMPLING16_100(__PERIPHCLK__, __BAUDRATE__) (((__PERIPHCLK__)*25)/(4*(__BAUDRATE__)))
379 #define __LL_USART_DIVMANT_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (__LL_USART_DIV_SAMPLING16_100((__PERIPHCLK__), (__BAUDRATE__))/100)
380 #define __LL_USART_DIVFRAQ_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) ((((__LL_USART_DIV_SAMPLING16_100((__PERIPHCLK__), (__BAUDRATE__)) - (__LL_USART_DIVMANT_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) * 100)) * 16) + 50) / 100)
381 /* USART BRR = mantissa + overflow + fraction
382  = (USART DIVMANT << 4) + (USART DIVFRAQ & 0xF0) + (USART DIVFRAQ & 0x0F) */
383 #define __LL_USART_DIV_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (((__LL_USART_DIVMANT_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) << 4) + \
384  (__LL_USART_DIVFRAQ_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) & 0xF0)) + \
385  (__LL_USART_DIVFRAQ_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) & 0x0F))
386 
387 /**
388  * @}
389  */
390 
391 /**
392  * @}
393  */
394 
395 /* Exported functions --------------------------------------------------------*/
396 
397 /** @defgroup USART_LL_Exported_Functions USART Exported Functions
398  * @{
399  */
400 
401 /** @defgroup USART_LL_EF_Configuration Configuration functions
402  * @{
403  */
404 
405 /**
406  * @brief USART Enable
407  * @rmtoll CR1 UE LL_USART_Enable
408  * @param USARTx USART Instance
409  * @retval None
410  */
411 __STATIC_INLINE void LL_USART_Enable(USART_TypeDef *USARTx)
412 {
413  SET_BIT(USARTx->CR1, USART_CR1_UE);
414 }
415 
416 /**
417  * @brief USART Disable (all USART prescalers and outputs are disabled)
418  * @note When USART is disabled, USART prescalers and outputs are stopped immediately,
419  * and current operations are discarded. The configuration of the USART is kept, but all the status
420  * flags, in the USARTx_SR are set to their default values.
421  * @rmtoll CR1 UE LL_USART_Disable
422  * @param USARTx USART Instance
423  * @retval None
424  */
425 __STATIC_INLINE void LL_USART_Disable(USART_TypeDef *USARTx)
426 {
427  CLEAR_BIT(USARTx->CR1, USART_CR1_UE);
428 }
429 
430 /**
431  * @brief Indicate if USART is enabled
432  * @rmtoll CR1 UE LL_USART_IsEnabled
433  * @param USARTx USART Instance
434  * @retval State of bit (1 or 0).
435  */
436 __STATIC_INLINE uint32_t LL_USART_IsEnabled(USART_TypeDef *USARTx)
437 {
438  return (READ_BIT(USARTx->CR1, USART_CR1_UE) == (USART_CR1_UE));
439 }
440 
441 /**
442  * @brief Receiver Enable (Receiver is enabled and begins searching for a start bit)
443  * @rmtoll CR1 RE LL_USART_EnableDirectionRx
444  * @param USARTx USART Instance
445  * @retval None
446  */
447 __STATIC_INLINE void LL_USART_EnableDirectionRx(USART_TypeDef *USARTx)
448 {
449  SET_BIT(USARTx->CR1, USART_CR1_RE);
450 }
451 
452 /**
453  * @brief Receiver Disable
454  * @rmtoll CR1 RE LL_USART_DisableDirectionRx
455  * @param USARTx USART Instance
456  * @retval None
457  */
458 __STATIC_INLINE void LL_USART_DisableDirectionRx(USART_TypeDef *USARTx)
459 {
460  CLEAR_BIT(USARTx->CR1, USART_CR1_RE);
461 }
462 
463 /**
464  * @brief Transmitter Enable
465  * @rmtoll CR1 TE LL_USART_EnableDirectionTx
466  * @param USARTx USART Instance
467  * @retval None
468  */
469 __STATIC_INLINE void LL_USART_EnableDirectionTx(USART_TypeDef *USARTx)
470 {
471  SET_BIT(USARTx->CR1, USART_CR1_TE);
472 }
473 
474 /**
475  * @brief Transmitter Disable
476  * @rmtoll CR1 TE LL_USART_DisableDirectionTx
477  * @param USARTx USART Instance
478  * @retval None
479  */
480 __STATIC_INLINE void LL_USART_DisableDirectionTx(USART_TypeDef *USARTx)
481 {
482  CLEAR_BIT(USARTx->CR1, USART_CR1_TE);
483 }
484 
485 /**
486  * @brief Configure simultaneously enabled/disabled states
487  * of Transmitter and Receiver
488  * @rmtoll CR1 RE LL_USART_SetTransferDirection\n
489  * CR1 TE LL_USART_SetTransferDirection
490  * @param USARTx USART Instance
491  * @param TransferDirection This parameter can be one of the following values:
492  * @arg @ref LL_USART_DIRECTION_NONE
493  * @arg @ref LL_USART_DIRECTION_RX
494  * @arg @ref LL_USART_DIRECTION_TX
495  * @arg @ref LL_USART_DIRECTION_TX_RX
496  * @retval None
497  */
498 __STATIC_INLINE void LL_USART_SetTransferDirection(USART_TypeDef *USARTx, uint32_t TransferDirection)
499 {
500  MODIFY_REG(USARTx->CR1, USART_CR1_RE | USART_CR1_TE, TransferDirection);
501 }
502 
503 /**
504  * @brief Return enabled/disabled states of Transmitter and Receiver
505  * @rmtoll CR1 RE LL_USART_GetTransferDirection\n
506  * CR1 TE LL_USART_GetTransferDirection
507  * @param USARTx USART Instance
508  * @retval Returned value can be one of the following values:
509  * @arg @ref LL_USART_DIRECTION_NONE
510  * @arg @ref LL_USART_DIRECTION_RX
511  * @arg @ref LL_USART_DIRECTION_TX
512  * @arg @ref LL_USART_DIRECTION_TX_RX
513  */
514 __STATIC_INLINE uint32_t LL_USART_GetTransferDirection(USART_TypeDef *USARTx)
515 {
516  return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_RE | USART_CR1_TE));
517 }
518 
519 /**
520  * @brief Configure Parity (enabled/disabled and parity mode if enabled).
521  * @note This function selects if hardware parity control (generation and detection) is enabled or disabled.
522  * When the parity control is enabled (Odd or Even), computed parity bit is inserted at the MSB position
523  * (9th or 8th bit depending on data width) and parity is checked on the received data.
524  * @rmtoll CR1 PS LL_USART_SetParity\n
525  * CR1 PCE LL_USART_SetParity
526  * @param USARTx USART Instance
527  * @param Parity This parameter can be one of the following values:
528  * @arg @ref LL_USART_PARITY_NONE
529  * @arg @ref LL_USART_PARITY_EVEN
530  * @arg @ref LL_USART_PARITY_ODD
531  * @retval None
532  */
533 __STATIC_INLINE void LL_USART_SetParity(USART_TypeDef *USARTx, uint32_t Parity)
534 {
535  MODIFY_REG(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE, Parity);
536 }
537 
538 /**
539  * @brief Return Parity configuration (enabled/disabled and parity mode if enabled)
540  * @rmtoll CR1 PS LL_USART_GetParity\n
541  * CR1 PCE LL_USART_GetParity
542  * @param USARTx USART Instance
543  * @retval Returned value can be one of the following values:
544  * @arg @ref LL_USART_PARITY_NONE
545  * @arg @ref LL_USART_PARITY_EVEN
546  * @arg @ref LL_USART_PARITY_ODD
547  */
548 __STATIC_INLINE uint32_t LL_USART_GetParity(USART_TypeDef *USARTx)
549 {
550  return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE));
551 }
552 
553 /**
554  * @brief Set Receiver Wake Up method from Mute mode.
555  * @rmtoll CR1 WAKE LL_USART_SetWakeUpMethod
556  * @param USARTx USART Instance
557  * @param Method This parameter can be one of the following values:
558  * @arg @ref LL_USART_WAKEUP_IDLELINE
559  * @arg @ref LL_USART_WAKEUP_ADDRESSMARK
560  * @retval None
561  */
562 __STATIC_INLINE void LL_USART_SetWakeUpMethod(USART_TypeDef *USARTx, uint32_t Method)
563 {
564  MODIFY_REG(USARTx->CR1, USART_CR1_WAKE, Method);
565 }
566 
567 /**
568  * @brief Return Receiver Wake Up method from Mute mode
569  * @rmtoll CR1 WAKE LL_USART_GetWakeUpMethod
570  * @param USARTx USART Instance
571  * @retval Returned value can be one of the following values:
572  * @arg @ref LL_USART_WAKEUP_IDLELINE
573  * @arg @ref LL_USART_WAKEUP_ADDRESSMARK
574  */
575 __STATIC_INLINE uint32_t LL_USART_GetWakeUpMethod(USART_TypeDef *USARTx)
576 {
577  return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_WAKE));
578 }
579 
580 /**
581  * @brief Set Word length (i.e. nb of data bits, excluding start and stop bits)
582  * @rmtoll CR1 M LL_USART_SetDataWidth
583  * @param USARTx USART Instance
584  * @param DataWidth This parameter can be one of the following values:
585  * @arg @ref LL_USART_DATAWIDTH_8B
586  * @arg @ref LL_USART_DATAWIDTH_9B
587  * @retval None
588  */
589 __STATIC_INLINE void LL_USART_SetDataWidth(USART_TypeDef *USARTx, uint32_t DataWidth)
590 {
591  MODIFY_REG(USARTx->CR1, USART_CR1_M, DataWidth);
592 }
593 
594 /**
595  * @brief Return Word length (i.e. nb of data bits, excluding start and stop bits)
596  * @rmtoll CR1 M LL_USART_GetDataWidth
597  * @param USARTx USART Instance
598  * @retval Returned value can be one of the following values:
599  * @arg @ref LL_USART_DATAWIDTH_8B
600  * @arg @ref LL_USART_DATAWIDTH_9B
601  */
602 __STATIC_INLINE uint32_t LL_USART_GetDataWidth(USART_TypeDef *USARTx)
603 {
604  return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_M));
605 }
606 
607 #if defined(USART_CR1_OVER8)
608 /**
609  * @brief Set Oversampling to 8-bit or 16-bit mode
610  * @rmtoll CR1 OVER8 LL_USART_SetOverSampling
611  * @param USARTx USART Instance
612  * @param OverSampling This parameter can be one of the following values:
613  * @arg @ref LL_USART_OVERSAMPLING_16
614  * @arg @ref LL_USART_OVERSAMPLING_8
615  * @retval None
616  */
617 __STATIC_INLINE void LL_USART_SetOverSampling(USART_TypeDef *USARTx, uint32_t OverSampling)
618 {
619  MODIFY_REG(USARTx->CR1, USART_CR1_OVER8, OverSampling);
620 }
621 
622 /**
623  * @brief Return Oversampling mode
624  * @rmtoll CR1 OVER8 LL_USART_GetOverSampling
625  * @param USARTx USART Instance
626  * @retval Returned value can be one of the following values:
627  * @arg @ref LL_USART_OVERSAMPLING_16
628  * @arg @ref LL_USART_OVERSAMPLING_8
629  */
630 __STATIC_INLINE uint32_t LL_USART_GetOverSampling(USART_TypeDef *USARTx)
631 {
632  return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_OVER8));
633 }
634 
635 #endif /* USART_OverSampling_Feature */
636 /**
637  * @brief Configure if Clock pulse of the last data bit is output to the SCLK pin or not
638  * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
639  * Synchronous mode is supported by the USARTx instance.
640  * @rmtoll CR2 LBCL LL_USART_SetLastClkPulseOutput
641  * @param USARTx USART Instance
642  * @param LastBitClockPulse This parameter can be one of the following values:
643  * @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT
644  * @arg @ref LL_USART_LASTCLKPULSE_OUTPUT
645  * @retval None
646  */
647 __STATIC_INLINE void LL_USART_SetLastClkPulseOutput(USART_TypeDef *USARTx, uint32_t LastBitClockPulse)
648 {
649  MODIFY_REG(USARTx->CR2, USART_CR2_LBCL, LastBitClockPulse);
650 }
651 
652 /**
653  * @brief Retrieve Clock pulse of the last data bit output configuration
654  * (Last bit Clock pulse output to the SCLK pin or not)
655  * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
656  * Synchronous mode is supported by the USARTx instance.
657  * @rmtoll CR2 LBCL LL_USART_GetLastClkPulseOutput
658  * @param USARTx USART Instance
659  * @retval Returned value can be one of the following values:
660  * @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT
661  * @arg @ref LL_USART_LASTCLKPULSE_OUTPUT
662  */
663 __STATIC_INLINE uint32_t LL_USART_GetLastClkPulseOutput(USART_TypeDef *USARTx)
664 {
665  return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBCL));
666 }
667 
668 /**
669  * @brief Select the phase of the clock output on the SCLK pin in synchronous mode
670  * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
671  * Synchronous mode is supported by the USARTx instance.
672  * @rmtoll CR2 CPHA LL_USART_SetClockPhase
673  * @param USARTx USART Instance
674  * @param ClockPhase This parameter can be one of the following values:
675  * @arg @ref LL_USART_PHASE_1EDGE
676  * @arg @ref LL_USART_PHASE_2EDGE
677  * @retval None
678  */
679 __STATIC_INLINE void LL_USART_SetClockPhase(USART_TypeDef *USARTx, uint32_t ClockPhase)
680 {
681  MODIFY_REG(USARTx->CR2, USART_CR2_CPHA, ClockPhase);
682 }
683 
684 /**
685  * @brief Return phase of the clock output on the SCLK pin in synchronous mode
686  * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
687  * Synchronous mode is supported by the USARTx instance.
688  * @rmtoll CR2 CPHA LL_USART_GetClockPhase
689  * @param USARTx USART Instance
690  * @retval Returned value can be one of the following values:
691  * @arg @ref LL_USART_PHASE_1EDGE
692  * @arg @ref LL_USART_PHASE_2EDGE
693  */
694 __STATIC_INLINE uint32_t LL_USART_GetClockPhase(USART_TypeDef *USARTx)
695 {
696  return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPHA));
697 }
698 
699 /**
700  * @brief Select the polarity of the clock output on the SCLK pin in synchronous mode
701  * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
702  * Synchronous mode is supported by the USARTx instance.
703  * @rmtoll CR2 CPOL LL_USART_SetClockPolarity
704  * @param USARTx USART Instance
705  * @param ClockPolarity This parameter can be one of the following values:
706  * @arg @ref LL_USART_POLARITY_LOW
707  * @arg @ref LL_USART_POLARITY_HIGH
708  * @retval None
709  */
710 __STATIC_INLINE void LL_USART_SetClockPolarity(USART_TypeDef *USARTx, uint32_t ClockPolarity)
711 {
712  MODIFY_REG(USARTx->CR2, USART_CR2_CPOL, ClockPolarity);
713 }
714 
715 /**
716  * @brief Return polarity of the clock output on the SCLK pin in synchronous mode
717  * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
718  * Synchronous mode is supported by the USARTx instance.
719  * @rmtoll CR2 CPOL LL_USART_GetClockPolarity
720  * @param USARTx USART Instance
721  * @retval Returned value can be one of the following values:
722  * @arg @ref LL_USART_POLARITY_LOW
723  * @arg @ref LL_USART_POLARITY_HIGH
724  */
725 __STATIC_INLINE uint32_t LL_USART_GetClockPolarity(USART_TypeDef *USARTx)
726 {
727  return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_CPOL));
728 }
729 
730 /**
731  * @brief Configure Clock signal format (Phase Polarity and choice about output of last bit clock pulse)
732  * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
733  * Synchronous mode is supported by the USARTx instance.
734  * @note Call of this function is equivalent to following function call sequence :
735  * - Clock Phase configuration using @ref LL_USART_SetClockPhase() function
736  * - Clock Polarity configuration using @ref LL_USART_SetClockPolarity() function
737  * - Output of Last bit Clock pulse configuration using @ref LL_USART_SetLastClkPulseOutput() function
738  * @rmtoll CR2 CPHA LL_USART_ConfigClock\n
739  * CR2 CPOL LL_USART_ConfigClock\n
740  * CR2 LBCL LL_USART_ConfigClock
741  * @param USARTx USART Instance
742  * @param Phase This parameter can be one of the following values:
743  * @arg @ref LL_USART_PHASE_1EDGE
744  * @arg @ref LL_USART_PHASE_2EDGE
745  * @param Polarity This parameter can be one of the following values:
746  * @arg @ref LL_USART_POLARITY_LOW
747  * @arg @ref LL_USART_POLARITY_HIGH
748  * @param LBCPOutput This parameter can be one of the following values:
749  * @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT
750  * @arg @ref LL_USART_LASTCLKPULSE_OUTPUT
751  * @retval None
752  */
753 __STATIC_INLINE void LL_USART_ConfigClock(USART_TypeDef *USARTx, uint32_t Phase, uint32_t Polarity, uint32_t LBCPOutput)
754 {
755  MODIFY_REG(USARTx->CR2, USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL, Phase | Polarity | LBCPOutput);
756 }
757 
758 /**
759  * @brief Enable Clock output on SCLK pin
760  * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
761  * Synchronous mode is supported by the USARTx instance.
762  * @rmtoll CR2 CLKEN LL_USART_EnableSCLKOutput
763  * @param USARTx USART Instance
764  * @retval None
765  */
766 __STATIC_INLINE void LL_USART_EnableSCLKOutput(USART_TypeDef *USARTx)
767 {
768  SET_BIT(USARTx->CR2, USART_CR2_CLKEN);
769 }
770 
771 /**
772  * @brief Disable Clock output on SCLK pin
773  * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
774  * Synchronous mode is supported by the USARTx instance.
775  * @rmtoll CR2 CLKEN LL_USART_DisableSCLKOutput
776  * @param USARTx USART Instance
777  * @retval None
778  */
779 __STATIC_INLINE void LL_USART_DisableSCLKOutput(USART_TypeDef *USARTx)
780 {
781  CLEAR_BIT(USARTx->CR2, USART_CR2_CLKEN);
782 }
783 
784 /**
785  * @brief Indicate if Clock output on SCLK pin is enabled
786  * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
787  * Synchronous mode is supported by the USARTx instance.
788  * @rmtoll CR2 CLKEN LL_USART_IsEnabledSCLKOutput
789  * @param USARTx USART Instance
790  * @retval State of bit (1 or 0).
791  */
792 __STATIC_INLINE uint32_t LL_USART_IsEnabledSCLKOutput(USART_TypeDef *USARTx)
793 {
794  return (READ_BIT(USARTx->CR2, USART_CR2_CLKEN) == (USART_CR2_CLKEN));
795 }
796 
797 /**
798  * @brief Set the length of the stop bits
799  * @rmtoll CR2 STOP LL_USART_SetStopBitsLength
800  * @param USARTx USART Instance
801  * @param StopBits This parameter can be one of the following values:
802  * @arg @ref LL_USART_STOPBITS_0_5
803  * @arg @ref LL_USART_STOPBITS_1
804  * @arg @ref LL_USART_STOPBITS_1_5
805  * @arg @ref LL_USART_STOPBITS_2
806  * @retval None
807  */
808 __STATIC_INLINE void LL_USART_SetStopBitsLength(USART_TypeDef *USARTx, uint32_t StopBits)
809 {
810  MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits);
811 }
812 
813 /**
814  * @brief Retrieve the length of the stop bits
815  * @rmtoll CR2 STOP LL_USART_GetStopBitsLength
816  * @param USARTx USART Instance
817  * @retval Returned value can be one of the following values:
818  * @arg @ref LL_USART_STOPBITS_0_5
819  * @arg @ref LL_USART_STOPBITS_1
820  * @arg @ref LL_USART_STOPBITS_1_5
821  * @arg @ref LL_USART_STOPBITS_2
822  */
823 __STATIC_INLINE uint32_t LL_USART_GetStopBitsLength(USART_TypeDef *USARTx)
824 {
825  return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_STOP));
826 }
827 
828 /**
829  * @brief Configure Character frame format (Datawidth, Parity control, Stop Bits)
830  * @note Call of this function is equivalent to following function call sequence :
831  * - Data Width configuration using @ref LL_USART_SetDataWidth() function
832  * - Parity Control and mode configuration using @ref LL_USART_SetParity() function
833  * - Stop bits configuration using @ref LL_USART_SetStopBitsLength() function
834  * @rmtoll CR1 PS LL_USART_ConfigCharacter\n
835  * CR1 PCE LL_USART_ConfigCharacter\n
836  * CR1 M LL_USART_ConfigCharacter\n
837  * CR2 STOP LL_USART_ConfigCharacter
838  * @param USARTx USART Instance
839  * @param DataWidth This parameter can be one of the following values:
840  * @arg @ref LL_USART_DATAWIDTH_8B
841  * @arg @ref LL_USART_DATAWIDTH_9B
842  * @param Parity This parameter can be one of the following values:
843  * @arg @ref LL_USART_PARITY_NONE
844  * @arg @ref LL_USART_PARITY_EVEN
845  * @arg @ref LL_USART_PARITY_ODD
846  * @param StopBits This parameter can be one of the following values:
847  * @arg @ref LL_USART_STOPBITS_0_5
848  * @arg @ref LL_USART_STOPBITS_1
849  * @arg @ref LL_USART_STOPBITS_1_5
850  * @arg @ref LL_USART_STOPBITS_2
851  * @retval None
852  */
853 __STATIC_INLINE void LL_USART_ConfigCharacter(USART_TypeDef *USARTx, uint32_t DataWidth, uint32_t Parity,
854  uint32_t StopBits)
855 {
856  MODIFY_REG(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE | USART_CR1_M, Parity | DataWidth);
857  MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits);
858 }
859 
860 /**
861  * @brief Set Address of the USART node.
862  * @note This is used in multiprocessor communication during Mute mode or Stop mode,
863  * for wake up with address mark detection.
864  * @rmtoll CR2 ADD LL_USART_SetNodeAddress
865  * @param USARTx USART Instance
866  * @param NodeAddress 4 bit Address of the USART node.
867  * @retval None
868  */
869 __STATIC_INLINE void LL_USART_SetNodeAddress(USART_TypeDef *USARTx, uint32_t NodeAddress)
870 {
871  MODIFY_REG(USARTx->CR2, USART_CR2_ADD, (NodeAddress & USART_CR2_ADD));
872 }
873 
874 /**
875  * @brief Return 4 bit Address of the USART node as set in ADD field of CR2.
876  * @note only 4bits (b3-b0) of returned value are relevant (b31-b4 are not relevant)
877  * @rmtoll CR2 ADD LL_USART_GetNodeAddress
878  * @param USARTx USART Instance
879  * @retval Address of the USART node (Value between Min_Data=0 and Max_Data=255)
880  */
881 __STATIC_INLINE uint32_t LL_USART_GetNodeAddress(USART_TypeDef *USARTx)
882 {
883  return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ADD));
884 }
885 
886 /**
887  * @brief Enable RTS HW Flow Control
888  * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
889  * Hardware Flow control feature is supported by the USARTx instance.
890  * @rmtoll CR3 RTSE LL_USART_EnableRTSHWFlowCtrl
891  * @param USARTx USART Instance
892  * @retval None
893  */
894 __STATIC_INLINE void LL_USART_EnableRTSHWFlowCtrl(USART_TypeDef *USARTx)
895 {
896  SET_BIT(USARTx->CR3, USART_CR3_RTSE);
897 }
898 
899 /**
900  * @brief Disable RTS HW Flow Control
901  * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
902  * Hardware Flow control feature is supported by the USARTx instance.
903  * @rmtoll CR3 RTSE LL_USART_DisableRTSHWFlowCtrl
904  * @param USARTx USART Instance
905  * @retval None
906  */
907 __STATIC_INLINE void LL_USART_DisableRTSHWFlowCtrl(USART_TypeDef *USARTx)
908 {
909  CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE);
910 }
911 
912 /**
913  * @brief Enable CTS HW Flow Control
914  * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
915  * Hardware Flow control feature is supported by the USARTx instance.
916  * @rmtoll CR3 CTSE LL_USART_EnableCTSHWFlowCtrl
917  * @param USARTx USART Instance
918  * @retval None
919  */
920 __STATIC_INLINE void LL_USART_EnableCTSHWFlowCtrl(USART_TypeDef *USARTx)
921 {
922  SET_BIT(USARTx->CR3, USART_CR3_CTSE);
923 }
924 
925 /**
926  * @brief Disable CTS HW Flow Control
927  * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
928  * Hardware Flow control feature is supported by the USARTx instance.
929  * @rmtoll CR3 CTSE LL_USART_DisableCTSHWFlowCtrl
930  * @param USARTx USART Instance
931  * @retval None
932  */
933 __STATIC_INLINE void LL_USART_DisableCTSHWFlowCtrl(USART_TypeDef *USARTx)
934 {
935  CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE);
936 }
937 
938 /**
939  * @brief Configure HW Flow Control mode (both CTS and RTS)
940  * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
941  * Hardware Flow control feature is supported by the USARTx instance.
942  * @rmtoll CR3 RTSE LL_USART_SetHWFlowCtrl\n
943  * CR3 CTSE LL_USART_SetHWFlowCtrl
944  * @param USARTx USART Instance
945  * @param HardwareFlowControl This parameter can be one of the following values:
946  * @arg @ref LL_USART_HWCONTROL_NONE
947  * @arg @ref LL_USART_HWCONTROL_RTS
948  * @arg @ref LL_USART_HWCONTROL_CTS
949  * @arg @ref LL_USART_HWCONTROL_RTS_CTS
950  * @retval None
951  */
952 __STATIC_INLINE void LL_USART_SetHWFlowCtrl(USART_TypeDef *USARTx, uint32_t HardwareFlowControl)
953 {
954  MODIFY_REG(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl);
955 }
956 
957 /**
958  * @brief Return HW Flow Control configuration (both CTS and RTS)
959  * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
960  * Hardware Flow control feature is supported by the USARTx instance.
961  * @rmtoll CR3 RTSE LL_USART_GetHWFlowCtrl\n
962  * CR3 CTSE LL_USART_GetHWFlowCtrl
963  * @param USARTx USART Instance
964  * @retval Returned value can be one of the following values:
965  * @arg @ref LL_USART_HWCONTROL_NONE
966  * @arg @ref LL_USART_HWCONTROL_RTS
967  * @arg @ref LL_USART_HWCONTROL_CTS
968  * @arg @ref LL_USART_HWCONTROL_RTS_CTS
969  */
970 __STATIC_INLINE uint32_t LL_USART_GetHWFlowCtrl(USART_TypeDef *USARTx)
971 {
972  return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE));
973 }
974 
975 #if defined(USART_CR3_ONEBIT)
976 /**
977  * @brief Enable One bit sampling method
978  * @rmtoll CR3 ONEBIT LL_USART_EnableOneBitSamp
979  * @param USARTx USART Instance
980  * @retval None
981  */
982 __STATIC_INLINE void LL_USART_EnableOneBitSamp(USART_TypeDef *USARTx)
983 {
984  SET_BIT(USARTx->CR3, USART_CR3_ONEBIT);
985 }
986 
987 /**
988  * @brief Disable One bit sampling method
989  * @rmtoll CR3 ONEBIT LL_USART_DisableOneBitSamp
990  * @param USARTx USART Instance
991  * @retval None
992  */
993 __STATIC_INLINE void LL_USART_DisableOneBitSamp(USART_TypeDef *USARTx)
994 {
995  CLEAR_BIT(USARTx->CR3, USART_CR3_ONEBIT);
996 }
997 
998 /**
999  * @brief Indicate if One bit sampling method is enabled
1000  * @rmtoll CR3 ONEBIT LL_USART_IsEnabledOneBitSamp
1001  * @param USARTx USART Instance
1002  * @retval State of bit (1 or 0).
1003  */
1004 __STATIC_INLINE uint32_t LL_USART_IsEnabledOneBitSamp(USART_TypeDef *USARTx)
1005 {
1006  return (READ_BIT(USARTx->CR3, USART_CR3_ONEBIT) == (USART_CR3_ONEBIT));
1007 }
1008 #endif /* USART_OneBitSampling_Feature */
1009 
1010 #if defined(USART_CR1_OVER8)
1011 /**
1012  * @brief Configure USART BRR register for achieving expected Baud Rate value.
1013  * @note Compute and set USARTDIV value in BRR Register (full BRR content)
1014  * according to used Peripheral Clock, Oversampling mode, and expected Baud Rate values
1015  * @note Peripheral clock and Baud rate values provided as function parameters should be valid
1016  * (Baud rate value != 0)
1017  * @rmtoll BRR BRR LL_USART_SetBaudRate
1018  * @param USARTx USART Instance
1019  * @param PeriphClk Peripheral Clock
1020  * @param OverSampling This parameter can be one of the following values:
1021  * @arg @ref LL_USART_OVERSAMPLING_16
1022  * @arg @ref LL_USART_OVERSAMPLING_8
1023  * @param BaudRate Baud Rate
1024  * @retval None
1025  */
1026 __STATIC_INLINE void LL_USART_SetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling,
1027  uint32_t BaudRate)
1028 {
1029  if (OverSampling == LL_USART_OVERSAMPLING_8)
1030  {
1031  USARTx->BRR = (uint16_t)(__LL_USART_DIV_SAMPLING8(PeriphClk, BaudRate));
1032  }
1033  else
1034  {
1035  USARTx->BRR = (uint16_t)(__LL_USART_DIV_SAMPLING16(PeriphClk, BaudRate));
1036  }
1037 }
1038 
1039 /**
1040  * @brief Return current Baud Rate value, according to USARTDIV present in BRR register
1041  * (full BRR content), and to used Peripheral Clock and Oversampling mode values
1042  * @note In case of non-initialized or invalid value stored in BRR register, value 0 will be returned.
1043  * @rmtoll BRR BRR LL_USART_GetBaudRate
1044  * @param USARTx USART Instance
1045  * @param PeriphClk Peripheral Clock
1046  * @param OverSampling This parameter can be one of the following values:
1047  * @arg @ref LL_USART_OVERSAMPLING_16
1048  * @arg @ref LL_USART_OVERSAMPLING_8
1049  * @retval Baud Rate
1050  */
1051 __STATIC_INLINE uint32_t LL_USART_GetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverSampling)
1052 {
1053  uint32_t usartdiv = 0x0U;
1054  uint32_t brrresult = 0x0U;
1055 
1056  usartdiv = USARTx->BRR;
1057 
1058  if (OverSampling == LL_USART_OVERSAMPLING_8)
1059  {
1060  if ((usartdiv & 0xFFF7U) != 0U)
1061  {
1062  usartdiv = (uint16_t)((usartdiv & 0xFFF0U) | ((usartdiv & 0x0007U) << 1U)) ;
1063  brrresult = (PeriphClk * 2U) / usartdiv;
1064  }
1065  }
1066  else
1067  {
1068  if ((usartdiv & 0xFFFFU) != 0U)
1069  {
1070  brrresult = PeriphClk / usartdiv;
1071  }
1072  }
1073  return (brrresult);
1074 }
1075 #else
1076 /**
1077  * @brief Configure USART BRR register for achieving expected Baud Rate value.
1078  * @note Compute and set USARTDIV value in BRR Register (full BRR content)
1079  * according to used Peripheral Clock, Oversampling mode, and expected Baud Rate values
1080  * @note Peripheral clock and Baud rate values provided as function parameters should be valid
1081  * (Baud rate value != 0)
1082  * @rmtoll BRR BRR LL_USART_SetBaudRate
1083  * @param USARTx USART Instance
1084  * @param PeriphClk Peripheral Clock
1085  * @param BaudRate Baud Rate
1086  * @retval None
1087  */
1088 __STATIC_INLINE void LL_USART_SetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t BaudRate)
1089 {
1090  USARTx->BRR = (uint16_t)(__LL_USART_DIV_SAMPLING16(PeriphClk, BaudRate));
1091 }
1092 
1093 /**
1094  * @brief Return current Baud Rate value, according to USARTDIV present in BRR register
1095  * (full BRR content), and to used Peripheral Clock and Oversampling mode values
1096  * @note In case of non-initialized or invalid value stored in BRR register, value 0 will be returned.
1097  * @rmtoll BRR BRR LL_USART_GetBaudRate
1098  * @param USARTx USART Instance
1099  * @param PeriphClk Peripheral Clock
1100  * @retval Baud Rate
1101  */
1102 __STATIC_INLINE uint32_t LL_USART_GetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk)
1103 {
1104  uint32_t usartdiv = 0x0U;
1105  uint32_t brrresult = 0x0U;
1106 
1107  usartdiv = USARTx->BRR;
1108 
1109  if ((usartdiv & 0xFFFFU) != 0U)
1110  {
1111  brrresult = PeriphClk / usartdiv;
1112  }
1113  return (brrresult);
1114 }
1115 #endif /* USART_OverSampling_Feature */
1116 
1117 /**
1118  * @}
1119  */
1120 
1121 /** @defgroup USART_LL_EF_Configuration_IRDA Configuration functions related to Irda feature
1122  * @{
1123  */
1124 
1125 /**
1126  * @brief Enable IrDA mode
1127  * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
1128  * IrDA feature is supported by the USARTx instance.
1129  * @rmtoll CR3 IREN LL_USART_EnableIrda
1130  * @param USARTx USART Instance
1131  * @retval None
1132  */
1133 __STATIC_INLINE void LL_USART_EnableIrda(USART_TypeDef *USARTx)
1134 {
1135  SET_BIT(USARTx->CR3, USART_CR3_IREN);
1136 }
1137 
1138 /**
1139  * @brief Disable IrDA mode
1140  * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
1141  * IrDA feature is supported by the USARTx instance.
1142  * @rmtoll CR3 IREN LL_USART_DisableIrda
1143  * @param USARTx USART Instance
1144  * @retval None
1145  */
1146 __STATIC_INLINE void LL_USART_DisableIrda(USART_TypeDef *USARTx)
1147 {
1148  CLEAR_BIT(USARTx->CR3, USART_CR3_IREN);
1149 }
1150 
1151 /**
1152  * @brief Indicate if IrDA mode is enabled
1153  * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
1154  * IrDA feature is supported by the USARTx instance.
1155  * @rmtoll CR3 IREN LL_USART_IsEnabledIrda
1156  * @param USARTx USART Instance
1157  * @retval State of bit (1 or 0).
1158  */
1159 __STATIC_INLINE uint32_t LL_USART_IsEnabledIrda(USART_TypeDef *USARTx)
1160 {
1161  return (READ_BIT(USARTx->CR3, USART_CR3_IREN) == (USART_CR3_IREN));
1162 }
1163 
1164 /**
1165  * @brief Configure IrDA Power Mode (Normal or Low Power)
1166  * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
1167  * IrDA feature is supported by the USARTx instance.
1168  * @rmtoll CR3 IRLP LL_USART_SetIrdaPowerMode
1169  * @param USARTx USART Instance
1170  * @param PowerMode This parameter can be one of the following values:
1171  * @arg @ref LL_USART_IRDA_POWER_NORMAL
1172  * @arg @ref LL_USART_IRDA_POWER_LOW
1173  * @retval None
1174  */
1175 __STATIC_INLINE void LL_USART_SetIrdaPowerMode(USART_TypeDef *USARTx, uint32_t PowerMode)
1176 {
1177  MODIFY_REG(USARTx->CR3, USART_CR3_IRLP, PowerMode);
1178 }
1179 
1180 /**
1181  * @brief Retrieve IrDA Power Mode configuration (Normal or Low Power)
1182  * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
1183  * IrDA feature is supported by the USARTx instance.
1184  * @rmtoll CR3 IRLP LL_USART_GetIrdaPowerMode
1185  * @param USARTx USART Instance
1186  * @retval Returned value can be one of the following values:
1187  * @arg @ref LL_USART_IRDA_POWER_NORMAL
1188  * @arg @ref LL_USART_PHASE_2EDGE
1189  */
1190 __STATIC_INLINE uint32_t LL_USART_GetIrdaPowerMode(USART_TypeDef *USARTx)
1191 {
1192  return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_IRLP));
1193 }
1194 
1195 /**
1196  * @brief Set Irda prescaler value, used for dividing the USART clock source
1197  * to achieve the Irda Low Power frequency (8 bits value)
1198  * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
1199  * IrDA feature is supported by the USARTx instance.
1200  * @rmtoll GTPR PSC LL_USART_SetIrdaPrescaler
1201  * @param USARTx USART Instance
1202  * @param PrescalerValue Value between Min_Data=0x00 and Max_Data=0xFF
1203  * @retval None
1204  */
1205 __STATIC_INLINE void LL_USART_SetIrdaPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue)
1206 {
1207  MODIFY_REG(USARTx->GTPR, USART_GTPR_PSC, PrescalerValue);
1208 }
1209 
1210 /**
1211  * @brief Return Irda prescaler value, used for dividing the USART clock source
1212  * to achieve the Irda Low Power frequency (8 bits value)
1213  * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
1214  * IrDA feature is supported by the USARTx instance.
1215  * @rmtoll GTPR PSC LL_USART_GetIrdaPrescaler
1216  * @param USARTx USART Instance
1217  * @retval Irda prescaler value (Value between Min_Data=0x00 and Max_Data=0xFF)
1218  */
1219 __STATIC_INLINE uint32_t LL_USART_GetIrdaPrescaler(USART_TypeDef *USARTx)
1220 {
1221  return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_PSC));
1222 }
1223 
1224 /**
1225  * @}
1226  */
1227 
1228 /** @defgroup USART_LL_EF_Configuration_Smartcard Configuration functions related to Smartcard feature
1229  * @{
1230  */
1231 
1232 /**
1233  * @brief Enable Smartcard NACK transmission
1234  * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
1235  * Smartcard feature is supported by the USARTx instance.
1236  * @rmtoll CR3 NACK LL_USART_EnableSmartcardNACK
1237  * @param USARTx USART Instance
1238  * @retval None
1239  */
1240 __STATIC_INLINE void LL_USART_EnableSmartcardNACK(USART_TypeDef *USARTx)
1241 {
1242  SET_BIT(USARTx->CR3, USART_CR3_NACK);
1243 }
1244 
1245 /**
1246  * @brief Disable Smartcard NACK transmission
1247  * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
1248  * Smartcard feature is supported by the USARTx instance.
1249  * @rmtoll CR3 NACK LL_USART_DisableSmartcardNACK
1250  * @param USARTx USART Instance
1251  * @retval None
1252  */
1253 __STATIC_INLINE void LL_USART_DisableSmartcardNACK(USART_TypeDef *USARTx)
1254 {
1255  CLEAR_BIT(USARTx->CR3, USART_CR3_NACK);
1256 }
1257 
1258 /**
1259  * @brief Indicate if Smartcard NACK transmission is enabled
1260  * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
1261  * Smartcard feature is supported by the USARTx instance.
1262  * @rmtoll CR3 NACK LL_USART_IsEnabledSmartcardNACK
1263  * @param USARTx USART Instance
1264  * @retval State of bit (1 or 0).
1265  */
1266 __STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcardNACK(USART_TypeDef *USARTx)
1267 {
1268  return (READ_BIT(USARTx->CR3, USART_CR3_NACK) == (USART_CR3_NACK));
1269 }
1270 
1271 /**
1272  * @brief Enable Smartcard mode
1273  * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
1274  * Smartcard feature is supported by the USARTx instance.
1275  * @rmtoll CR3 SCEN LL_USART_EnableSmartcard
1276  * @param USARTx USART Instance
1277  * @retval None
1278  */
1279 __STATIC_INLINE void LL_USART_EnableSmartcard(USART_TypeDef *USARTx)
1280 {
1281  SET_BIT(USARTx->CR3, USART_CR3_SCEN);
1282 }
1283 
1284 /**
1285  * @brief Disable Smartcard mode
1286  * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
1287  * Smartcard feature is supported by the USARTx instance.
1288  * @rmtoll CR3 SCEN LL_USART_DisableSmartcard
1289  * @param USARTx USART Instance
1290  * @retval None
1291  */
1292 __STATIC_INLINE void LL_USART_DisableSmartcard(USART_TypeDef *USARTx)
1293 {
1294  CLEAR_BIT(USARTx->CR3, USART_CR3_SCEN);
1295 }
1296 
1297 /**
1298  * @brief Indicate if Smartcard mode is enabled
1299  * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
1300  * Smartcard feature is supported by the USARTx instance.
1301  * @rmtoll CR3 SCEN LL_USART_IsEnabledSmartcard
1302  * @param USARTx USART Instance
1303  * @retval State of bit (1 or 0).
1304  */
1305 __STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcard(USART_TypeDef *USARTx)
1306 {
1307  return (READ_BIT(USARTx->CR3, USART_CR3_SCEN) == (USART_CR3_SCEN));
1308 }
1309 
1310 /**
1311  * @brief Set Smartcard prescaler value, used for dividing the USART clock
1312  * source to provide the SMARTCARD Clock (5 bits value)
1313  * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
1314  * Smartcard feature is supported by the USARTx instance.
1315  * @rmtoll GTPR PSC LL_USART_SetSmartcardPrescaler
1316  * @param USARTx USART Instance
1317  * @param PrescalerValue Value between Min_Data=0 and Max_Data=31
1318  * @retval None
1319  */
1320 __STATIC_INLINE void LL_USART_SetSmartcardPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue)
1321 {
1322  MODIFY_REG(USARTx->GTPR, USART_GTPR_PSC, PrescalerValue);
1323 }
1324 
1325 /**
1326  * @brief Return Smartcard prescaler value, used for dividing the USART clock
1327  * source to provide the SMARTCARD Clock (5 bits value)
1328  * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
1329  * Smartcard feature is supported by the USARTx instance.
1330  * @rmtoll GTPR PSC LL_USART_GetSmartcardPrescaler
1331  * @param USARTx USART Instance
1332  * @retval Smartcard prescaler value (Value between Min_Data=0 and Max_Data=31)
1333  */
1334 __STATIC_INLINE uint32_t LL_USART_GetSmartcardPrescaler(USART_TypeDef *USARTx)
1335 {
1336  return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_PSC));
1337 }
1338 
1339 /**
1340  * @brief Set Smartcard Guard time value, expressed in nb of baud clocks periods
1341  * (GT[7:0] bits : Guard time value)
1342  * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
1343  * Smartcard feature is supported by the USARTx instance.
1344  * @rmtoll GTPR GT LL_USART_SetSmartcardGuardTime
1345  * @param USARTx USART Instance
1346  * @param GuardTime Value between Min_Data=0x00 and Max_Data=0xFF
1347  * @retval None
1348  */
1349 __STATIC_INLINE void LL_USART_SetSmartcardGuardTime(USART_TypeDef *USARTx, uint32_t GuardTime)
1350 {
1351  MODIFY_REG(USARTx->GTPR, USART_GTPR_GT, GuardTime << USART_POSITION_GTPR_GT);
1352 }
1353 
1354 /**
1355  * @brief Return Smartcard Guard time value, expressed in nb of baud clocks periods
1356  * (GT[7:0] bits : Guard time value)
1357  * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
1358  * Smartcard feature is supported by the USARTx instance.
1359  * @rmtoll GTPR GT LL_USART_GetSmartcardGuardTime
1360  * @param USARTx USART Instance
1361  * @retval Smartcard Guard time value (Value between Min_Data=0x00 and Max_Data=0xFF)
1362  */
1363 __STATIC_INLINE uint32_t LL_USART_GetSmartcardGuardTime(USART_TypeDef *USARTx)
1364 {
1365  return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_GT) >> USART_POSITION_GTPR_GT);
1366 }
1367 
1368 /**
1369  * @}
1370  */
1371 
1372 /** @defgroup USART_LL_EF_Configuration_HalfDuplex Configuration functions related to Half Duplex feature
1373  * @{
1374  */
1375 
1376 /**
1377  * @brief Enable Single Wire Half-Duplex mode
1378  * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
1379  * Half-Duplex mode is supported by the USARTx instance.
1380  * @rmtoll CR3 HDSEL LL_USART_EnableHalfDuplex
1381  * @param USARTx USART Instance
1382  * @retval None
1383  */
1384 __STATIC_INLINE void LL_USART_EnableHalfDuplex(USART_TypeDef *USARTx)
1385 {
1386  SET_BIT(USARTx->CR3, USART_CR3_HDSEL);
1387 }
1388 
1389 /**
1390  * @brief Disable Single Wire Half-Duplex mode
1391  * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
1392  * Half-Duplex mode is supported by the USARTx instance.
1393  * @rmtoll CR3 HDSEL LL_USART_DisableHalfDuplex
1394  * @param USARTx USART Instance
1395  * @retval None
1396  */
1397 __STATIC_INLINE void LL_USART_DisableHalfDuplex(USART_TypeDef *USARTx)
1398 {
1399  CLEAR_BIT(USARTx->CR3, USART_CR3_HDSEL);
1400 }
1401 
1402 /**
1403  * @brief Indicate if Single Wire Half-Duplex mode is enabled
1404  * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
1405  * Half-Duplex mode is supported by the USARTx instance.
1406  * @rmtoll CR3 HDSEL LL_USART_IsEnabledHalfDuplex
1407  * @param USARTx USART Instance
1408  * @retval State of bit (1 or 0).
1409  */
1410 __STATIC_INLINE uint32_t LL_USART_IsEnabledHalfDuplex(USART_TypeDef *USARTx)
1411 {
1412  return (READ_BIT(USARTx->CR3, USART_CR3_HDSEL) == (USART_CR3_HDSEL));
1413 }
1414 
1415 /**
1416  * @}
1417  */
1418 
1419 /** @defgroup USART_LL_EF_Configuration_LIN Configuration functions related to LIN feature
1420  * @{
1421  */
1422 
1423 /**
1424  * @brief Set LIN Break Detection Length
1425  * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
1426  * LIN feature is supported by the USARTx instance.
1427  * @rmtoll CR2 LBDL LL_USART_SetLINBrkDetectionLen
1428  * @param USARTx USART Instance
1429  * @param LINBDLength This parameter can be one of the following values:
1430  * @arg @ref LL_USART_LINBREAK_DETECT_10B
1431  * @arg @ref LL_USART_LINBREAK_DETECT_11B
1432  * @retval None
1433  */
1434 __STATIC_INLINE void LL_USART_SetLINBrkDetectionLen(USART_TypeDef *USARTx, uint32_t LINBDLength)
1435 {
1436  MODIFY_REG(USARTx->CR2, USART_CR2_LBDL, LINBDLength);
1437 }
1438 
1439 /**
1440  * @brief Return LIN Break Detection Length
1441  * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
1442  * LIN feature is supported by the USARTx instance.
1443  * @rmtoll CR2 LBDL LL_USART_GetLINBrkDetectionLen
1444  * @param USARTx USART Instance
1445  * @retval Returned value can be one of the following values:
1446  * @arg @ref LL_USART_LINBREAK_DETECT_10B
1447  * @arg @ref LL_USART_LINBREAK_DETECT_11B
1448  */
1449 __STATIC_INLINE uint32_t LL_USART_GetLINBrkDetectionLen(USART_TypeDef *USARTx)
1450 {
1451  return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_LBDL));
1452 }
1453 
1454 /**
1455  * @brief Enable LIN mode
1456  * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
1457  * LIN feature is supported by the USARTx instance.
1458  * @rmtoll CR2 LINEN LL_USART_EnableLIN
1459  * @param USARTx USART Instance
1460  * @retval None
1461  */
1462 __STATIC_INLINE void LL_USART_EnableLIN(USART_TypeDef *USARTx)
1463 {
1464  SET_BIT(USARTx->CR2, USART_CR2_LINEN);
1465 }
1466 
1467 /**
1468  * @brief Disable LIN mode
1469  * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
1470  * LIN feature is supported by the USARTx instance.
1471  * @rmtoll CR2 LINEN LL_USART_DisableLIN
1472  * @param USARTx USART Instance
1473  * @retval None
1474  */
1475 __STATIC_INLINE void LL_USART_DisableLIN(USART_TypeDef *USARTx)
1476 {
1477  CLEAR_BIT(USARTx->CR2, USART_CR2_LINEN);
1478 }
1479 
1480 /**
1481  * @brief Indicate if LIN mode is enabled
1482  * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
1483  * LIN feature is supported by the USARTx instance.
1484  * @rmtoll CR2 LINEN LL_USART_IsEnabledLIN
1485  * @param USARTx USART Instance
1486  * @retval State of bit (1 or 0).
1487  */
1488 __STATIC_INLINE uint32_t LL_USART_IsEnabledLIN(USART_TypeDef *USARTx)
1489 {
1490  return (READ_BIT(USARTx->CR2, USART_CR2_LINEN) == (USART_CR2_LINEN));
1491 }
1492 
1493 /**
1494  * @}
1495  */
1496 
1497 /** @defgroup USART_LL_EF_AdvancedConfiguration Advanced Configurations services
1498  * @{
1499  */
1500 
1501 /**
1502  * @brief Perform basic configuration of USART for enabling use in Asynchronous Mode (UART)
1503  * @note In UART mode, the following bits must be kept cleared:
1504  * - LINEN bit in the USART_CR2 register,
1505  * - CLKEN bit in the USART_CR2 register,
1506  * - SCEN bit in the USART_CR3 register,
1507  * - IREN bit in the USART_CR3 register,
1508  * - HDSEL bit in the USART_CR3 register.
1509  * @note Call of this function is equivalent to following function call sequence :
1510  * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
1511  * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
1512  * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
1513  * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
1514  * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
1515  * @note Other remaining configurations items related to Asynchronous Mode
1516  * (as Baud Rate, Word length, Parity, ...) should be set using
1517  * dedicated functions
1518  * @rmtoll CR2 LINEN LL_USART_ConfigAsyncMode\n
1519  * CR2 CLKEN LL_USART_ConfigAsyncMode\n
1520  * CR3 SCEN LL_USART_ConfigAsyncMode\n
1521  * CR3 IREN LL_USART_ConfigAsyncMode\n
1522  * CR3 HDSEL LL_USART_ConfigAsyncMode
1523  * @param USARTx USART Instance
1524  * @retval None
1525  */
1526 __STATIC_INLINE void LL_USART_ConfigAsyncMode(USART_TypeDef *USARTx)
1527 {
1528  /* In Asynchronous mode, the following bits must be kept cleared:
1529  - LINEN, CLKEN bits in the USART_CR2 register,
1530  - SCEN, IREN and HDSEL bits in the USART_CR3 register.*/
1531  CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
1532  CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL));
1533 }
1534 
1535 /**
1536  * @brief Perform basic configuration of USART for enabling use in Synchronous Mode
1537  * @note In Synchronous mode, the following bits must be kept cleared:
1538  * - LINEN bit in the USART_CR2 register,
1539  * - SCEN bit in the USART_CR3 register,
1540  * - IREN bit in the USART_CR3 register,
1541  * - HDSEL bit in the USART_CR3 register.
1542  * This function also sets the USART in Synchronous mode.
1543  * @note Macro @ref IS_USART_INSTANCE(USARTx) can be used to check whether or not
1544  * Synchronous mode is supported by the USARTx instance.
1545  * @note Call of this function is equivalent to following function call sequence :
1546  * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
1547  * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
1548  * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
1549  * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
1550  * - Set CLKEN in CR2 using @ref LL_USART_EnableSCLKOutput() function
1551  * @note Other remaining configurations items related to Synchronous Mode
1552  * (as Baud Rate, Word length, Parity, Clock Polarity, ...) should be set using
1553  * dedicated functions
1554  * @rmtoll CR2 LINEN LL_USART_ConfigSyncMode\n
1555  * CR2 CLKEN LL_USART_ConfigSyncMode\n
1556  * CR3 SCEN LL_USART_ConfigSyncMode\n
1557  * CR3 IREN LL_USART_ConfigSyncMode\n
1558  * CR3 HDSEL LL_USART_ConfigSyncMode
1559  * @param USARTx USART Instance
1560  * @retval None
1561  */
1562 __STATIC_INLINE void LL_USART_ConfigSyncMode(USART_TypeDef *USARTx)
1563 {
1564  /* In Synchronous mode, the following bits must be kept cleared:
1565  - LINEN bit in the USART_CR2 register,
1566  - SCEN, IREN and HDSEL bits in the USART_CR3 register.*/
1567  CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN));
1568  CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL));
1569  /* set the UART/USART in Synchronous mode */
1570  SET_BIT(USARTx->CR2, USART_CR2_CLKEN);
1571 }
1572 
1573 /**
1574  * @brief Perform basic configuration of USART for enabling use in LIN Mode
1575  * @note In LIN mode, the following bits must be kept cleared:
1576  * - STOP and CLKEN bits in the USART_CR2 register,
1577  * - SCEN bit in the USART_CR3 register,
1578  * - IREN bit in the USART_CR3 register,
1579  * - HDSEL bit in the USART_CR3 register.
1580  * This function also set the UART/USART in LIN mode.
1581  * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
1582  * LIN feature is supported by the USARTx instance.
1583  * @note Call of this function is equivalent to following function call sequence :
1584  * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
1585  * - Clear STOP in CR2 using @ref LL_USART_SetStopBitsLength() function
1586  * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
1587  * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
1588  * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
1589  * - Set LINEN in CR2 using @ref LL_USART_EnableLIN() function
1590  * @note Other remaining configurations items related to LIN Mode
1591  * (as Baud Rate, Word length, LIN Break Detection Length, ...) should be set using
1592  * dedicated functions
1593  * @rmtoll CR2 CLKEN LL_USART_ConfigLINMode\n
1594  * CR2 STOP LL_USART_ConfigLINMode\n
1595  * CR2 LINEN LL_USART_ConfigLINMode\n
1596  * CR3 IREN LL_USART_ConfigLINMode\n
1597  * CR3 SCEN LL_USART_ConfigLINMode\n
1598  * CR3 HDSEL LL_USART_ConfigLINMode
1599  * @param USARTx USART Instance
1600  * @retval None
1601  */
1602 __STATIC_INLINE void LL_USART_ConfigLINMode(USART_TypeDef *USARTx)
1603 {
1604  /* In LIN mode, the following bits must be kept cleared:
1605  - STOP and CLKEN bits in the USART_CR2 register,
1606  - IREN, SCEN and HDSEL bits in the USART_CR3 register.*/
1607  CLEAR_BIT(USARTx->CR2, (USART_CR2_CLKEN | USART_CR2_STOP));
1608  CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL));
1609  /* Set the UART/USART in LIN mode */
1610  SET_BIT(USARTx->CR2, USART_CR2_LINEN);
1611 }
1612 
1613 /**
1614  * @brief Perform basic configuration of USART for enabling use in Half Duplex Mode
1615  * @note In Half Duplex mode, the following bits must be kept cleared:
1616  * - LINEN bit in the USART_CR2 register,
1617  * - CLKEN bit in the USART_CR2 register,
1618  * - SCEN bit in the USART_CR3 register,
1619  * - IREN bit in the USART_CR3 register,
1620  * This function also sets the UART/USART in Half Duplex mode.
1621  * @note Macro @ref IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
1622  * Half-Duplex mode is supported by the USARTx instance.
1623  * @note Call of this function is equivalent to following function call sequence :
1624  * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
1625  * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
1626  * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
1627  * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
1628  * - Set HDSEL in CR3 using @ref LL_USART_EnableHalfDuplex() function
1629  * @note Other remaining configurations items related to Half Duplex Mode
1630  * (as Baud Rate, Word length, Parity, ...) should be set using
1631  * dedicated functions
1632  * @rmtoll CR2 LINEN LL_USART_ConfigHalfDuplexMode\n
1633  * CR2 CLKEN LL_USART_ConfigHalfDuplexMode\n
1634  * CR3 HDSEL LL_USART_ConfigHalfDuplexMode\n
1635  * CR3 SCEN LL_USART_ConfigHalfDuplexMode\n
1636  * CR3 IREN LL_USART_ConfigHalfDuplexMode
1637  * @param USARTx USART Instance
1638  * @retval None
1639  */
1640 __STATIC_INLINE void LL_USART_ConfigHalfDuplexMode(USART_TypeDef *USARTx)
1641 {
1642  /* In Half Duplex mode, the following bits must be kept cleared:
1643  - LINEN and CLKEN bits in the USART_CR2 register,
1644  - SCEN and IREN bits in the USART_CR3 register.*/
1645  CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
1646  CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN));
1647  /* set the UART/USART in Half Duplex mode */
1648  SET_BIT(USARTx->CR3, USART_CR3_HDSEL);
1649 }
1650 
1651 /**
1652  * @brief Perform basic configuration of USART for enabling use in Smartcard Mode
1653  * @note In Smartcard mode, the following bits must be kept cleared:
1654  * - LINEN bit in the USART_CR2 register,
1655  * - IREN bit in the USART_CR3 register,
1656  * - HDSEL bit in the USART_CR3 register.
1657  * This function also configures Stop bits to 1.5 bits and
1658  * sets the USART in Smartcard mode (SCEN bit).
1659  * Clock Output is also enabled (CLKEN).
1660  * @note Macro @ref IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
1661  * Smartcard feature is supported by the USARTx instance.
1662  * @note Call of this function is equivalent to following function call sequence :
1663  * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
1664  * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
1665  * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
1666  * - Configure STOP in CR2 using @ref LL_USART_SetStopBitsLength() function
1667  * - Set CLKEN in CR2 using @ref LL_USART_EnableSCLKOutput() function
1668  * - Set SCEN in CR3 using @ref LL_USART_EnableSmartcard() function
1669  * @note Other remaining configurations items related to Smartcard Mode
1670  * (as Baud Rate, Word length, Parity, ...) should be set using
1671  * dedicated functions
1672  * @rmtoll CR2 LINEN LL_USART_ConfigSmartcardMode\n
1673  * CR2 STOP LL_USART_ConfigSmartcardMode\n
1674  * CR2 CLKEN LL_USART_ConfigSmartcardMode\n
1675  * CR3 HDSEL LL_USART_ConfigSmartcardMode\n
1676  * CR3 SCEN LL_USART_ConfigSmartcardMode
1677  * @param USARTx USART Instance
1678  * @retval None
1679  */
1680 __STATIC_INLINE void LL_USART_ConfigSmartcardMode(USART_TypeDef *USARTx)
1681 {
1682  /* In Smartcard mode, the following bits must be kept cleared:
1683  - LINEN bit in the USART_CR2 register,
1684  - IREN and HDSEL bits in the USART_CR3 register.*/
1685  CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN));
1686  CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL));
1687  /* Configure Stop bits to 1.5 bits */
1688  /* Synchronous mode is activated by default */
1689  SET_BIT(USARTx->CR2, (USART_CR2_STOP_0 | USART_CR2_STOP_1 | USART_CR2_CLKEN));
1690  /* set the UART/USART in Smartcard mode */
1691  SET_BIT(USARTx->CR3, USART_CR3_SCEN);
1692 }
1693 
1694 /**
1695  * @brief Perform basic configuration of USART for enabling use in Irda Mode
1696  * @note In IRDA mode, the following bits must be kept cleared:
1697  * - LINEN bit in the USART_CR2 register,
1698  * - STOP and CLKEN bits in the USART_CR2 register,
1699  * - SCEN bit in the USART_CR3 register,
1700  * - HDSEL bit in the USART_CR3 register.
1701  * This function also sets the UART/USART in IRDA mode (IREN bit).
1702  * @note Macro @ref IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
1703  * IrDA feature is supported by the USARTx instance.
1704  * @note Call of this function is equivalent to following function call sequence :
1705  * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
1706  * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
1707  * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
1708  * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
1709  * - Configure STOP in CR2 using @ref LL_USART_SetStopBitsLength() function
1710  * - Set IREN in CR3 using @ref LL_USART_EnableIrda() function
1711  * @note Other remaining configurations items related to Irda Mode
1712  * (as Baud Rate, Word length, Power mode, ...) should be set using
1713  * dedicated functions
1714  * @rmtoll CR2 LINEN LL_USART_ConfigIrdaMode\n
1715  * CR2 CLKEN LL_USART_ConfigIrdaMode\n
1716  * CR2 STOP LL_USART_ConfigIrdaMode\n
1717  * CR3 SCEN LL_USART_ConfigIrdaMode\n
1718  * CR3 HDSEL LL_USART_ConfigIrdaMode\n
1719  * CR3 IREN LL_USART_ConfigIrdaMode
1720  * @param USARTx USART Instance
1721  * @retval None
1722  */
1723 __STATIC_INLINE void LL_USART_ConfigIrdaMode(USART_TypeDef *USARTx)
1724 {
1725  /* In IRDA mode, the following bits must be kept cleared:
1726  - LINEN, STOP and CLKEN bits in the USART_CR2 register,
1727  - SCEN and HDSEL bits in the USART_CR3 register.*/
1728  CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN | USART_CR2_STOP));
1729  CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL));
1730  /* set the UART/USART in IRDA mode */
1731  SET_BIT(USARTx->CR3, USART_CR3_IREN);
1732 }
1733 
1734 /**
1735  * @brief Perform basic configuration of USART for enabling use in Multi processor Mode
1736  * (several USARTs connected in a network, one of the USARTs can be the master,
1737  * its TX output connected to the RX inputs of the other slaves USARTs).
1738  * @note In MultiProcessor mode, the following bits must be kept cleared:
1739  * - LINEN bit in the USART_CR2 register,
1740  * - CLKEN bit in the USART_CR2 register,
1741  * - SCEN bit in the USART_CR3 register,
1742  * - IREN bit in the USART_CR3 register,
1743  * - HDSEL bit in the USART_CR3 register.
1744  * @note Call of this function is equivalent to following function call sequence :
1745  * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
1746  * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
1747  * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
1748  * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
1749  * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
1750  * @note Other remaining configurations items related to Multi processor Mode
1751  * (as Baud Rate, Wake Up Method, Node address, ...) should be set using
1752  * dedicated functions
1753  * @rmtoll CR2 LINEN LL_USART_ConfigMultiProcessMode\n
1754  * CR2 CLKEN LL_USART_ConfigMultiProcessMode\n
1755  * CR3 SCEN LL_USART_ConfigMultiProcessMode\n
1756  * CR3 HDSEL LL_USART_ConfigMultiProcessMode\n
1757  * CR3 IREN LL_USART_ConfigMultiProcessMode
1758  * @param USARTx USART Instance
1759  * @retval None
1760  */
1761 __STATIC_INLINE void LL_USART_ConfigMultiProcessMode(USART_TypeDef *USARTx)
1762 {
1763  /* In Multi Processor mode, the following bits must be kept cleared:
1764  - LINEN and CLKEN bits in the USART_CR2 register,
1765  - IREN, SCEN and HDSEL bits in the USART_CR3 register.*/
1766  CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
1767  CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
1768 }
1769 
1770 /**
1771  * @}
1772  */
1773 
1774 /** @defgroup USART_LL_EF_FLAG_Management FLAG_Management
1775  * @{
1776  */
1777 
1778 /**
1779  * @brief Check if the USART Parity Error Flag is set or not
1780  * @rmtoll SR PE LL_USART_IsActiveFlag_PE
1781  * @param USARTx USART Instance
1782  * @retval State of bit (1 or 0).
1783  */
1784 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_PE(USART_TypeDef *USARTx)
1785 {
1786  return (READ_BIT(USARTx->SR, USART_SR_PE) == (USART_SR_PE));
1787 }
1788 
1789 /**
1790  * @brief Check if the USART Framing Error Flag is set or not
1791  * @rmtoll SR FE LL_USART_IsActiveFlag_FE
1792  * @param USARTx USART Instance
1793  * @retval State of bit (1 or 0).
1794  */
1795 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_FE(USART_TypeDef *USARTx)
1796 {
1797  return (READ_BIT(USARTx->SR, USART_SR_FE) == (USART_SR_FE));
1798 }
1799 
1800 /**
1801  * @brief Check if the USART Noise error detected Flag is set or not
1802  * @rmtoll SR NF LL_USART_IsActiveFlag_NE
1803  * @param USARTx USART Instance
1804  * @retval State of bit (1 or 0).
1805  */
1806 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_NE(USART_TypeDef *USARTx)
1807 {
1808  return (READ_BIT(USARTx->SR, USART_SR_NE) == (USART_SR_NE));
1809 }
1810 
1811 /**
1812  * @brief Check if the USART OverRun Error Flag is set or not
1813  * @rmtoll SR ORE LL_USART_IsActiveFlag_ORE
1814  * @param USARTx USART Instance
1815  * @retval State of bit (1 or 0).
1816  */
1817 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ORE(USART_TypeDef *USARTx)
1818 {
1819  return (READ_BIT(USARTx->SR, USART_SR_ORE) == (USART_SR_ORE));
1820 }
1821 
1822 /**
1823  * @brief Check if the USART IDLE line detected Flag is set or not
1824  * @rmtoll SR IDLE LL_USART_IsActiveFlag_IDLE
1825  * @param USARTx USART Instance
1826  * @retval State of bit (1 or 0).
1827  */
1828 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_IDLE(USART_TypeDef *USARTx)
1829 {
1830  return (READ_BIT(USARTx->SR, USART_SR_IDLE) == (USART_SR_IDLE));
1831 }
1832 
1833 /**
1834  * @brief Check if the USART Read Data Register Not Empty Flag is set or not
1835  * @rmtoll SR RXNE LL_USART_IsActiveFlag_RXNE
1836  * @param USARTx USART Instance
1837  * @retval State of bit (1 or 0).
1838  */
1839 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RXNE(USART_TypeDef *USARTx)
1840 {
1841  return (READ_BIT(USARTx->SR, USART_SR_RXNE) == (USART_SR_RXNE));
1842 }
1843 
1844 /**
1845  * @brief Check if the USART Transmission Complete Flag is set or not
1846  * @rmtoll SR TC LL_USART_IsActiveFlag_TC
1847  * @param USARTx USART Instance
1848  * @retval State of bit (1 or 0).
1849  */
1850 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TC(USART_TypeDef *USARTx)
1851 {
1852  return (READ_BIT(USARTx->SR, USART_SR_TC) == (USART_SR_TC));
1853 }
1854 
1855 /**
1856  * @brief Check if the USART Transmit Data Register Empty Flag is set or not
1857  * @rmtoll SR TXE LL_USART_IsActiveFlag_TXE
1858  * @param USARTx USART Instance
1859  * @retval State of bit (1 or 0).
1860  */
1861 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TXE(USART_TypeDef *USARTx)
1862 {
1863  return (READ_BIT(USARTx->SR, USART_SR_TXE) == (USART_SR_TXE));
1864 }
1865 
1866 /**
1867  * @brief Check if the USART LIN Break Detection Flag is set or not
1868  * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
1869  * LIN feature is supported by the USARTx instance.
1870  * @rmtoll SR LBD LL_USART_IsActiveFlag_LBD
1871  * @param USARTx USART Instance
1872  * @retval State of bit (1 or 0).
1873  */
1874 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_LBD(USART_TypeDef *USARTx)
1875 {
1876  return (READ_BIT(USARTx->SR, USART_SR_LBD) == (USART_SR_LBD));
1877 }
1878 
1879 /**
1880  * @brief Check if the USART CTS Flag is set or not
1881  * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
1882  * Hardware Flow control feature is supported by the USARTx instance.
1883  * @rmtoll SR CTS LL_USART_IsActiveFlag_nCTS
1884  * @param USARTx USART Instance
1885  * @retval State of bit (1 or 0).
1886  */
1887 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_nCTS(USART_TypeDef *USARTx)
1888 {
1889  return (READ_BIT(USARTx->SR, USART_SR_CTS) == (USART_SR_CTS));
1890 }
1891 
1892 /**
1893  * @brief Check if the USART Send Break Flag is set or not
1894  * @rmtoll CR1 SBK LL_USART_IsActiveFlag_SBK
1895  * @param USARTx USART Instance
1896  * @retval State of bit (1 or 0).
1897  */
1898 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_SBK(USART_TypeDef *USARTx)
1899 {
1900  return (READ_BIT(USARTx->CR1, USART_CR1_SBK) == (USART_CR1_SBK));
1901 }
1902 
1903 /**
1904  * @brief Check if the USART Receive Wake Up from mute mode Flag is set or not
1905  * @rmtoll CR1 RWU LL_USART_IsActiveFlag_RWU
1906  * @param USARTx USART Instance
1907  * @retval State of bit (1 or 0).
1908  */
1909 __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RWU(USART_TypeDef *USARTx)
1910 {
1911  return (READ_BIT(USARTx->CR1, USART_CR1_RWU) == (USART_CR1_RWU));
1912 }
1913 
1914 /**
1915  * @brief Clear Parity Error Flag
1916  * @note Clearing this flag is done by a read access to the USARTx_SR
1917  * register followed by a read access to the USARTx_DR register.
1918  * @note Please also consider that when clearing this flag, other flags as
1919  * NE, FE, ORE, IDLE would also be cleared.
1920  * @rmtoll SR PE LL_USART_ClearFlag_PE
1921  * @param USARTx USART Instance
1922  * @retval None
1923  */
1924 __STATIC_INLINE void LL_USART_ClearFlag_PE(USART_TypeDef *USARTx)
1925 {
1926  __IO uint32_t tmpreg;
1927  tmpreg = USARTx->SR;
1928  (void) tmpreg;
1929  tmpreg = USARTx->DR;
1930  (void) tmpreg;
1931 }
1932 
1933 /**
1934  * @brief Clear Framing Error Flag
1935  * @note Clearing this flag is done by a read access to the USARTx_SR
1936  * register followed by a read access to the USARTx_DR register.
1937  * @note Please also consider that when clearing this flag, other flags as
1938  * PE, NE, ORE, IDLE would also be cleared.
1939  * @rmtoll SR FE LL_USART_ClearFlag_FE
1940  * @param USARTx USART Instance
1941  * @retval None
1942  */
1943 __STATIC_INLINE void LL_USART_ClearFlag_FE(USART_TypeDef *USARTx)
1944 {
1945  __IO uint32_t tmpreg;
1946  tmpreg = USARTx->SR;
1947  (void) tmpreg;
1948  tmpreg = USARTx->DR;
1949  (void) tmpreg;
1950 }
1951 
1952 /**
1953  * @brief Clear Noise detected Flag
1954  * @note Clearing this flag is done by a read access to the USARTx_SR
1955  * register followed by a read access to the USARTx_DR register.
1956  * @note Please also consider that when clearing this flag, other flags as
1957  * PE, FE, ORE, IDLE would also be cleared.
1958  * @rmtoll SR NF LL_USART_ClearFlag_NE
1959  * @param USARTx USART Instance
1960  * @retval None
1961  */
1962 __STATIC_INLINE void LL_USART_ClearFlag_NE(USART_TypeDef *USARTx)
1963 {
1964  __IO uint32_t tmpreg;
1965  tmpreg = USARTx->SR;
1966  (void) tmpreg;
1967  tmpreg = USARTx->DR;
1968  (void) tmpreg;
1969 }
1970 
1971 /**
1972  * @brief Clear OverRun Error Flag
1973  * @note Clearing this flag is done by a read access to the USARTx_SR
1974  * register followed by a read access to the USARTx_DR register.
1975  * @note Please also consider that when clearing this flag, other flags as
1976  * PE, NE, FE, IDLE would also be cleared.
1977  * @rmtoll SR ORE LL_USART_ClearFlag_ORE
1978  * @param USARTx USART Instance
1979  * @retval None
1980  */
1981 __STATIC_INLINE void LL_USART_ClearFlag_ORE(USART_TypeDef *USARTx)
1982 {
1983  __IO uint32_t tmpreg;
1984  tmpreg = USARTx->SR;
1985  (void) tmpreg;
1986  tmpreg = USARTx->DR;
1987  (void) tmpreg;
1988 }
1989 
1990 /**
1991  * @brief Clear IDLE line detected Flag
1992  * @note Clearing this flag is done by a read access to the USARTx_SR
1993  * register followed by a read access to the USARTx_DR register.
1994  * @note Please also consider that when clearing this flag, other flags as
1995  * PE, NE, FE, ORE would also be cleared.
1996  * @rmtoll SR IDLE LL_USART_ClearFlag_IDLE
1997  * @param USARTx USART Instance
1998  * @retval None
1999  */
2000 __STATIC_INLINE void LL_USART_ClearFlag_IDLE(USART_TypeDef *USARTx)
2001 {
2002  __IO uint32_t tmpreg;
2003  tmpreg = USARTx->SR;
2004  (void) tmpreg;
2005  tmpreg = USARTx->DR;
2006  (void) tmpreg;
2007 }
2008 
2009 /**
2010  * @brief Clear Transmission Complete Flag
2011  * @rmtoll SR TC LL_USART_ClearFlag_TC
2012  * @param USARTx USART Instance
2013  * @retval None
2014  */
2015 __STATIC_INLINE void LL_USART_ClearFlag_TC(USART_TypeDef *USARTx)
2016 {
2017  WRITE_REG(USARTx->SR, ~(USART_SR_TC));
2018 }
2019 
2020 /**
2021  * @brief Clear RX Not Empty Flag
2022  * @rmtoll SR RXNE LL_USART_ClearFlag_RXNE
2023  * @param USARTx USART Instance
2024  * @retval None
2025  */
2026 __STATIC_INLINE void LL_USART_ClearFlag_RXNE(USART_TypeDef *USARTx)
2027 {
2028  WRITE_REG(USARTx->SR, ~(USART_SR_RXNE));
2029 }
2030 
2031 /**
2032  * @brief Clear LIN Break Detection Flag
2033  * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
2034  * LIN feature is supported by the USARTx instance.
2035  * @rmtoll SR LBD LL_USART_ClearFlag_LBD
2036  * @param USARTx USART Instance
2037  * @retval None
2038  */
2039 __STATIC_INLINE void LL_USART_ClearFlag_LBD(USART_TypeDef *USARTx)
2040 {
2041  WRITE_REG(USARTx->SR, ~(USART_SR_LBD));
2042 }
2043 
2044 /**
2045  * @brief Clear CTS Interrupt Flag
2046  * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
2047  * Hardware Flow control feature is supported by the USARTx instance.
2048  * @rmtoll SR CTS LL_USART_ClearFlag_nCTS
2049  * @param USARTx USART Instance
2050  * @retval None
2051  */
2052 __STATIC_INLINE void LL_USART_ClearFlag_nCTS(USART_TypeDef *USARTx)
2053 {
2054  WRITE_REG(USARTx->SR, ~(USART_SR_CTS));
2055 }
2056 
2057 /**
2058  * @}
2059  */
2060 
2061 /** @defgroup USART_LL_EF_IT_Management IT_Management
2062  * @{
2063  */
2064 
2065 /**
2066  * @brief Enable IDLE Interrupt
2067  * @rmtoll CR1 IDLEIE LL_USART_EnableIT_IDLE
2068  * @param USARTx USART Instance
2069  * @retval None
2070  */
2071 __STATIC_INLINE void LL_USART_EnableIT_IDLE(USART_TypeDef *USARTx)
2072 {
2073  SET_BIT(USARTx->CR1, USART_CR1_IDLEIE);
2074 }
2075 
2076 /**
2077  * @brief Enable RX Not Empty Interrupt
2078  * @rmtoll CR1 RXNEIE LL_USART_EnableIT_RXNE
2079  * @param USARTx USART Instance
2080  * @retval None
2081  */
2082 __STATIC_INLINE void LL_USART_EnableIT_RXNE(USART_TypeDef *USARTx)
2083 {
2084  SET_BIT(USARTx->CR1, USART_CR1_RXNEIE);
2085 }
2086 
2087 /**
2088  * @brief Enable Transmission Complete Interrupt
2089  * @rmtoll CR1 TCIE LL_USART_EnableIT_TC
2090  * @param USARTx USART Instance
2091  * @retval None
2092  */
2093 __STATIC_INLINE void LL_USART_EnableIT_TC(USART_TypeDef *USARTx)
2094 {
2095  SET_BIT(USARTx->CR1, USART_CR1_TCIE);
2096 }
2097 
2098 /**
2099  * @brief Enable TX Empty Interrupt
2100  * @rmtoll CR1 TXEIE LL_USART_EnableIT_TXE
2101  * @param USARTx USART Instance
2102  * @retval None
2103  */
2104 __STATIC_INLINE void LL_USART_EnableIT_TXE(USART_TypeDef *USARTx)
2105 {
2106  SET_BIT(USARTx->CR1, USART_CR1_TXEIE);
2107 }
2108 
2109 /**
2110  * @brief Enable Parity Error Interrupt
2111  * @rmtoll CR1 PEIE LL_USART_EnableIT_PE
2112  * @param USARTx USART Instance
2113  * @retval None
2114  */
2115 __STATIC_INLINE void LL_USART_EnableIT_PE(USART_TypeDef *USARTx)
2116 {
2117  SET_BIT(USARTx->CR1, USART_CR1_PEIE);
2118 }
2119 
2120 /**
2121  * @brief Enable LIN Break Detection Interrupt
2122  * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
2123  * LIN feature is supported by the USARTx instance.
2124  * @rmtoll CR2 LBDIE LL_USART_EnableIT_LBD
2125  * @param USARTx USART Instance
2126  * @retval None
2127  */
2128 __STATIC_INLINE void LL_USART_EnableIT_LBD(USART_TypeDef *USARTx)
2129 {
2130  SET_BIT(USARTx->CR2, USART_CR2_LBDIE);
2131 }
2132 
2133 /**
2134  * @brief Enable Error Interrupt
2135  * @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing
2136  * error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the USARTx_SR register).
2137  * 0: Interrupt is inhibited
2138  * 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the USARTx_SR register.
2139  * @rmtoll CR3 EIE LL_USART_EnableIT_ERROR
2140  * @param USARTx USART Instance
2141  * @retval None
2142  */
2143 __STATIC_INLINE void LL_USART_EnableIT_ERROR(USART_TypeDef *USARTx)
2144 {
2145  SET_BIT(USARTx->CR3, USART_CR3_EIE);
2146 }
2147 
2148 /**
2149  * @brief Enable CTS Interrupt
2150  * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
2151  * Hardware Flow control feature is supported by the USARTx instance.
2152  * @rmtoll CR3 CTSIE LL_USART_EnableIT_CTS
2153  * @param USARTx USART Instance
2154  * @retval None
2155  */
2156 __STATIC_INLINE void LL_USART_EnableIT_CTS(USART_TypeDef *USARTx)
2157 {
2158  SET_BIT(USARTx->CR3, USART_CR3_CTSIE);
2159 }
2160 
2161 /**
2162  * @brief Disable IDLE Interrupt
2163  * @rmtoll CR1 IDLEIE LL_USART_DisableIT_IDLE
2164  * @param USARTx USART Instance
2165  * @retval None
2166  */
2167 __STATIC_INLINE void LL_USART_DisableIT_IDLE(USART_TypeDef *USARTx)
2168 {
2169  CLEAR_BIT(USARTx->CR1, USART_CR1_IDLEIE);
2170 }
2171 
2172 /**
2173  * @brief Disable RX Not Empty Interrupt
2174  * @rmtoll CR1 RXNEIE LL_USART_DisableIT_RXNE
2175  * @param USARTx USART Instance
2176  * @retval None
2177  */
2178 __STATIC_INLINE void LL_USART_DisableIT_RXNE(USART_TypeDef *USARTx)
2179 {
2180  CLEAR_BIT(USARTx->CR1, USART_CR1_RXNEIE);
2181 }
2182 
2183 /**
2184  * @brief Disable Transmission Complete Interrupt
2185  * @rmtoll CR1 TCIE LL_USART_DisableIT_TC
2186  * @param USARTx USART Instance
2187  * @retval None
2188  */
2189 __STATIC_INLINE void LL_USART_DisableIT_TC(USART_TypeDef *USARTx)
2190 {
2191  CLEAR_BIT(USARTx->CR1, USART_CR1_TCIE);
2192 }
2193 
2194 /**
2195  * @brief Disable TX Empty Interrupt
2196  * @rmtoll CR1 TXEIE LL_USART_DisableIT_TXE
2197  * @param USARTx USART Instance
2198  * @retval None
2199  */
2200 __STATIC_INLINE void LL_USART_DisableIT_TXE(USART_TypeDef *USARTx)
2201 {
2202  CLEAR_BIT(USARTx->CR1, USART_CR1_TXEIE);
2203 }
2204 
2205 /**
2206  * @brief Disable Parity Error Interrupt
2207  * @rmtoll CR1 PEIE LL_USART_DisableIT_PE
2208  * @param USARTx USART Instance
2209  * @retval None
2210  */
2211 __STATIC_INLINE void LL_USART_DisableIT_PE(USART_TypeDef *USARTx)
2212 {
2213  CLEAR_BIT(USARTx->CR1, USART_CR1_PEIE);
2214 }
2215 
2216 /**
2217  * @brief Disable LIN Break Detection Interrupt
2218  * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
2219  * LIN feature is supported by the USARTx instance.
2220  * @rmtoll CR2 LBDIE LL_USART_DisableIT_LBD
2221  * @param USARTx USART Instance
2222  * @retval None
2223  */
2224 __STATIC_INLINE void LL_USART_DisableIT_LBD(USART_TypeDef *USARTx)
2225 {
2226  CLEAR_BIT(USARTx->CR2, USART_CR2_LBDIE);
2227 }
2228 
2229 /**
2230  * @brief Disable Error Interrupt
2231  * @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing
2232  * error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the USARTx_SR register).
2233  * 0: Interrupt is inhibited
2234  * 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the USARTx_SR register.
2235  * @rmtoll CR3 EIE LL_USART_DisableIT_ERROR
2236  * @param USARTx USART Instance
2237  * @retval None
2238  */
2239 __STATIC_INLINE void LL_USART_DisableIT_ERROR(USART_TypeDef *USARTx)
2240 {
2241  CLEAR_BIT(USARTx->CR3, USART_CR3_EIE);
2242 }
2243 
2244 /**
2245  * @brief Disable CTS Interrupt
2246  * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
2247  * Hardware Flow control feature is supported by the USARTx instance.
2248  * @rmtoll CR3 CTSIE LL_USART_DisableIT_CTS
2249  * @param USARTx USART Instance
2250  * @retval None
2251  */
2252 __STATIC_INLINE void LL_USART_DisableIT_CTS(USART_TypeDef *USARTx)
2253 {
2254  CLEAR_BIT(USARTx->CR3, USART_CR3_CTSIE);
2255 }
2256 
2257 /**
2258  * @brief Check if the USART IDLE Interrupt source is enabled or disabled.
2259  * @rmtoll CR1 IDLEIE LL_USART_IsEnabledIT_IDLE
2260  * @param USARTx USART Instance
2261  * @retval State of bit (1 or 0).
2262  */
2263 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_IDLE(USART_TypeDef *USARTx)
2264 {
2265  return (READ_BIT(USARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE));
2266 }
2267 
2268 /**
2269  * @brief Check if the USART RX Not Empty Interrupt is enabled or disabled.
2270  * @rmtoll CR1 RXNEIE LL_USART_IsEnabledIT_RXNE
2271  * @param USARTx USART Instance
2272  * @retval State of bit (1 or 0).
2273  */
2274 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RXNE(USART_TypeDef *USARTx)
2275 {
2276  return (READ_BIT(USARTx->CR1, USART_CR1_RXNEIE) == (USART_CR1_RXNEIE));
2277 }
2278 
2279 /**
2280  * @brief Check if the USART Transmission Complete Interrupt is enabled or disabled.
2281  * @rmtoll CR1 TCIE LL_USART_IsEnabledIT_TC
2282  * @param USARTx USART Instance
2283  * @retval State of bit (1 or 0).
2284  */
2285 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TC(USART_TypeDef *USARTx)
2286 {
2287  return (READ_BIT(USARTx->CR1, USART_CR1_TCIE) == (USART_CR1_TCIE));
2288 }
2289 
2290 /**
2291  * @brief Check if the USART TX Empty Interrupt is enabled or disabled.
2292  * @rmtoll CR1 TXEIE LL_USART_IsEnabledIT_TXE
2293  * @param USARTx USART Instance
2294  * @retval State of bit (1 or 0).
2295  */
2296 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TXE(USART_TypeDef *USARTx)
2297 {
2298  return (READ_BIT(USARTx->CR1, USART_CR1_TXEIE) == (USART_CR1_TXEIE));
2299 }
2300 
2301 /**
2302  * @brief Check if the USART Parity Error Interrupt is enabled or disabled.
2303  * @rmtoll CR1 PEIE LL_USART_IsEnabledIT_PE
2304  * @param USARTx USART Instance
2305  * @retval State of bit (1 or 0).
2306  */
2307 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_PE(USART_TypeDef *USARTx)
2308 {
2309  return (READ_BIT(USARTx->CR1, USART_CR1_PEIE) == (USART_CR1_PEIE));
2310 }
2311 
2312 /**
2313  * @brief Check if the USART LIN Break Detection Interrupt is enabled or disabled.
2314  * @note Macro @ref IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
2315  * LIN feature is supported by the USARTx instance.
2316  * @rmtoll CR2 LBDIE LL_USART_IsEnabledIT_LBD
2317  * @param USARTx USART Instance
2318  * @retval State of bit (1 or 0).
2319  */
2320 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_LBD(USART_TypeDef *USARTx)
2321 {
2322  return (READ_BIT(USARTx->CR2, USART_CR2_LBDIE) == (USART_CR2_LBDIE));
2323 }
2324 
2325 /**
2326  * @brief Check if the USART Error Interrupt is enabled or disabled.
2327  * @rmtoll CR3 EIE LL_USART_IsEnabledIT_ERROR
2328  * @param USARTx USART Instance
2329  * @retval State of bit (1 or 0).
2330  */
2331 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_ERROR(USART_TypeDef *USARTx)
2332 {
2333  return (READ_BIT(USARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE));
2334 }
2335 
2336 /**
2337  * @brief Check if the USART CTS Interrupt is enabled or disabled.
2338  * @note Macro @ref IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
2339  * Hardware Flow control feature is supported by the USARTx instance.
2340  * @rmtoll CR3 CTSIE LL_USART_IsEnabledIT_CTS
2341  * @param USARTx USART Instance
2342  * @retval State of bit (1 or 0).
2343  */
2344 __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_CTS(USART_TypeDef *USARTx)
2345 {
2346  return (READ_BIT(USARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE));
2347 }
2348 
2349 /**
2350  * @}
2351  */
2352 
2353 /** @defgroup USART_LL_EF_DMA_Management DMA_Management
2354  * @{
2355  */
2356 
2357 /**
2358  * @brief Enable DMA Mode for reception
2359  * @rmtoll CR3 DMAR LL_USART_EnableDMAReq_RX
2360  * @param USARTx USART Instance
2361  * @retval None
2362  */
2363 __STATIC_INLINE void LL_USART_EnableDMAReq_RX(USART_TypeDef *USARTx)
2364 {
2365  SET_BIT(USARTx->CR3, USART_CR3_DMAR);
2366 }
2367 
2368 /**
2369  * @brief Disable DMA Mode for reception
2370  * @rmtoll CR3 DMAR LL_USART_DisableDMAReq_RX
2371  * @param USARTx USART Instance
2372  * @retval None
2373  */
2374 __STATIC_INLINE void LL_USART_DisableDMAReq_RX(USART_TypeDef *USARTx)
2375 {
2376  CLEAR_BIT(USARTx->CR3, USART_CR3_DMAR);
2377 }
2378 
2379 /**
2380  * @brief Check if DMA Mode is enabled for reception
2381  * @rmtoll CR3 DMAR LL_USART_IsEnabledDMAReq_RX
2382  * @param USARTx USART Instance
2383  * @retval State of bit (1 or 0).
2384  */
2385 __STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_RX(USART_TypeDef *USARTx)
2386 {
2387  return (READ_BIT(USARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR));
2388 }
2389 
2390 /**
2391  * @brief Enable DMA Mode for transmission
2392  * @rmtoll CR3 DMAT LL_USART_EnableDMAReq_TX
2393  * @param USARTx USART Instance
2394  * @retval None
2395  */
2396 __STATIC_INLINE void LL_USART_EnableDMAReq_TX(USART_TypeDef *USARTx)
2397 {
2398  SET_BIT(USARTx->CR3, USART_CR3_DMAT);
2399 }
2400 
2401 /**
2402  * @brief Disable DMA Mode for transmission
2403  * @rmtoll CR3 DMAT LL_USART_DisableDMAReq_TX
2404  * @param USARTx USART Instance
2405  * @retval None
2406  */
2407 __STATIC_INLINE void LL_USART_DisableDMAReq_TX(USART_TypeDef *USARTx)
2408 {
2409  CLEAR_BIT(USARTx->CR3, USART_CR3_DMAT);
2410 }
2411 
2412 /**
2413  * @brief Check if DMA Mode is enabled for transmission
2414  * @rmtoll CR3 DMAT LL_USART_IsEnabledDMAReq_TX
2415  * @param USARTx USART Instance
2416  * @retval State of bit (1 or 0).
2417  */
2418 __STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_TX(USART_TypeDef *USARTx)
2419 {
2420  return (READ_BIT(USARTx->CR3, USART_CR3_DMAT) == (USART_CR3_DMAT));
2421 }
2422 
2423 /**
2424  * @brief Get the data register address used for DMA transfer
2425  * @rmtoll DR DR LL_USART_DMA_GetRegAddr
2426  * @note Address of Data Register is valid for both Transmit and Receive transfers.
2427  * @param USARTx USART Instance
2428  * @retval Address of data register
2429  */
2430 __STATIC_INLINE uint32_t LL_USART_DMA_GetRegAddr(USART_TypeDef *USARTx)
2431 {
2432  /* return address of DR register */
2433  return ((uint32_t) & (USARTx->DR));
2434 }
2435 
2436 /**
2437  * @}
2438  */
2439 
2440 /** @defgroup USART_LL_EF_Data_Management Data_Management
2441  * @{
2442  */
2443 
2444 /**
2445  * @brief Read Receiver Data register (Receive Data value, 8 bits)
2446  * @rmtoll DR DR LL_USART_ReceiveData8
2447  * @param USARTx USART Instance
2448  * @retval Value between Min_Data=0x00 and Max_Data=0xFF
2449  */
2450 __STATIC_INLINE uint8_t LL_USART_ReceiveData8(USART_TypeDef *USARTx)
2451 {
2452  return (uint8_t)(READ_BIT(USARTx->DR, USART_DR_DR));
2453 }
2454 
2455 /**
2456  * @brief Read Receiver Data register (Receive Data value, 9 bits)
2457  * @rmtoll DR DR LL_USART_ReceiveData9
2458  * @param USARTx USART Instance
2459  * @retval Value between Min_Data=0x00 and Max_Data=0x1FF
2460  */
2461 __STATIC_INLINE uint16_t LL_USART_ReceiveData9(USART_TypeDef *USARTx)
2462 {
2463  return (uint16_t)(READ_BIT(USARTx->DR, USART_DR_DR));
2464 }
2465 
2466 /**
2467  * @brief Write in Transmitter Data Register (Transmit Data value, 8 bits)
2468  * @rmtoll DR DR LL_USART_TransmitData8
2469  * @param USARTx USART Instance
2470  * @param Value between Min_Data=0x00 and Max_Data=0xFF
2471  * @retval None
2472  */
2473 __STATIC_INLINE void LL_USART_TransmitData8(USART_TypeDef *USARTx, uint8_t Value)
2474 {
2475  USARTx->DR = Value;
2476 }
2477 
2478 /**
2479  * @brief Write in Transmitter Data Register (Transmit Data value, 9 bits)
2480  * @rmtoll DR DR LL_USART_TransmitData9
2481  * @param USARTx USART Instance
2482  * @param Value between Min_Data=0x00 and Max_Data=0x1FF
2483  * @retval None
2484  */
2485 __STATIC_INLINE void LL_USART_TransmitData9(USART_TypeDef *USARTx, uint16_t Value)
2486 {
2487  USARTx->DR = Value & 0x1FFU;
2488 }
2489 
2490 /**
2491  * @}
2492  */
2493 
2494 /** @defgroup USART_LL_EF_Execution Execution
2495  * @{
2496  */
2497 
2498 /**
2499  * @brief Request Break sending
2500  * @rmtoll CR1 SBK LL_USART_RequestBreakSending
2501  * @param USARTx USART Instance
2502  * @retval None
2503  */
2504 __STATIC_INLINE void LL_USART_RequestBreakSending(USART_TypeDef *USARTx)
2505 {
2506  SET_BIT(USARTx->CR1, USART_CR1_SBK);
2507 }
2508 
2509 /**
2510  * @brief Put USART in Mute mode
2511  * @rmtoll CR1 RWU LL_USART_RequestEnterMuteMode
2512  * @param USARTx USART Instance
2513  * @retval None
2514  */
2515 __STATIC_INLINE void LL_USART_RequestEnterMuteMode(USART_TypeDef *USARTx)
2516 {
2517  SET_BIT(USARTx->CR1, USART_CR1_RWU);
2518 }
2519 
2520 /**
2521  * @brief Put USART in Active mode
2522  * @rmtoll CR1 RWU LL_USART_RequestExitMuteMode
2523  * @param USARTx USART Instance
2524  * @retval None
2525  */
2526 __STATIC_INLINE void LL_USART_RequestExitMuteMode(USART_TypeDef *USARTx)
2527 {
2528  CLEAR_BIT(USARTx->CR1, USART_CR1_RWU);
2529 }
2530 
2531 /**
2532  * @}
2533  */
2534 
2535 #if defined(USE_FULL_LL_DRIVER)
2536 /** @defgroup USART_LL_EF_Init Initialization and de-initialization functions
2537  * @{
2538  */
2539 ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx);
2540 ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct);
2541 void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct);
2542 ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct);
2543 void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct);
2544 /**
2545  * @}
2546  */
2547 #endif /* USE_FULL_LL_DRIVER */
2548 
2549 /**
2550  * @}
2551  */
2552 
2553 /**
2554  * @}
2555  */
2556 
2557 #endif /* USART1 || USART2 || USART3 || UART4 || UART5 */
2558 
2559 /**
2560  * @}
2561  */
2562 
2563 #ifdef __cplusplus
2564 }
2565 #endif
2566 
2567 #endif /* __STM32F1xx_LL_USART_H */
2568 
2569 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
USART_SR_CTS
#define USART_SR_CTS
Definition: stm32f103xb.h:9448
USART_SR_PE
#define USART_SR_PE
Definition: stm32f103xb.h:9421
USART_CR1_M
#define USART_CR1_M
Definition: stm32f103xb.h:9502
USART_CR2_LBCL
#define USART_CR2_LBCL
Definition: stm32f103xb.h:9519
USART_TypeDef
Universal Synchronous Asynchronous Receiver Transmitter.
Definition: stm32f103xb.h:507
USART_SR_IDLE
#define USART_SR_IDLE
Definition: stm32f103xb.h:9433
USART_CR3_SCEN
#define USART_CR3_SCEN
Definition: stm32f103xb.h:9558
USART_DR_DR
#define USART_DR_DR
Definition: stm32f103xb.h:9453
USART_CR2_ADD
#define USART_CR2_ADD
Definition: stm32f103xb.h:9510
USART_CR3_HDSEL
#define USART_CR3_HDSEL
Definition: stm32f103xb.h:9552
USART_TypeDef::SR
__IO uint32_t SR
Definition: stm32f103xb.h:509
USART_CR1_TXEIE
#define USART_CR1_TXEIE
Definition: stm32f103xb.h:9487
USART_TypeDef::DR
__IO uint32_t DR
Definition: stm32f103xb.h:510
USART_CR3_DMAT
#define USART_CR3_DMAT
Definition: stm32f103xb.h:9564
USART_TypeDef::CR1
__IO uint32_t CR1
Definition: stm32f103xb.h:512
USART_CR2_STOP_1
#define USART_CR2_STOP_1
Definition: stm32f103xb.h:9534
READ_BIT
#define READ_BIT(REG, BIT)
Definition: stm32f1xx.h:182
USART_CR3_RTSE
#define USART_CR3_RTSE
Definition: stm32f103xb.h:9567
USART_GTPR_PSC
#define USART_GTPR_PSC
Definition: stm32f103xb.h:9578
USART_CR3_CTSE
#define USART_CR3_CTSE
Definition: stm32f103xb.h:9570
USART_SR_LBD
#define USART_SR_LBD
Definition: stm32f103xb.h:9445
USART_CR1_RWU
#define USART_CR1_RWU
Definition: stm32f103xb.h:9469
USART_TypeDef::GTPR
__IO uint32_t GTPR
Definition: stm32f103xb.h:515
USART_CR1_PCE
#define USART_CR1_PCE
Definition: stm32f103xb.h:9496
USART_SR_ORE
#define USART_SR_ORE
Definition: stm32f103xb.h:9430
USART_CR2_STOP
#define USART_CR2_STOP
Definition: stm32f103xb.h:9532
USART_CR2_CLKEN
#define USART_CR2_CLKEN
Definition: stm32f103xb.h:9528
USART_CR1_RXNEIE
#define USART_CR1_RXNEIE
Definition: stm32f103xb.h:9481
USART_GTPR_GT
#define USART_GTPR_GT
Definition: stm32f103xb.h:9590
USART_CR2_STOP_0
#define USART_CR2_STOP_0
Definition: stm32f103xb.h:9533
USART_CR2_CPHA
#define USART_CR2_CPHA
Definition: stm32f103xb.h:9522
MODIFY_REG
#define MODIFY_REG(REG, CLEARMASK, SETMASK)
Definition: stm32f1xx.h:190
USART_SR_NE
#define USART_SR_NE
Definition: stm32f103xb.h:9427
USART_CR2_LBDIE
#define USART_CR2_LBDIE
Definition: stm32f103xb.h:9516
USART_SR_RXNE
#define USART_SR_RXNE
Definition: stm32f103xb.h:9436
__STATIC_INLINE
#define __STATIC_INLINE
Definition: cmsis_armcc.h:59
USART_TypeDef::CR3
__IO uint32_t CR3
Definition: stm32f103xb.h:514
USART_CR1_PEIE
#define USART_CR1_PEIE
Definition: stm32f103xb.h:9490
USART_TypeDef::CR2
__IO uint32_t CR2
Definition: stm32f103xb.h:513
USART_CR3_CTSIE
#define USART_CR3_CTSIE
Definition: stm32f103xb.h:9573
WRITE_REG
#define WRITE_REG(REG, VAL)
Definition: stm32f1xx.h:186
USART_CR2_CPOL
#define USART_CR2_CPOL
Definition: stm32f103xb.h:9525
USART_CR1_TCIE
#define USART_CR1_TCIE
Definition: stm32f103xb.h:9484
USART_TypeDef::BRR
__IO uint32_t BRR
Definition: stm32f103xb.h:511
USART_CR3_EIE
#define USART_CR3_EIE
Definition: stm32f103xb.h:9543
stm32f1xx.h
CMSIS STM32F1xx Device Peripheral Access Layer Header File.
__IO
#define __IO
Definition: core_armv8mbl.h:196
USART_CR2_LBDL
#define USART_CR2_LBDL
Definition: stm32f103xb.h:9513
USART_CR1_UE
#define USART_CR1_UE
Definition: stm32f103xb.h:9505
USART_SR_TXE
#define USART_SR_TXE
Definition: stm32f103xb.h:9442
USART_CR3_IRLP
#define USART_CR3_IRLP
Definition: stm32f103xb.h:9549
USART_CR1_WAKE
#define USART_CR1_WAKE
Definition: stm32f103xb.h:9499
USART_CR1_RE
#define USART_CR1_RE
Definition: stm32f103xb.h:9472
USART_CR2_LINEN
#define USART_CR2_LINEN
Definition: stm32f103xb.h:9538
SET_BIT
#define SET_BIT(REG, BIT)
Definition: stm32f1xx.h:178
USART_CR1_SBK
#define USART_CR1_SBK
Definition: stm32f103xb.h:9466
USART_CR3_DMAR
#define USART_CR3_DMAR
Definition: stm32f103xb.h:9561
CLEAR_BIT
#define CLEAR_BIT(REG, BIT)
Definition: stm32f1xx.h:180
USART_CR3_IREN
#define USART_CR3_IREN
Definition: stm32f103xb.h:9546
USART_SR_TC
#define USART_SR_TC
Definition: stm32f103xb.h:9439
USART_CR1_TE
#define USART_CR1_TE
Definition: stm32f103xb.h:9475
USART_CR1_PS
#define USART_CR1_PS
Definition: stm32f103xb.h:9493
USART_SR_FE
#define USART_SR_FE
Definition: stm32f103xb.h:9424
ErrorStatus
ErrorStatus
Definition: stm32f1xx.h:164
USART_CR1_IDLEIE
#define USART_CR1_IDLEIE
Definition: stm32f103xb.h:9478
USART_CR3_NACK
#define USART_CR3_NACK
Definition: stm32f103xb.h:9555