DIY Logging Volt/Ampmeter
stm32f1xx_ll_pwr.h
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1 /**
2  ******************************************************************************
3  * @file stm32f1xx_ll_pwr.h
4  * @author MCD Application Team
5  * @brief Header file of PWR LL module.
6  ******************************************************************************
7  * @attention
8  *
9  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
10  * All rights reserved.</center></h2>
11  *
12  * This software component is licensed by ST under BSD 3-Clause license,
13  * the "License"; You may not use this file except in compliance with the
14  * License. You may obtain a copy of the License at:
15  * opensource.org/licenses/BSD-3-Clause
16  *
17  ******************************************************************************
18  */
19 
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef __STM32F1xx_LL_PWR_H
22 #define __STM32F1xx_LL_PWR_H
23 
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27 
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm32f1xx.h"
30 
31 /** @addtogroup STM32F1xx_LL_Driver
32  * @{
33  */
34 
35 #if defined(PWR)
36 
37 /** @defgroup PWR_LL PWR
38  * @{
39  */
40 
41 /* Private types -------------------------------------------------------------*/
42 /* Private variables ---------------------------------------------------------*/
43 /* Private constants ---------------------------------------------------------*/
44 /* Private macros ------------------------------------------------------------*/
45 /* Exported types ------------------------------------------------------------*/
46 /* Exported constants --------------------------------------------------------*/
47 /** @defgroup PWR_LL_Exported_Constants PWR Exported Constants
48  * @{
49  */
50 
51 /** @defgroup PWR_LL_EC_CLEAR_FLAG Clear Flags Defines
52  * @brief Flags defines which can be used with LL_PWR_WriteReg function
53  * @{
54  */
55 #define LL_PWR_CR_CSBF PWR_CR_CSBF /*!< Clear standby flag */
56 #define LL_PWR_CR_CWUF PWR_CR_CWUF /*!< Clear wakeup flag */
57 /**
58  * @}
59  */
60 
61 /** @defgroup PWR_LL_EC_GET_FLAG Get Flags Defines
62  * @brief Flags defines which can be used with LL_PWR_ReadReg function
63  * @{
64  */
65 #define LL_PWR_CSR_WUF PWR_CSR_WUF /*!< Wakeup flag */
66 #define LL_PWR_CSR_SBF PWR_CSR_SBF /*!< Standby flag */
67 #define LL_PWR_CSR_PVDO PWR_CSR_PVDO /*!< Power voltage detector output flag */
68 #define LL_PWR_CSR_EWUP1 PWR_CSR_EWUP /*!< Enable WKUP pin 1 */
69 /**
70  * @}
71  */
72 
73 
74 /** @defgroup PWR_LL_EC_MODE_PWR Mode Power
75  * @{
76  */
77 #define LL_PWR_MODE_STOP_MAINREGU 0x00000000U /*!< Enter Stop mode when the CPU enters deepsleep */
78 #define LL_PWR_MODE_STOP_LPREGU (PWR_CR_LPDS) /*!< Enter Stop mode (with low power Regulator ON) when the CPU enters deepsleep */
79 #define LL_PWR_MODE_STANDBY (PWR_CR_PDDS) /*!< Enter Standby mode when the CPU enters deepsleep */
80 /**
81  * @}
82  */
83 
84 /** @defgroup PWR_LL_EC_REGU_MODE_DS_MODE Regulator Mode In Deep Sleep Mode
85  * @{
86  */
87 #define LL_PWR_REGU_DSMODE_MAIN 0x00000000U /*!< Voltage Regulator in main mode during deepsleep mode */
88 #define LL_PWR_REGU_DSMODE_LOW_POWER (PWR_CR_LPDS) /*!< Voltage Regulator in low-power mode during deepsleep mode */
89 /**
90  * @}
91  */
92 
93 /** @defgroup PWR_LL_EC_PVDLEVEL Power Voltage Detector Level
94  * @{
95  */
96 #define LL_PWR_PVDLEVEL_0 (PWR_CR_PLS_LEV0) /*!< Voltage threshold detected by PVD 2.2 V */
97 #define LL_PWR_PVDLEVEL_1 (PWR_CR_PLS_LEV1) /*!< Voltage threshold detected by PVD 2.3 V */
98 #define LL_PWR_PVDLEVEL_2 (PWR_CR_PLS_LEV2) /*!< Voltage threshold detected by PVD 2.4 V */
99 #define LL_PWR_PVDLEVEL_3 (PWR_CR_PLS_LEV3) /*!< Voltage threshold detected by PVD 2.5 V */
100 #define LL_PWR_PVDLEVEL_4 (PWR_CR_PLS_LEV4) /*!< Voltage threshold detected by PVD 2.6 V */
101 #define LL_PWR_PVDLEVEL_5 (PWR_CR_PLS_LEV5) /*!< Voltage threshold detected by PVD 2.7 V */
102 #define LL_PWR_PVDLEVEL_6 (PWR_CR_PLS_LEV6) /*!< Voltage threshold detected by PVD 2.8 V */
103 #define LL_PWR_PVDLEVEL_7 (PWR_CR_PLS_LEV7) /*!< Voltage threshold detected by PVD 2.9 V */
104 /**
105  * @}
106  */
107 /** @defgroup PWR_LL_EC_WAKEUP_PIN Wakeup Pins
108  * @{
109  */
110 #define LL_PWR_WAKEUP_PIN1 (PWR_CSR_EWUP) /*!< WKUP pin 1 : PA0 */
111 /**
112  * @}
113  */
114 
115 /**
116  * @}
117  */
118 
119 
120 /* Exported macro ------------------------------------------------------------*/
121 /** @defgroup PWR_LL_Exported_Macros PWR Exported Macros
122  * @{
123  */
124 
125 /** @defgroup PWR_LL_EM_WRITE_READ Common write and read registers Macros
126  * @{
127  */
128 
129 /**
130  * @brief Write a value in PWR register
131  * @param __REG__ Register to be written
132  * @param __VALUE__ Value to be written in the register
133  * @retval None
134  */
135 #define LL_PWR_WriteReg(__REG__, __VALUE__) WRITE_REG(PWR->__REG__, (__VALUE__))
136 
137 /**
138  * @brief Read a value in PWR register
139  * @param __REG__ Register to be read
140  * @retval Register value
141  */
142 #define LL_PWR_ReadReg(__REG__) READ_REG(PWR->__REG__)
143 /**
144  * @}
145  */
146 
147 /**
148  * @}
149  */
150 
151 /* Exported functions --------------------------------------------------------*/
152 /** @defgroup PWR_LL_Exported_Functions PWR Exported Functions
153  * @{
154  */
155 
156 /** @defgroup PWR_LL_EF_Configuration Configuration
157  * @{
158  */
159 
160 /**
161  * @brief Enable access to the backup domain
162  * @rmtoll CR DBP LL_PWR_EnableBkUpAccess
163  * @retval None
164  */
165 __STATIC_INLINE void LL_PWR_EnableBkUpAccess(void)
166 {
167  SET_BIT(PWR->CR, PWR_CR_DBP);
168 }
169 
170 /**
171  * @brief Disable access to the backup domain
172  * @rmtoll CR DBP LL_PWR_DisableBkUpAccess
173  * @retval None
174  */
175 __STATIC_INLINE void LL_PWR_DisableBkUpAccess(void)
176 {
177  CLEAR_BIT(PWR->CR, PWR_CR_DBP);
178 }
179 
180 /**
181  * @brief Check if the backup domain is enabled
182  * @rmtoll CR DBP LL_PWR_IsEnabledBkUpAccess
183  * @retval State of bit (1 or 0).
184  */
185 __STATIC_INLINE uint32_t LL_PWR_IsEnabledBkUpAccess(void)
186 {
187  return (READ_BIT(PWR->CR, PWR_CR_DBP) == (PWR_CR_DBP));
188 }
189 
190 /**
191  * @brief Set voltage Regulator mode during deep sleep mode
192  * @rmtoll CR LPDS LL_PWR_SetRegulModeDS
193  * @param RegulMode This parameter can be one of the following values:
194  * @arg @ref LL_PWR_REGU_DSMODE_MAIN
195  * @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER
196  * @retval None
197  */
198 __STATIC_INLINE void LL_PWR_SetRegulModeDS(uint32_t RegulMode)
199 {
200  MODIFY_REG(PWR->CR, PWR_CR_LPDS, RegulMode);
201 }
202 
203 /**
204  * @brief Get voltage Regulator mode during deep sleep mode
205  * @rmtoll CR LPDS LL_PWR_GetRegulModeDS
206  * @retval Returned value can be one of the following values:
207  * @arg @ref LL_PWR_REGU_DSMODE_MAIN
208  * @arg @ref LL_PWR_REGU_DSMODE_LOW_POWER
209  */
210 __STATIC_INLINE uint32_t LL_PWR_GetRegulModeDS(void)
211 {
212  return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_LPDS));
213 }
214 
215 /**
216  * @brief Set Power Down mode when CPU enters deepsleep
217  * @rmtoll CR PDDS LL_PWR_SetPowerMode\n
218  * @rmtoll CR LPDS LL_PWR_SetPowerMode
219  * @param PDMode This parameter can be one of the following values:
220  * @arg @ref LL_PWR_MODE_STOP_MAINREGU
221  * @arg @ref LL_PWR_MODE_STOP_LPREGU
222  * @arg @ref LL_PWR_MODE_STANDBY
223  * @retval None
224  */
225 __STATIC_INLINE void LL_PWR_SetPowerMode(uint32_t PDMode)
226 {
227  MODIFY_REG(PWR->CR, (PWR_CR_PDDS| PWR_CR_LPDS), PDMode);
228 }
229 
230 /**
231  * @brief Get Power Down mode when CPU enters deepsleep
232  * @rmtoll CR PDDS LL_PWR_GetPowerMode\n
233  * @rmtoll CR LPDS LL_PWR_GetPowerMode
234  * @retval Returned value can be one of the following values:
235  * @arg @ref LL_PWR_MODE_STOP_MAINREGU
236  * @arg @ref LL_PWR_MODE_STOP_LPREGU
237  * @arg @ref LL_PWR_MODE_STANDBY
238  */
239 __STATIC_INLINE uint32_t LL_PWR_GetPowerMode(void)
240 {
241  return (uint32_t)(READ_BIT(PWR->CR, (PWR_CR_PDDS| PWR_CR_LPDS)));
242 }
243 
244 /**
245  * @brief Configure the voltage threshold detected by the Power Voltage Detector
246  * @rmtoll CR PLS LL_PWR_SetPVDLevel
247  * @param PVDLevel This parameter can be one of the following values:
248  * @arg @ref LL_PWR_PVDLEVEL_0
249  * @arg @ref LL_PWR_PVDLEVEL_1
250  * @arg @ref LL_PWR_PVDLEVEL_2
251  * @arg @ref LL_PWR_PVDLEVEL_3
252  * @arg @ref LL_PWR_PVDLEVEL_4
253  * @arg @ref LL_PWR_PVDLEVEL_5
254  * @arg @ref LL_PWR_PVDLEVEL_6
255  * @arg @ref LL_PWR_PVDLEVEL_7
256  * @retval None
257  */
258 __STATIC_INLINE void LL_PWR_SetPVDLevel(uint32_t PVDLevel)
259 {
260  MODIFY_REG(PWR->CR, PWR_CR_PLS, PVDLevel);
261 }
262 
263 /**
264  * @brief Get the voltage threshold detection
265  * @rmtoll CR PLS LL_PWR_GetPVDLevel
266  * @retval Returned value can be one of the following values:
267  * @arg @ref LL_PWR_PVDLEVEL_0
268  * @arg @ref LL_PWR_PVDLEVEL_1
269  * @arg @ref LL_PWR_PVDLEVEL_2
270  * @arg @ref LL_PWR_PVDLEVEL_3
271  * @arg @ref LL_PWR_PVDLEVEL_4
272  * @arg @ref LL_PWR_PVDLEVEL_5
273  * @arg @ref LL_PWR_PVDLEVEL_6
274  * @arg @ref LL_PWR_PVDLEVEL_7
275  */
276 __STATIC_INLINE uint32_t LL_PWR_GetPVDLevel(void)
277 {
278  return (uint32_t)(READ_BIT(PWR->CR, PWR_CR_PLS));
279 }
280 
281 /**
282  * @brief Enable Power Voltage Detector
283  * @rmtoll CR PVDE LL_PWR_EnablePVD
284  * @retval None
285  */
286 __STATIC_INLINE void LL_PWR_EnablePVD(void)
287 {
288  SET_BIT(PWR->CR, PWR_CR_PVDE);
289 }
290 
291 /**
292  * @brief Disable Power Voltage Detector
293  * @rmtoll CR PVDE LL_PWR_DisablePVD
294  * @retval None
295  */
296 __STATIC_INLINE void LL_PWR_DisablePVD(void)
297 {
298  CLEAR_BIT(PWR->CR, PWR_CR_PVDE);
299 }
300 
301 /**
302  * @brief Check if Power Voltage Detector is enabled
303  * @rmtoll CR PVDE LL_PWR_IsEnabledPVD
304  * @retval State of bit (1 or 0).
305  */
306 __STATIC_INLINE uint32_t LL_PWR_IsEnabledPVD(void)
307 {
308  return (READ_BIT(PWR->CR, PWR_CR_PVDE) == (PWR_CR_PVDE));
309 }
310 
311 /**
312  * @brief Enable the WakeUp PINx functionality
313  * @rmtoll CSR EWUP LL_PWR_EnableWakeUpPin
314  * @param WakeUpPin This parameter can be one of the following values:
315  * @arg @ref LL_PWR_WAKEUP_PIN1
316  * @retval None
317  */
318 __STATIC_INLINE void LL_PWR_EnableWakeUpPin(uint32_t WakeUpPin)
319 {
320  SET_BIT(PWR->CSR, WakeUpPin);
321 }
322 
323 /**
324  * @brief Disable the WakeUp PINx functionality
325  * @rmtoll CSR EWUP LL_PWR_DisableWakeUpPin
326  * @param WakeUpPin This parameter can be one of the following values:
327  * @arg @ref LL_PWR_WAKEUP_PIN1
328  * @retval None
329  */
330 __STATIC_INLINE void LL_PWR_DisableWakeUpPin(uint32_t WakeUpPin)
331 {
332  CLEAR_BIT(PWR->CSR, WakeUpPin);
333 }
334 
335 /**
336  * @brief Check if the WakeUp PINx functionality is enabled
337  * @rmtoll CSR EWUP LL_PWR_IsEnabledWakeUpPin
338  * @param WakeUpPin This parameter can be one of the following values:
339  * @arg @ref LL_PWR_WAKEUP_PIN1
340  * @retval State of bit (1 or 0).
341  */
342 __STATIC_INLINE uint32_t LL_PWR_IsEnabledWakeUpPin(uint32_t WakeUpPin)
343 {
344  return (READ_BIT(PWR->CSR, WakeUpPin) == (WakeUpPin));
345 }
346 
347 
348 /**
349  * @}
350  */
351 
352 /** @defgroup PWR_LL_EF_FLAG_Management FLAG_Management
353  * @{
354  */
355 
356 /**
357  * @brief Get Wake-up Flag
358  * @rmtoll CSR WUF LL_PWR_IsActiveFlag_WU
359  * @retval State of bit (1 or 0).
360  */
361 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU(void)
362 {
363  return (READ_BIT(PWR->CSR, PWR_CSR_WUF) == (PWR_CSR_WUF));
364 }
365 
366 /**
367  * @brief Get Standby Flag
368  * @rmtoll CSR SBF LL_PWR_IsActiveFlag_SB
369  * @retval State of bit (1 or 0).
370  */
371 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_SB(void)
372 {
373  return (READ_BIT(PWR->CSR, PWR_CSR_SBF) == (PWR_CSR_SBF));
374 }
375 
376 /**
377  * @brief Indicate whether VDD voltage is below the selected PVD threshold
378  * @rmtoll CSR PVDO LL_PWR_IsActiveFlag_PVDO
379  * @retval State of bit (1 or 0).
380  */
381 __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVDO(void)
382 {
383  return (READ_BIT(PWR->CSR, PWR_CSR_PVDO) == (PWR_CSR_PVDO));
384 }
385 
386 /**
387  * @brief Clear Standby Flag
388  * @rmtoll CR CSBF LL_PWR_ClearFlag_SB
389  * @retval None
390  */
391 __STATIC_INLINE void LL_PWR_ClearFlag_SB(void)
392 {
393  SET_BIT(PWR->CR, PWR_CR_CSBF);
394 }
395 
396 /**
397  * @brief Clear Wake-up Flags
398  * @rmtoll CR CWUF LL_PWR_ClearFlag_WU
399  * @retval None
400  */
401 __STATIC_INLINE void LL_PWR_ClearFlag_WU(void)
402 {
403  SET_BIT(PWR->CR, PWR_CR_CWUF);
404 }
405 
406 /**
407  * @}
408  */
409 
410 #if defined(USE_FULL_LL_DRIVER)
411 /** @defgroup PWR_LL_EF_Init De-initialization function
412  * @{
413  */
414 ErrorStatus LL_PWR_DeInit(void);
415 /**
416  * @}
417  */
418 #endif /* USE_FULL_LL_DRIVER */
419 
420 /**
421  * @}
422  */
423 
424 /**
425  * @}
426  */
427 
428 #endif /* defined(PWR) */
429 
430 /**
431  * @}
432  */
433 
434 #ifdef __cplusplus
435 }
436 #endif
437 
438 #endif /* __STM32F1xx_LL_PWR_H */
439 
440 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
PWR_CR_LPDS
#define PWR_CR_LPDS
Definition: stm32f103xb.h:737
PWR
#define PWR
Definition: stm32f103xb.h:662
PWR_CSR_WUF
#define PWR_CSR_WUF
Definition: stm32f103xb.h:786
PWR_CR_PVDE
#define PWR_CR_PVDE
Definition: stm32f103xb.h:749
PWR_CR_PDDS
#define PWR_CR_PDDS
Definition: stm32f103xb.h:740
READ_BIT
#define READ_BIT(REG, BIT)
Definition: stm32f1xx.h:182
PWR_CR_CSBF
#define PWR_CR_CSBF
Definition: stm32f103xb.h:746
MODIFY_REG
#define MODIFY_REG(REG, CLEARMASK, SETMASK)
Definition: stm32f1xx.h:190
PWR_CSR_PVDO
#define PWR_CSR_PVDO
Definition: stm32f103xb.h:792
PWR_CR_CWUF
#define PWR_CR_CWUF
Definition: stm32f103xb.h:743
__STATIC_INLINE
#define __STATIC_INLINE
Definition: cmsis_armcc.h:59
PWR_CR_PLS
#define PWR_CR_PLS
Definition: stm32f103xb.h:753
stm32f1xx.h
CMSIS STM32F1xx Device Peripheral Access Layer Header File.
PWR_CR_DBP
#define PWR_CR_DBP
Definition: stm32f103xb.h:780
SET_BIT
#define SET_BIT(REG, BIT)
Definition: stm32f1xx.h:178
CLEAR_BIT
#define CLEAR_BIT(REG, BIT)
Definition: stm32f1xx.h:180
PWR_CSR_SBF
#define PWR_CSR_SBF
Definition: stm32f103xb.h:789
ErrorStatus
ErrorStatus
Definition: stm32f1xx.h:164