DIY Logging Volt/Ampmeter
stm32f1xx_hal_tim_ex.c
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1 /**
2  ******************************************************************************
3  * @file stm32f1xx_hal_tim_ex.c
4  * @author MCD Application Team
5  * @brief TIM HAL module driver.
6  * This file provides firmware functions to manage the following
7  * functionalities of the Timer Extended peripheral:
8  * + Time Hall Sensor Interface Initialization
9  * + Time Hall Sensor Interface Start
10  * + Time Complementary signal break and dead time configuration
11  * + Time Master and Slave synchronization configuration
12  * + Timer remapping capabilities configuration
13  @verbatim
14  ==============================================================================
15  ##### TIMER Extended features #####
16  ==============================================================================
17  [..]
18  The Timer Extended features include:
19  (#) Complementary outputs with programmable dead-time for :
20  (++) Output Compare
21  (++) PWM generation (Edge and Center-aligned Mode)
22  (++) One-pulse mode output
23  (#) Synchronization circuit to control the timer with external signals and to
24  interconnect several timers together.
25  (#) Break input to put the timer output signals in reset state or in a known state.
26  (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for
27  positioning purposes
28 
29  ##### How to use this driver #####
30  ==============================================================================
31  [..]
32  (#) Initialize the TIM low level resources by implementing the following functions
33  depending on the selected feature:
34  (++) Hall Sensor output : HAL_TIMEx_HallSensor_MspInit()
35 
36  (#) Initialize the TIM low level resources :
37  (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE();
38  (##) TIM pins configuration
39  (+++) Enable the clock for the TIM GPIOs using the following function:
40  __HAL_RCC_GPIOx_CLK_ENABLE();
41  (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init();
42 
43  (#) The external Clock can be configured, if needed (the default clock is the
44  internal clock from the APBx), using the following function:
45  HAL_TIM_ConfigClockSource, the clock configuration should be done before
46  any start function.
47 
48  (#) Configure the TIM in the desired functioning mode using one of the
49  initialization function of this driver:
50  (++) HAL_TIMEx_HallSensor_Init() and HAL_TIMEx_ConfigCommutEvent(): to use the
51  Timer Hall Sensor Interface and the commutation event with the corresponding
52  Interrupt and DMA request if needed (Note that One Timer is used to interface
53  with the Hall sensor Interface and another Timer should be used to use
54  the commutation event).
55 
56  (#) Activate the TIM peripheral using one of the start functions:
57  (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(), HAL_TIMEx_OCN_Start_IT()
58  (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(), HAL_TIMEx_PWMN_Start_IT()
59  (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT()
60  (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(), HAL_TIMEx_HallSensor_Start_IT().
61 
62  @endverbatim
63  ******************************************************************************
64  * @attention
65  *
66  * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
67  * All rights reserved.</center></h2>
68  *
69  * This software component is licensed by ST under BSD 3-Clause license,
70  * the "License"; You may not use this file except in compliance with the
71  * License. You may obtain a copy of the License at:
72  * opensource.org/licenses/BSD-3-Clause
73  *
74  ******************************************************************************
75  */
76 
77 /* Includes ------------------------------------------------------------------*/
78 #include "stm32f1xx_hal.h"
79 
80 /** @addtogroup STM32F1xx_HAL_Driver
81  * @{
82  */
83 
84 /** @defgroup TIMEx TIMEx
85  * @brief TIM Extended HAL module driver
86  * @{
87  */
88 
89 #ifdef HAL_TIM_MODULE_ENABLED
90 
91 /* Private typedef -----------------------------------------------------------*/
92 /* Private define ------------------------------------------------------------*/
93 /* Private macros ------------------------------------------------------------*/
94 /* Private variables ---------------------------------------------------------*/
95 /* Private function prototypes -----------------------------------------------*/
96 static void TIM_DMADelayPulseNCplt(DMA_HandleTypeDef *hdma);
97 static void TIM_DMAErrorCCxN(DMA_HandleTypeDef *hdma);
98 static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState);
99 
100 /* Exported functions --------------------------------------------------------*/
101 /** @defgroup TIMEx_Exported_Functions TIM Extended Exported Functions
102  * @{
103  */
104 
105 /** @defgroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions
106  * @brief Timer Hall Sensor functions
107  *
108 @verbatim
109  ==============================================================================
110  ##### Timer Hall Sensor functions #####
111  ==============================================================================
112  [..]
113  This section provides functions allowing to:
114  (+) Initialize and configure TIM HAL Sensor.
115  (+) De-initialize TIM HAL Sensor.
116  (+) Start the Hall Sensor Interface.
117  (+) Stop the Hall Sensor Interface.
118  (+) Start the Hall Sensor Interface and enable interrupts.
119  (+) Stop the Hall Sensor Interface and disable interrupts.
120  (+) Start the Hall Sensor Interface and enable DMA transfers.
121  (+) Stop the Hall Sensor Interface and disable DMA transfers.
122 
123 @endverbatim
124  * @{
125  */
126 /**
127  * @brief Initializes the TIM Hall Sensor Interface and initialize the associated handle.
128  * @note When the timer instance is initialized in Hall Sensor Interface mode,
129  * timer channels 1 and channel 2 are reserved and cannot be used for
130  * other purpose.
131  * @param htim TIM Hall Sensor Interface handle
132  * @param sConfig TIM Hall Sensor configuration structure
133  * @retval HAL status
134  */
136 {
137  TIM_OC_InitTypeDef OC_Config;
138 
139  /* Check the TIM handle allocation */
140  if (htim == NULL)
141  {
142  return HAL_ERROR;
143  }
144 
145  /* Check the parameters */
153 
154  if (htim->State == HAL_TIM_STATE_RESET)
155  {
156  /* Allocate lock resource and initialize it */
157  htim->Lock = HAL_UNLOCKED;
158 
159 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
160  /* Reset interrupt callbacks to legacy week callbacks */
161  TIM_ResetCallback(htim);
162 
163  if (htim->HallSensor_MspInitCallback == NULL)
164  {
165  htim->HallSensor_MspInitCallback = HAL_TIMEx_HallSensor_MspInit;
166  }
167  /* Init the low level hardware : GPIO, CLOCK, NVIC */
168  htim->HallSensor_MspInitCallback(htim);
169 #else
170  /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
172 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
173  }
174 
175  /* Set the TIM state */
176  htim->State = HAL_TIM_STATE_BUSY;
177 
178  /* Configure the Time base in the Encoder Mode */
179  TIM_Base_SetConfig(htim->Instance, &htim->Init);
180 
181  /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the Hall sensor */
183 
184  /* Reset the IC1PSC Bits */
185  htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
186  /* Set the IC1PSC value */
187  htim->Instance->CCMR1 |= sConfig->IC1Prescaler;
188 
189  /* Enable the Hall sensor interface (XOR function of the three inputs) */
190  htim->Instance->CR2 |= TIM_CR2_TI1S;
191 
192  /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */
193  htim->Instance->SMCR &= ~TIM_SMCR_TS;
194  htim->Instance->SMCR |= TIM_TS_TI1F_ED;
195 
196  /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */
197  htim->Instance->SMCR &= ~TIM_SMCR_SMS;
199 
200  /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/
201  OC_Config.OCFastMode = TIM_OCFAST_DISABLE;
203  OC_Config.OCMode = TIM_OCMODE_PWM2;
205  OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH;
206  OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH;
207  OC_Config.Pulse = sConfig->Commutation_Delay;
208 
209  TIM_OC2_SetConfig(htim->Instance, &OC_Config);
210 
211  /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2
212  register to 101 */
213  htim->Instance->CR2 &= ~TIM_CR2_MMS;
214  htim->Instance->CR2 |= TIM_TRGO_OC2REF;
215 
216  /* Initialize the DMA burst operation state */
218 
219  /* Initialize the TIM channels state */
224 
225  /* Initialize the TIM state*/
226  htim->State = HAL_TIM_STATE_READY;
227 
228  return HAL_OK;
229 }
230 
231 /**
232  * @brief DeInitializes the TIM Hall Sensor interface
233  * @param htim TIM Hall Sensor Interface handle
234  * @retval HAL status
235  */
237 {
238  /* Check the parameters */
240 
241  htim->State = HAL_TIM_STATE_BUSY;
242 
243  /* Disable the TIM Peripheral Clock */
244  __HAL_TIM_DISABLE(htim);
245 
246 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
247  if (htim->HallSensor_MspDeInitCallback == NULL)
248  {
249  htim->HallSensor_MspDeInitCallback = HAL_TIMEx_HallSensor_MspDeInit;
250  }
251  /* DeInit the low level hardware */
252  htim->HallSensor_MspDeInitCallback(htim);
253 #else
254  /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
256 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
257 
258  /* Change the DMA burst operation state */
260 
261  /* Change the TIM channels state */
266 
267  /* Change TIM state */
268  htim->State = HAL_TIM_STATE_RESET;
269 
270  /* Release Lock */
271  __HAL_UNLOCK(htim);
272 
273  return HAL_OK;
274 }
275 
276 /**
277  * @brief Initializes the TIM Hall Sensor MSP.
278  * @param htim TIM Hall Sensor Interface handle
279  * @retval None
280  */
282 {
283  /* Prevent unused argument(s) compilation warning */
284  UNUSED(htim);
285 
286  /* NOTE : This function should not be modified, when the callback is needed,
287  the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file
288  */
289 }
290 
291 /**
292  * @brief DeInitializes TIM Hall Sensor MSP.
293  * @param htim TIM Hall Sensor Interface handle
294  * @retval None
295  */
297 {
298  /* Prevent unused argument(s) compilation warning */
299  UNUSED(htim);
300 
301  /* NOTE : This function should not be modified, when the callback is needed,
302  the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file
303  */
304 }
305 
306 /**
307  * @brief Starts the TIM Hall Sensor Interface.
308  * @param htim TIM Hall Sensor Interface handle
309  * @retval HAL status
310  */
312 {
313  uint32_t tmpsmcr;
316  HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
317  HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
318 
319  /* Check the parameters */
321 
322  /* Check the TIM channels state */
323  if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
324  || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
325  || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
326  || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
327  {
328  return HAL_ERROR;
329  }
330 
331  /* Set the TIM channels state */
336 
337  /* Enable the Input Capture channel 1
338  (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
340 
341  /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
342  if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
343  {
344  tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
345  if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
346  {
347  __HAL_TIM_ENABLE(htim);
348  }
349  }
350  else
351  {
352  __HAL_TIM_ENABLE(htim);
353  }
354 
355  /* Return function status */
356  return HAL_OK;
357 }
358 
359 /**
360  * @brief Stops the TIM Hall sensor Interface.
361  * @param htim TIM Hall Sensor Interface handle
362  * @retval HAL status
363  */
365 {
366  /* Check the parameters */
368 
369  /* Disable the Input Capture channels 1, 2 and 3
370  (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
372 
373  /* Disable the Peripheral */
374  __HAL_TIM_DISABLE(htim);
375 
376  /* Set the TIM channels state */
381 
382  /* Return function status */
383  return HAL_OK;
384 }
385 
386 /**
387  * @brief Starts the TIM Hall Sensor Interface in interrupt mode.
388  * @param htim TIM Hall Sensor Interface handle
389  * @retval HAL status
390  */
392 {
393  uint32_t tmpsmcr;
396  HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
397  HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_2);
398 
399  /* Check the parameters */
401 
402  /* Check the TIM channels state */
403  if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
404  || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
405  || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
406  || (complementary_channel_2_state != HAL_TIM_CHANNEL_STATE_READY))
407  {
408  return HAL_ERROR;
409  }
410 
411  /* Set the TIM channels state */
416 
417  /* Enable the capture compare Interrupts 1 event */
419 
420  /* Enable the Input Capture channel 1
421  (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
423 
424  /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
425  if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
426  {
427  tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
428  if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
429  {
430  __HAL_TIM_ENABLE(htim);
431  }
432  }
433  else
434  {
435  __HAL_TIM_ENABLE(htim);
436  }
437 
438  /* Return function status */
439  return HAL_OK;
440 }
441 
442 /**
443  * @brief Stops the TIM Hall Sensor Interface in interrupt mode.
444  * @param htim TIM Hall Sensor Interface handle
445  * @retval HAL status
446  */
448 {
449  /* Check the parameters */
451 
452  /* Disable the Input Capture channel 1
453  (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
455 
456  /* Disable the capture compare Interrupts event */
458 
459  /* Disable the Peripheral */
460  __HAL_TIM_DISABLE(htim);
461 
462  /* Set the TIM channels state */
467 
468  /* Return function status */
469  return HAL_OK;
470 }
471 
472 /**
473  * @brief Starts the TIM Hall Sensor Interface in DMA mode.
474  * @param htim TIM Hall Sensor Interface handle
475  * @param pData The destination Buffer address.
476  * @param Length The length of data to be transferred from TIM peripheral to memory.
477  * @retval HAL status
478  */
479 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length)
480 {
481  uint32_t tmpsmcr;
483  HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHANNEL_1);
484 
485  /* Check the parameters */
487 
488  /* Set the TIM channel state */
489  if ((channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY)
490  || (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_BUSY))
491  {
492  return HAL_BUSY;
493  }
494  else if ((channel_1_state == HAL_TIM_CHANNEL_STATE_READY)
495  && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY))
496  {
497  if ((pData == NULL) && (Length > 0U))
498  {
499  return HAL_ERROR;
500  }
501  else
502  {
505  }
506  }
507  else
508  {
509  return HAL_ERROR;
510  }
511 
512  /* Enable the Input Capture channel 1
513  (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
515 
516  /* Set the DMA Input Capture 1 Callbacks */
519  /* Set the DMA error callback */
521 
522  /* Enable the DMA channel for Capture 1*/
523  if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length) != HAL_OK)
524  {
525  /* Return error status */
526  return HAL_ERROR;
527  }
528  /* Enable the capture compare 1 Interrupt */
530 
531  /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
532  if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
533  {
534  tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
535  if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
536  {
537  __HAL_TIM_ENABLE(htim);
538  }
539  }
540  else
541  {
542  __HAL_TIM_ENABLE(htim);
543  }
544 
545  /* Return function status */
546  return HAL_OK;
547 }
548 
549 /**
550  * @brief Stops the TIM Hall Sensor Interface in DMA mode.
551  * @param htim TIM Hall Sensor Interface handle
552  * @retval HAL status
553  */
555 {
556  /* Check the parameters */
558 
559  /* Disable the Input Capture channel 1
560  (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
562 
563 
564  /* Disable the capture compare Interrupts 1 event */
566 
567  (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
568 
569  /* Disable the Peripheral */
570  __HAL_TIM_DISABLE(htim);
571 
572  /* Set the TIM channel state */
575 
576  /* Return function status */
577  return HAL_OK;
578 }
579 
580 /**
581  * @}
582  */
583 
584 /** @defgroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
585  * @brief Timer Complementary Output Compare functions
586  *
587 @verbatim
588  ==============================================================================
589  ##### Timer Complementary Output Compare functions #####
590  ==============================================================================
591  [..]
592  This section provides functions allowing to:
593  (+) Start the Complementary Output Compare/PWM.
594  (+) Stop the Complementary Output Compare/PWM.
595  (+) Start the Complementary Output Compare/PWM and enable interrupts.
596  (+) Stop the Complementary Output Compare/PWM and disable interrupts.
597  (+) Start the Complementary Output Compare/PWM and enable DMA transfers.
598  (+) Stop the Complementary Output Compare/PWM and disable DMA transfers.
599 
600 @endverbatim
601  * @{
602  */
603 
604 /**
605  * @brief Starts the TIM Output Compare signal generation on the complementary
606  * output.
607  * @param htim TIM Output Compare handle
608  * @param Channel TIM Channel to be enabled
609  * This parameter can be one of the following values:
610  * @arg TIM_CHANNEL_1: TIM Channel 1 selected
611  * @arg TIM_CHANNEL_2: TIM Channel 2 selected
612  * @arg TIM_CHANNEL_3: TIM Channel 3 selected
613  * @retval HAL status
614  */
616 {
617  uint32_t tmpsmcr;
618 
619  /* Check the parameters */
620  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
621 
622  /* Check the TIM complementary channel state */
624  {
625  return HAL_ERROR;
626  }
627 
628  /* Set the TIM complementary channel state */
630 
631  /* Enable the Capture compare channel N */
632  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
633 
634  /* Enable the Main Output */
635  __HAL_TIM_MOE_ENABLE(htim);
636 
637  /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
638  if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
639  {
640  tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
641  if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
642  {
643  __HAL_TIM_ENABLE(htim);
644  }
645  }
646  else
647  {
648  __HAL_TIM_ENABLE(htim);
649  }
650 
651  /* Return function status */
652  return HAL_OK;
653 }
654 
655 /**
656  * @brief Stops the TIM Output Compare signal generation on the complementary
657  * output.
658  * @param htim TIM handle
659  * @param Channel TIM Channel to be disabled
660  * This parameter can be one of the following values:
661  * @arg TIM_CHANNEL_1: TIM Channel 1 selected
662  * @arg TIM_CHANNEL_2: TIM Channel 2 selected
663  * @arg TIM_CHANNEL_3: TIM Channel 3 selected
664  * @retval HAL status
665  */
667 {
668  /* Check the parameters */
669  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
670 
671  /* Disable the Capture compare channel N */
672  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
673 
674  /* Disable the Main Output */
675  __HAL_TIM_MOE_DISABLE(htim);
676 
677  /* Disable the Peripheral */
678  __HAL_TIM_DISABLE(htim);
679 
680  /* Set the TIM complementary channel state */
682 
683  /* Return function status */
684  return HAL_OK;
685 }
686 
687 /**
688  * @brief Starts the TIM Output Compare signal generation in interrupt mode
689  * on the complementary output.
690  * @param htim TIM OC handle
691  * @param Channel TIM Channel to be enabled
692  * This parameter can be one of the following values:
693  * @arg TIM_CHANNEL_1: TIM Channel 1 selected
694  * @arg TIM_CHANNEL_2: TIM Channel 2 selected
695  * @arg TIM_CHANNEL_3: TIM Channel 3 selected
696  * @retval HAL status
697  */
699 {
700  uint32_t tmpsmcr;
701 
702  /* Check the parameters */
703  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
704 
705  /* Check the TIM complementary channel state */
707  {
708  return HAL_ERROR;
709  }
710 
711  /* Set the TIM complementary channel state */
713 
714  switch (Channel)
715  {
716  case TIM_CHANNEL_1:
717  {
718  /* Enable the TIM Output Compare interrupt */
720  break;
721  }
722 
723  case TIM_CHANNEL_2:
724  {
725  /* Enable the TIM Output Compare interrupt */
727  break;
728  }
729 
730  case TIM_CHANNEL_3:
731  {
732  /* Enable the TIM Output Compare interrupt */
734  break;
735  }
736 
737 
738  default:
739  break;
740  }
741 
742  /* Enable the TIM Break interrupt */
744 
745  /* Enable the Capture compare channel N */
746  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
747 
748  /* Enable the Main Output */
749  __HAL_TIM_MOE_ENABLE(htim);
750 
751  /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
752  if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
753  {
754  tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
755  if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
756  {
757  __HAL_TIM_ENABLE(htim);
758  }
759  }
760  else
761  {
762  __HAL_TIM_ENABLE(htim);
763  }
764 
765  /* Return function status */
766  return HAL_OK;
767 }
768 
769 /**
770  * @brief Stops the TIM Output Compare signal generation in interrupt mode
771  * on the complementary output.
772  * @param htim TIM Output Compare handle
773  * @param Channel TIM Channel to be disabled
774  * This parameter can be one of the following values:
775  * @arg TIM_CHANNEL_1: TIM Channel 1 selected
776  * @arg TIM_CHANNEL_2: TIM Channel 2 selected
777  * @arg TIM_CHANNEL_3: TIM Channel 3 selected
778  * @retval HAL status
779  */
781 {
782  uint32_t tmpccer;
783  /* Check the parameters */
784  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
785 
786  switch (Channel)
787  {
788  case TIM_CHANNEL_1:
789  {
790  /* Disable the TIM Output Compare interrupt */
792  break;
793  }
794 
795  case TIM_CHANNEL_2:
796  {
797  /* Disable the TIM Output Compare interrupt */
799  break;
800  }
801 
802  case TIM_CHANNEL_3:
803  {
804  /* Disable the TIM Output Compare interrupt */
806  break;
807  }
808 
809  default:
810  break;
811  }
812 
813  /* Disable the Capture compare channel N */
814  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
815 
816  /* Disable the TIM Break interrupt (only if no more channel is active) */
817  tmpccer = htim->Instance->CCER;
818  if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
819  {
821  }
822 
823  /* Disable the Main Output */
824  __HAL_TIM_MOE_DISABLE(htim);
825 
826  /* Disable the Peripheral */
827  __HAL_TIM_DISABLE(htim);
828 
829  /* Set the TIM complementary channel state */
831 
832  /* Return function status */
833  return HAL_OK;
834 }
835 
836 /**
837  * @brief Starts the TIM Output Compare signal generation in DMA mode
838  * on the complementary output.
839  * @param htim TIM Output Compare handle
840  * @param Channel TIM Channel to be enabled
841  * This parameter can be one of the following values:
842  * @arg TIM_CHANNEL_1: TIM Channel 1 selected
843  * @arg TIM_CHANNEL_2: TIM Channel 2 selected
844  * @arg TIM_CHANNEL_3: TIM Channel 3 selected
845  * @param pData The source Buffer address.
846  * @param Length The length of data to be transferred from memory to TIM peripheral
847  * @retval HAL status
848  */
849 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
850 {
851  uint32_t tmpsmcr;
852 
853  /* Check the parameters */
854  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
855 
856  /* Set the TIM complementary channel state */
858  {
859  return HAL_BUSY;
860  }
861  else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
862  {
863  if ((pData == NULL) && (Length > 0U))
864  {
865  return HAL_ERROR;
866  }
867  else
868  {
870  }
871  }
872  else
873  {
874  return HAL_ERROR;
875  }
876 
877  switch (Channel)
878  {
879  case TIM_CHANNEL_1:
880  {
881  /* Set the DMA compare callbacks */
882  htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseNCplt;
884 
885  /* Set the DMA error callback */
886  htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAErrorCCxN ;
887 
888  /* Enable the DMA channel */
889  if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length) != HAL_OK)
890  {
891  /* Return error status */
892  return HAL_ERROR;
893  }
894  /* Enable the TIM Output Compare DMA request */
896  break;
897  }
898 
899  case TIM_CHANNEL_2:
900  {
901  /* Set the DMA compare callbacks */
902  htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseNCplt;
904 
905  /* Set the DMA error callback */
906  htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAErrorCCxN ;
907 
908  /* Enable the DMA channel */
909  if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length) != HAL_OK)
910  {
911  /* Return error status */
912  return HAL_ERROR;
913  }
914  /* Enable the TIM Output Compare DMA request */
916  break;
917  }
918 
919  case TIM_CHANNEL_3:
920  {
921  /* Set the DMA compare callbacks */
922  htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseNCplt;
924 
925  /* Set the DMA error callback */
926  htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAErrorCCxN ;
927 
928  /* Enable the DMA channel */
929  if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3, Length) != HAL_OK)
930  {
931  /* Return error status */
932  return HAL_ERROR;
933  }
934  /* Enable the TIM Output Compare DMA request */
936  break;
937  }
938 
939  default:
940  break;
941  }
942 
943  /* Enable the Capture compare channel N */
944  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
945 
946  /* Enable the Main Output */
947  __HAL_TIM_MOE_ENABLE(htim);
948 
949  /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
950  if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
951  {
952  tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
953  if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
954  {
955  __HAL_TIM_ENABLE(htim);
956  }
957  }
958  else
959  {
960  __HAL_TIM_ENABLE(htim);
961  }
962 
963  /* Return function status */
964  return HAL_OK;
965 }
966 
967 /**
968  * @brief Stops the TIM Output Compare signal generation in DMA mode
969  * on the complementary output.
970  * @param htim TIM Output Compare handle
971  * @param Channel TIM Channel to be disabled
972  * This parameter can be one of the following values:
973  * @arg TIM_CHANNEL_1: TIM Channel 1 selected
974  * @arg TIM_CHANNEL_2: TIM Channel 2 selected
975  * @arg TIM_CHANNEL_3: TIM Channel 3 selected
976  * @retval HAL status
977  */
979 {
980  /* Check the parameters */
981  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
982 
983  switch (Channel)
984  {
985  case TIM_CHANNEL_1:
986  {
987  /* Disable the TIM Output Compare DMA request */
989  (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
990  break;
991  }
992 
993  case TIM_CHANNEL_2:
994  {
995  /* Disable the TIM Output Compare DMA request */
997  (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
998  break;
999  }
1000 
1001  case TIM_CHANNEL_3:
1002  {
1003  /* Disable the TIM Output Compare DMA request */
1005  (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
1006  break;
1007  }
1008 
1009  default:
1010  break;
1011  }
1012 
1013  /* Disable the Capture compare channel N */
1014  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
1015 
1016  /* Disable the Main Output */
1017  __HAL_TIM_MOE_DISABLE(htim);
1018 
1019  /* Disable the Peripheral */
1020  __HAL_TIM_DISABLE(htim);
1021 
1022  /* Set the TIM complementary channel state */
1024 
1025  /* Return function status */
1026  return HAL_OK;
1027 }
1028 
1029 /**
1030  * @}
1031  */
1032 
1033 /** @defgroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
1034  * @brief Timer Complementary PWM functions
1035  *
1036 @verbatim
1037  ==============================================================================
1038  ##### Timer Complementary PWM functions #####
1039  ==============================================================================
1040  [..]
1041  This section provides functions allowing to:
1042  (+) Start the Complementary PWM.
1043  (+) Stop the Complementary PWM.
1044  (+) Start the Complementary PWM and enable interrupts.
1045  (+) Stop the Complementary PWM and disable interrupts.
1046  (+) Start the Complementary PWM and enable DMA transfers.
1047  (+) Stop the Complementary PWM and disable DMA transfers.
1048  (+) Start the Complementary Input Capture measurement.
1049  (+) Stop the Complementary Input Capture.
1050  (+) Start the Complementary Input Capture and enable interrupts.
1051  (+) Stop the Complementary Input Capture and disable interrupts.
1052  (+) Start the Complementary Input Capture and enable DMA transfers.
1053  (+) Stop the Complementary Input Capture and disable DMA transfers.
1054  (+) Start the Complementary One Pulse generation.
1055  (+) Stop the Complementary One Pulse.
1056  (+) Start the Complementary One Pulse and enable interrupts.
1057  (+) Stop the Complementary One Pulse and disable interrupts.
1058 
1059 @endverbatim
1060  * @{
1061  */
1062 
1063 /**
1064  * @brief Starts the PWM signal generation on the complementary output.
1065  * @param htim TIM handle
1066  * @param Channel TIM Channel to be enabled
1067  * This parameter can be one of the following values:
1068  * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1069  * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1070  * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1071  * @retval HAL status
1072  */
1074 {
1075  uint32_t tmpsmcr;
1076 
1077  /* Check the parameters */
1078  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1079 
1080  /* Check the TIM complementary channel state */
1082  {
1083  return HAL_ERROR;
1084  }
1085 
1086  /* Set the TIM complementary channel state */
1088 
1089  /* Enable the complementary PWM output */
1090  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
1091 
1092  /* Enable the Main Output */
1093  __HAL_TIM_MOE_ENABLE(htim);
1094 
1095  /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
1096  if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
1097  {
1098  tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
1099  if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
1100  {
1101  __HAL_TIM_ENABLE(htim);
1102  }
1103  }
1104  else
1105  {
1106  __HAL_TIM_ENABLE(htim);
1107  }
1108 
1109  /* Return function status */
1110  return HAL_OK;
1111 }
1112 
1113 /**
1114  * @brief Stops the PWM signal generation on the complementary output.
1115  * @param htim TIM handle
1116  * @param Channel TIM Channel to be disabled
1117  * This parameter can be one of the following values:
1118  * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1119  * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1120  * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1121  * @retval HAL status
1122  */
1124 {
1125  /* Check the parameters */
1126  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1127 
1128  /* Disable the complementary PWM output */
1129  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
1130 
1131  /* Disable the Main Output */
1132  __HAL_TIM_MOE_DISABLE(htim);
1133 
1134  /* Disable the Peripheral */
1135  __HAL_TIM_DISABLE(htim);
1136 
1137  /* Set the TIM complementary channel state */
1139 
1140  /* Return function status */
1141  return HAL_OK;
1142 }
1143 
1144 /**
1145  * @brief Starts the PWM signal generation in interrupt mode on the
1146  * complementary output.
1147  * @param htim TIM handle
1148  * @param Channel TIM Channel to be disabled
1149  * This parameter can be one of the following values:
1150  * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1151  * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1152  * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1153  * @retval HAL status
1154  */
1156 {
1157  uint32_t tmpsmcr;
1158 
1159  /* Check the parameters */
1160  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1161 
1162  /* Check the TIM complementary channel state */
1164  {
1165  return HAL_ERROR;
1166  }
1167 
1168  /* Set the TIM complementary channel state */
1170 
1171  switch (Channel)
1172  {
1173  case TIM_CHANNEL_1:
1174  {
1175  /* Enable the TIM Capture/Compare 1 interrupt */
1177  break;
1178  }
1179 
1180  case TIM_CHANNEL_2:
1181  {
1182  /* Enable the TIM Capture/Compare 2 interrupt */
1184  break;
1185  }
1186 
1187  case TIM_CHANNEL_3:
1188  {
1189  /* Enable the TIM Capture/Compare 3 interrupt */
1191  break;
1192  }
1193 
1194  default:
1195  break;
1196  }
1197 
1198  /* Enable the TIM Break interrupt */
1200 
1201  /* Enable the complementary PWM output */
1202  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
1203 
1204  /* Enable the Main Output */
1205  __HAL_TIM_MOE_ENABLE(htim);
1206 
1207  /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
1208  if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
1209  {
1210  tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
1211  if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
1212  {
1213  __HAL_TIM_ENABLE(htim);
1214  }
1215  }
1216  else
1217  {
1218  __HAL_TIM_ENABLE(htim);
1219  }
1220 
1221  /* Return function status */
1222  return HAL_OK;
1223 }
1224 
1225 /**
1226  * @brief Stops the PWM signal generation in interrupt mode on the
1227  * complementary output.
1228  * @param htim TIM handle
1229  * @param Channel TIM Channel to be disabled
1230  * This parameter can be one of the following values:
1231  * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1232  * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1233  * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1234  * @retval HAL status
1235  */
1237 {
1238  uint32_t tmpccer;
1239 
1240  /* Check the parameters */
1241  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1242 
1243  switch (Channel)
1244  {
1245  case TIM_CHANNEL_1:
1246  {
1247  /* Disable the TIM Capture/Compare 1 interrupt */
1249  break;
1250  }
1251 
1252  case TIM_CHANNEL_2:
1253  {
1254  /* Disable the TIM Capture/Compare 2 interrupt */
1256  break;
1257  }
1258 
1259  case TIM_CHANNEL_3:
1260  {
1261  /* Disable the TIM Capture/Compare 3 interrupt */
1263  break;
1264  }
1265 
1266  default:
1267  break;
1268  }
1269 
1270  /* Disable the complementary PWM output */
1271  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
1272 
1273  /* Disable the TIM Break interrupt (only if no more channel is active) */
1274  tmpccer = htim->Instance->CCER;
1275  if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
1276  {
1278  }
1279 
1280  /* Disable the Main Output */
1281  __HAL_TIM_MOE_DISABLE(htim);
1282 
1283  /* Disable the Peripheral */
1284  __HAL_TIM_DISABLE(htim);
1285 
1286  /* Set the TIM complementary channel state */
1288 
1289  /* Return function status */
1290  return HAL_OK;
1291 }
1292 
1293 /**
1294  * @brief Starts the TIM PWM signal generation in DMA mode on the
1295  * complementary output
1296  * @param htim TIM handle
1297  * @param Channel TIM Channel to be enabled
1298  * This parameter can be one of the following values:
1299  * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1300  * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1301  * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1302  * @param pData The source Buffer address.
1303  * @param Length The length of data to be transferred from memory to TIM peripheral
1304  * @retval HAL status
1305  */
1306 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
1307 {
1308  uint32_t tmpsmcr;
1309 
1310  /* Check the parameters */
1311  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1312 
1313  /* Set the TIM complementary channel state */
1315  {
1316  return HAL_BUSY;
1317  }
1318  else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
1319  {
1320  if ((pData == NULL) && (Length > 0U))
1321  {
1322  return HAL_ERROR;
1323  }
1324  else
1325  {
1327  }
1328  }
1329  else
1330  {
1331  return HAL_ERROR;
1332  }
1333 
1334  switch (Channel)
1335  {
1336  case TIM_CHANNEL_1:
1337  {
1338  /* Set the DMA compare callbacks */
1339  htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseNCplt;
1341 
1342  /* Set the DMA error callback */
1343  htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAErrorCCxN ;
1344 
1345  /* Enable the DMA channel */
1346  if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length) != HAL_OK)
1347  {
1348  /* Return error status */
1349  return HAL_ERROR;
1350  }
1351  /* Enable the TIM Capture/Compare 1 DMA request */
1353  break;
1354  }
1355 
1356  case TIM_CHANNEL_2:
1357  {
1358  /* Set the DMA compare callbacks */
1359  htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseNCplt;
1361 
1362  /* Set the DMA error callback */
1363  htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAErrorCCxN ;
1364 
1365  /* Enable the DMA channel */
1366  if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length) != HAL_OK)
1367  {
1368  /* Return error status */
1369  return HAL_ERROR;
1370  }
1371  /* Enable the TIM Capture/Compare 2 DMA request */
1373  break;
1374  }
1375 
1376  case TIM_CHANNEL_3:
1377  {
1378  /* Set the DMA compare callbacks */
1379  htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseNCplt;
1381 
1382  /* Set the DMA error callback */
1383  htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAErrorCCxN ;
1384 
1385  /* Enable the DMA channel */
1386  if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3, Length) != HAL_OK)
1387  {
1388  /* Return error status */
1389  return HAL_ERROR;
1390  }
1391  /* Enable the TIM Capture/Compare 3 DMA request */
1393  break;
1394  }
1395 
1396  default:
1397  break;
1398  }
1399 
1400  /* Enable the complementary PWM output */
1401  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
1402 
1403  /* Enable the Main Output */
1404  __HAL_TIM_MOE_ENABLE(htim);
1405 
1406  /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
1407  if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
1408  {
1409  tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
1410  if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
1411  {
1412  __HAL_TIM_ENABLE(htim);
1413  }
1414  }
1415  else
1416  {
1417  __HAL_TIM_ENABLE(htim);
1418  }
1419 
1420  /* Return function status */
1421  return HAL_OK;
1422 }
1423 
1424 /**
1425  * @brief Stops the TIM PWM signal generation in DMA mode on the complementary
1426  * output
1427  * @param htim TIM handle
1428  * @param Channel TIM Channel to be disabled
1429  * This parameter can be one of the following values:
1430  * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1431  * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1432  * @arg TIM_CHANNEL_3: TIM Channel 3 selected
1433  * @retval HAL status
1434  */
1436 {
1437  /* Check the parameters */
1438  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1439 
1440  switch (Channel)
1441  {
1442  case TIM_CHANNEL_1:
1443  {
1444  /* Disable the TIM Capture/Compare 1 DMA request */
1446  (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
1447  break;
1448  }
1449 
1450  case TIM_CHANNEL_2:
1451  {
1452  /* Disable the TIM Capture/Compare 2 DMA request */
1454  (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
1455  break;
1456  }
1457 
1458  case TIM_CHANNEL_3:
1459  {
1460  /* Disable the TIM Capture/Compare 3 DMA request */
1462  (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
1463  break;
1464  }
1465 
1466  default:
1467  break;
1468  }
1469 
1470  /* Disable the complementary PWM output */
1471  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
1472 
1473  /* Disable the Main Output */
1474  __HAL_TIM_MOE_DISABLE(htim);
1475 
1476  /* Disable the Peripheral */
1477  __HAL_TIM_DISABLE(htim);
1478 
1479  /* Set the TIM complementary channel state */
1481 
1482  /* Return function status */
1483  return HAL_OK;
1484 }
1485 
1486 /**
1487  * @}
1488  */
1489 
1490 /** @defgroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
1491  * @brief Timer Complementary One Pulse functions
1492  *
1493 @verbatim
1494  ==============================================================================
1495  ##### Timer Complementary One Pulse functions #####
1496  ==============================================================================
1497  [..]
1498  This section provides functions allowing to:
1499  (+) Start the Complementary One Pulse generation.
1500  (+) Stop the Complementary One Pulse.
1501  (+) Start the Complementary One Pulse and enable interrupts.
1502  (+) Stop the Complementary One Pulse and disable interrupts.
1503 
1504 @endverbatim
1505  * @{
1506  */
1507 
1508 /**
1509  * @brief Starts the TIM One Pulse signal generation on the complementary
1510  * output.
1511  * @param htim TIM One Pulse handle
1512  * @param OutputChannel TIM Channel to be enabled
1513  * This parameter can be one of the following values:
1514  * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1515  * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1516  * @retval HAL status
1517  */
1518 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
1519 {
1520  uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
1521  HAL_TIM_ChannelStateTypeDef input_channel_state = TIM_CHANNEL_STATE_GET(htim, input_channel);
1522  HAL_TIM_ChannelStateTypeDef output_channel_state = TIM_CHANNEL_N_STATE_GET(htim, OutputChannel);
1523 
1524  /* Check the parameters */
1525  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
1526 
1527  /* Check the TIM channels state */
1528  if ((output_channel_state != HAL_TIM_CHANNEL_STATE_READY)
1529  || (input_channel_state != HAL_TIM_CHANNEL_STATE_READY))
1530  {
1531  return HAL_ERROR;
1532  }
1533 
1534  /* Set the TIM channels state */
1536  TIM_CHANNEL_STATE_SET(htim, input_channel, HAL_TIM_CHANNEL_STATE_BUSY);
1537 
1538  /* Enable the complementary One Pulse output channel and the Input Capture channel */
1539  TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
1540  TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE);
1541 
1542  /* Enable the Main Output */
1543  __HAL_TIM_MOE_ENABLE(htim);
1544 
1545  /* Return function status */
1546  return HAL_OK;
1547 }
1548 
1549 /**
1550  * @brief Stops the TIM One Pulse signal generation on the complementary
1551  * output.
1552  * @param htim TIM One Pulse handle
1553  * @param OutputChannel TIM Channel to be disabled
1554  * This parameter can be one of the following values:
1555  * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1556  * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1557  * @retval HAL status
1558  */
1559 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
1560 {
1561  uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
1562 
1563  /* Check the parameters */
1564  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
1565 
1566  /* Disable the complementary One Pulse output channel and the Input Capture channel */
1567  TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
1568  TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE);
1569 
1570  /* Disable the Main Output */
1571  __HAL_TIM_MOE_DISABLE(htim);
1572 
1573  /* Disable the Peripheral */
1574  __HAL_TIM_DISABLE(htim);
1575 
1576  /* Set the TIM channels state */
1578  TIM_CHANNEL_STATE_SET(htim, input_channel, HAL_TIM_CHANNEL_STATE_READY);
1579 
1580  /* Return function status */
1581  return HAL_OK;
1582 }
1583 
1584 /**
1585  * @brief Starts the TIM One Pulse signal generation in interrupt mode on the
1586  * complementary channel.
1587  * @param htim TIM One Pulse handle
1588  * @param OutputChannel TIM Channel to be enabled
1589  * This parameter can be one of the following values:
1590  * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1591  * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1592  * @retval HAL status
1593  */
1595 {
1596  uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
1597  HAL_TIM_ChannelStateTypeDef input_channel_state = TIM_CHANNEL_STATE_GET(htim, input_channel);
1598  HAL_TIM_ChannelStateTypeDef output_channel_state = TIM_CHANNEL_N_STATE_GET(htim, OutputChannel);
1599 
1600  /* Check the parameters */
1601  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
1602 
1603  /* Check the TIM channels state */
1604  if ((output_channel_state != HAL_TIM_CHANNEL_STATE_READY)
1605  || (input_channel_state != HAL_TIM_CHANNEL_STATE_READY))
1606  {
1607  return HAL_ERROR;
1608  }
1609 
1610  /* Set the TIM channels state */
1612  TIM_CHANNEL_STATE_SET(htim, input_channel, HAL_TIM_CHANNEL_STATE_BUSY);
1613 
1614  /* Enable the TIM Capture/Compare 1 interrupt */
1616 
1617  /* Enable the TIM Capture/Compare 2 interrupt */
1619 
1620  /* Enable the complementary One Pulse output channel and the Input Capture channel */
1621  TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
1622  TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE);
1623 
1624  /* Enable the Main Output */
1625  __HAL_TIM_MOE_ENABLE(htim);
1626 
1627  /* Return function status */
1628  return HAL_OK;
1629 }
1630 
1631 /**
1632  * @brief Stops the TIM One Pulse signal generation in interrupt mode on the
1633  * complementary channel.
1634  * @param htim TIM One Pulse handle
1635  * @param OutputChannel TIM Channel to be disabled
1636  * This parameter can be one of the following values:
1637  * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1638  * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1639  * @retval HAL status
1640  */
1642 {
1643  uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
1644 
1645  /* Check the parameters */
1646  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
1647 
1648  /* Disable the TIM Capture/Compare 1 interrupt */
1650 
1651  /* Disable the TIM Capture/Compare 2 interrupt */
1653 
1654  /* Disable the complementary One Pulse output channel and the Input Capture channel */
1655  TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
1656  TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_DISABLE);
1657 
1658  /* Disable the Main Output */
1659  __HAL_TIM_MOE_DISABLE(htim);
1660 
1661  /* Disable the Peripheral */
1662  __HAL_TIM_DISABLE(htim);
1663 
1664  /* Set the TIM channels state */
1666  TIM_CHANNEL_STATE_SET(htim, input_channel, HAL_TIM_CHANNEL_STATE_READY);
1667 
1668  /* Return function status */
1669  return HAL_OK;
1670 }
1671 
1672 /**
1673  * @}
1674  */
1675 
1676 /** @defgroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
1677  * @brief Peripheral Control functions
1678  *
1679 @verbatim
1680  ==============================================================================
1681  ##### Peripheral Control functions #####
1682  ==============================================================================
1683  [..]
1684  This section provides functions allowing to:
1685  (+) Configure the commutation event in case of use of the Hall sensor interface.
1686  (+) Configure Output channels for OC and PWM mode.
1687 
1688  (+) Configure Complementary channels, break features and dead time.
1689  (+) Configure Master synchronization.
1690  (+) Configure timer remapping capabilities.
1691 
1692 @endverbatim
1693  * @{
1694  */
1695 
1696 /**
1697  * @brief Configure the TIM commutation event sequence.
1698  * @note This function is mandatory to use the commutation event in order to
1699  * update the configuration at each commutation detection on the TRGI input of the Timer,
1700  * the typical use of this feature is with the use of another Timer(interface Timer)
1701  * configured in Hall sensor interface, this interface Timer will generate the
1702  * commutation at its TRGO output (connected to Timer used in this function) each time
1703  * the TI1 of the Interface Timer detect a commutation at its input TI1.
1704  * @param htim TIM handle
1705  * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
1706  * This parameter can be one of the following values:
1707  * @arg TIM_TS_ITR0: Internal trigger 0 selected
1708  * @arg TIM_TS_ITR1: Internal trigger 1 selected
1709  * @arg TIM_TS_ITR2: Internal trigger 2 selected
1710  * @arg TIM_TS_ITR3: Internal trigger 3 selected
1711  * @arg TIM_TS_NONE: No trigger is needed
1712  * @param CommutationSource the Commutation Event source
1713  * This parameter can be one of the following values:
1714  * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
1715  * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
1716  * @retval HAL status
1717  */
1719  uint32_t CommutationSource)
1720 {
1721  /* Check the parameters */
1724 
1725  __HAL_LOCK(htim);
1726 
1727  if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
1728  (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
1729  {
1730  /* Select the Input trigger */
1731  htim->Instance->SMCR &= ~TIM_SMCR_TS;
1732  htim->Instance->SMCR |= InputTrigger;
1733  }
1734 
1735  /* Select the Capture Compare preload feature */
1736  htim->Instance->CR2 |= TIM_CR2_CCPC;
1737  /* Select the Commutation event source */
1738  htim->Instance->CR2 &= ~TIM_CR2_CCUS;
1739  htim->Instance->CR2 |= CommutationSource;
1740 
1741  /* Disable Commutation Interrupt */
1743 
1744  /* Disable Commutation DMA request */
1746 
1747  __HAL_UNLOCK(htim);
1748 
1749  return HAL_OK;
1750 }
1751 
1752 /**
1753  * @brief Configure the TIM commutation event sequence with interrupt.
1754  * @note This function is mandatory to use the commutation event in order to
1755  * update the configuration at each commutation detection on the TRGI input of the Timer,
1756  * the typical use of this feature is with the use of another Timer(interface Timer)
1757  * configured in Hall sensor interface, this interface Timer will generate the
1758  * commutation at its TRGO output (connected to Timer used in this function) each time
1759  * the TI1 of the Interface Timer detect a commutation at its input TI1.
1760  * @param htim TIM handle
1761  * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
1762  * This parameter can be one of the following values:
1763  * @arg TIM_TS_ITR0: Internal trigger 0 selected
1764  * @arg TIM_TS_ITR1: Internal trigger 1 selected
1765  * @arg TIM_TS_ITR2: Internal trigger 2 selected
1766  * @arg TIM_TS_ITR3: Internal trigger 3 selected
1767  * @arg TIM_TS_NONE: No trigger is needed
1768  * @param CommutationSource the Commutation Event source
1769  * This parameter can be one of the following values:
1770  * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
1771  * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
1772  * @retval HAL status
1773  */
1775  uint32_t CommutationSource)
1776 {
1777  /* Check the parameters */
1780 
1781  __HAL_LOCK(htim);
1782 
1783  if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
1784  (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
1785  {
1786  /* Select the Input trigger */
1787  htim->Instance->SMCR &= ~TIM_SMCR_TS;
1788  htim->Instance->SMCR |= InputTrigger;
1789  }
1790 
1791  /* Select the Capture Compare preload feature */
1792  htim->Instance->CR2 |= TIM_CR2_CCPC;
1793  /* Select the Commutation event source */
1794  htim->Instance->CR2 &= ~TIM_CR2_CCUS;
1795  htim->Instance->CR2 |= CommutationSource;
1796 
1797  /* Disable Commutation DMA request */
1799 
1800  /* Enable the Commutation Interrupt */
1802 
1803  __HAL_UNLOCK(htim);
1804 
1805  return HAL_OK;
1806 }
1807 
1808 /**
1809  * @brief Configure the TIM commutation event sequence with DMA.
1810  * @note This function is mandatory to use the commutation event in order to
1811  * update the configuration at each commutation detection on the TRGI input of the Timer,
1812  * the typical use of this feature is with the use of another Timer(interface Timer)
1813  * configured in Hall sensor interface, this interface Timer will generate the
1814  * commutation at its TRGO output (connected to Timer used in this function) each time
1815  * the TI1 of the Interface Timer detect a commutation at its input TI1.
1816  * @note The user should configure the DMA in his own software, in This function only the COMDE bit is set
1817  * @param htim TIM handle
1818  * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
1819  * This parameter can be one of the following values:
1820  * @arg TIM_TS_ITR0: Internal trigger 0 selected
1821  * @arg TIM_TS_ITR1: Internal trigger 1 selected
1822  * @arg TIM_TS_ITR2: Internal trigger 2 selected
1823  * @arg TIM_TS_ITR3: Internal trigger 3 selected
1824  * @arg TIM_TS_NONE: No trigger is needed
1825  * @param CommutationSource the Commutation Event source
1826  * This parameter can be one of the following values:
1827  * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
1828  * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
1829  * @retval HAL status
1830  */
1832  uint32_t CommutationSource)
1833 {
1834  /* Check the parameters */
1837 
1838  __HAL_LOCK(htim);
1839 
1840  if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
1841  (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
1842  {
1843  /* Select the Input trigger */
1844  htim->Instance->SMCR &= ~TIM_SMCR_TS;
1845  htim->Instance->SMCR |= InputTrigger;
1846  }
1847 
1848  /* Select the Capture Compare preload feature */
1849  htim->Instance->CR2 |= TIM_CR2_CCPC;
1850  /* Select the Commutation event source */
1851  htim->Instance->CR2 &= ~TIM_CR2_CCUS;
1852  htim->Instance->CR2 |= CommutationSource;
1853 
1854  /* Enable the Commutation DMA Request */
1855  /* Set the DMA Commutation Callback */
1858  /* Set the DMA error callback */
1860 
1861  /* Disable Commutation Interrupt */
1863 
1864  /* Enable the Commutation DMA Request */
1866 
1867  __HAL_UNLOCK(htim);
1868 
1869  return HAL_OK;
1870 }
1871 
1872 /**
1873  * @brief Configures the TIM in master mode.
1874  * @param htim TIM handle.
1875  * @param sMasterConfig pointer to a TIM_MasterConfigTypeDef structure that
1876  * contains the selected trigger output (TRGO) and the Master/Slave
1877  * mode.
1878  * @retval HAL status
1879  */
1881  TIM_MasterConfigTypeDef *sMasterConfig)
1882 {
1883  uint32_t tmpcr2;
1884  uint32_t tmpsmcr;
1885 
1886  /* Check the parameters */
1890 
1891  /* Check input state */
1892  __HAL_LOCK(htim);
1893 
1894  /* Change the handler state */
1895  htim->State = HAL_TIM_STATE_BUSY;
1896 
1897  /* Get the TIMx CR2 register value */
1898  tmpcr2 = htim->Instance->CR2;
1899 
1900  /* Get the TIMx SMCR register value */
1901  tmpsmcr = htim->Instance->SMCR;
1902 
1903  /* Reset the MMS Bits */
1904  tmpcr2 &= ~TIM_CR2_MMS;
1905  /* Select the TRGO source */
1906  tmpcr2 |= sMasterConfig->MasterOutputTrigger;
1907 
1908  /* Update TIMx CR2 */
1909  htim->Instance->CR2 = tmpcr2;
1910 
1911  if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
1912  {
1913  /* Reset the MSM Bit */
1914  tmpsmcr &= ~TIM_SMCR_MSM;
1915  /* Set master mode */
1916  tmpsmcr |= sMasterConfig->MasterSlaveMode;
1917 
1918  /* Update TIMx SMCR */
1919  htim->Instance->SMCR = tmpsmcr;
1920  }
1921 
1922  /* Change the htim state */
1923  htim->State = HAL_TIM_STATE_READY;
1924 
1925  __HAL_UNLOCK(htim);
1926 
1927  return HAL_OK;
1928 }
1929 
1930 /**
1931  * @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State
1932  * and the AOE(automatic output enable).
1933  * @param htim TIM handle
1934  * @param sBreakDeadTimeConfig pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that
1935  * contains the BDTR Register configuration information for the TIM peripheral.
1936  * @note Interrupts can be generated when an active level is detected on the
1937  * break input, the break 2 input or the system break input. Break
1938  * interrupt can be enabled by calling the @ref __HAL_TIM_ENABLE_IT macro.
1939  * @retval HAL status
1940  */
1942  TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig)
1943 {
1944  /* Keep this variable initialized to 0 as it is used to configure BDTR register */
1945  uint32_t tmpbdtr = 0U;
1946 
1947  /* Check the parameters */
1949  assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode));
1950  assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode));
1951  assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel));
1952  assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime));
1953  assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState));
1954  assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity));
1956 
1957  /* Check input state */
1958  __HAL_LOCK(htim);
1959 
1960  /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State,
1961  the OSSI State, the dead time value and the Automatic Output Enable Bit */
1962 
1963  /* Set the BDTR bits */
1964  MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime);
1965  MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel);
1966  MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode);
1967  MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode);
1968  MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState);
1969  MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity);
1970  MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput);
1971 
1972 
1973  /* Set TIMx_BDTR */
1974  htim->Instance->BDTR = tmpbdtr;
1975 
1976  __HAL_UNLOCK(htim);
1977 
1978  return HAL_OK;
1979 }
1980 
1981 /**
1982  * @brief Configures the TIMx Remapping input capabilities.
1983  * @param htim TIM handle.
1984  * @param Remap specifies the TIM remapping source.
1985  *
1986  * @retval HAL status
1987  */
1989 {
1990  /* Prevent unused argument(s) compilation warning */
1991  UNUSED(htim);
1992  UNUSED(Remap);
1993 
1994  return HAL_OK;
1995 }
1996 
1997 /**
1998  * @}
1999  */
2000 
2001 /** @defgroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions
2002  * @brief Extended Callbacks functions
2003  *
2004 @verbatim
2005  ==============================================================================
2006  ##### Extended Callbacks functions #####
2007  ==============================================================================
2008  [..]
2009  This section provides Extended TIM callback functions:
2010  (+) Timer Commutation callback
2011  (+) Timer Break callback
2012 
2013 @endverbatim
2014  * @{
2015  */
2016 
2017 /**
2018  * @brief Hall commutation changed callback in non-blocking mode
2019  * @param htim TIM handle
2020  * @retval None
2021  */
2023 {
2024  /* Prevent unused argument(s) compilation warning */
2025  UNUSED(htim);
2026 
2027  /* NOTE : This function should not be modified, when the callback is needed,
2028  the HAL_TIMEx_CommutCallback could be implemented in the user file
2029  */
2030 }
2031 /**
2032  * @brief Hall commutation changed half complete callback in non-blocking mode
2033  * @param htim TIM handle
2034  * @retval None
2035  */
2037 {
2038  /* Prevent unused argument(s) compilation warning */
2039  UNUSED(htim);
2040 
2041  /* NOTE : This function should not be modified, when the callback is needed,
2042  the HAL_TIMEx_CommutHalfCpltCallback could be implemented in the user file
2043  */
2044 }
2045 
2046 /**
2047  * @brief Hall Break detection callback in non-blocking mode
2048  * @param htim TIM handle
2049  * @retval None
2050  */
2051 __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
2052 {
2053  /* Prevent unused argument(s) compilation warning */
2054  UNUSED(htim);
2055 
2056  /* NOTE : This function should not be modified, when the callback is needed,
2057  the HAL_TIMEx_BreakCallback could be implemented in the user file
2058  */
2059 }
2060 /**
2061  * @}
2062  */
2063 
2064 /** @defgroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
2065  * @brief Extended Peripheral State functions
2066  *
2067 @verbatim
2068  ==============================================================================
2069  ##### Extended Peripheral State functions #####
2070  ==============================================================================
2071  [..]
2072  This subsection permits to get in run-time the status of the peripheral
2073  and the data flow.
2074 
2075 @endverbatim
2076  * @{
2077  */
2078 
2079 /**
2080  * @brief Return the TIM Hall Sensor interface handle state.
2081  * @param htim TIM Hall Sensor handle
2082  * @retval HAL state
2083  */
2085 {
2086  return htim->State;
2087 }
2088 
2089 /**
2090  * @brief Return actual state of the TIM complementary channel.
2091  * @param htim TIM handle
2092  * @param ChannelN TIM Complementary channel
2093  * This parameter can be one of the following values:
2094  * @arg TIM_CHANNEL_1: TIM Channel 1
2095  * @arg TIM_CHANNEL_2: TIM Channel 2
2096  * @arg TIM_CHANNEL_3: TIM Channel 3
2097  * @retval TIM Complementary channel state
2098  */
2100 {
2101  HAL_TIM_ChannelStateTypeDef channel_state;
2102 
2103  /* Check the parameters */
2104  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, ChannelN));
2105 
2106  channel_state = TIM_CHANNEL_N_STATE_GET(htim, ChannelN);
2107 
2108  return channel_state;
2109 }
2110 /**
2111  * @}
2112  */
2113 
2114 /**
2115  * @}
2116  */
2117 
2118 /* Private functions ---------------------------------------------------------*/
2119 /** @defgroup TIMEx_Private_Functions TIMEx Private Functions
2120  * @{
2121  */
2122 
2123 /**
2124  * @brief TIM DMA Commutation callback.
2125  * @param hdma pointer to DMA handle.
2126  * @retval None
2127  */
2129 {
2130  TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
2131 
2132  /* Change the htim state */
2133  htim->State = HAL_TIM_STATE_READY;
2134 
2135 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
2136  htim->CommutationCallback(htim);
2137 #else
2139 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
2140 }
2141 
2142 /**
2143  * @brief TIM DMA Commutation half complete callback.
2144  * @param hdma pointer to DMA handle.
2145  * @retval None
2146  */
2148 {
2149  TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
2150 
2151  /* Change the htim state */
2152  htim->State = HAL_TIM_STATE_READY;
2153 
2154 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
2155  htim->CommutationHalfCpltCallback(htim);
2156 #else
2158 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
2159 }
2160 
2161 
2162 /**
2163  * @brief TIM DMA Delay Pulse complete callback (complementary channel).
2164  * @param hdma pointer to DMA handle.
2165  * @retval None
2166  */
2167 static void TIM_DMADelayPulseNCplt(DMA_HandleTypeDef *hdma)
2168 {
2169  TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
2170 
2171  if (hdma == htim->hdma[TIM_DMA_ID_CC1])
2172  {
2174 
2175  if (hdma->Init.Mode == DMA_NORMAL)
2176  {
2178  }
2179  }
2180  else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
2181  {
2183 
2184  if (hdma->Init.Mode == DMA_NORMAL)
2185  {
2187  }
2188  }
2189  else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
2190  {
2192 
2193  if (hdma->Init.Mode == DMA_NORMAL)
2194  {
2196  }
2197  }
2198  else if (hdma == htim->hdma[TIM_DMA_ID_CC4])
2199  {
2201 
2202  if (hdma->Init.Mode == DMA_NORMAL)
2203  {
2205  }
2206  }
2207  else
2208  {
2209  /* nothing to do */
2210  }
2211 
2212 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
2213  htim->PWM_PulseFinishedCallback(htim);
2214 #else
2216 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
2217 
2219 }
2220 
2221 /**
2222  * @brief TIM DMA error callback (complementary channel)
2223  * @param hdma pointer to DMA handle.
2224  * @retval None
2225  */
2226 static void TIM_DMAErrorCCxN(DMA_HandleTypeDef *hdma)
2227 {
2228  TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
2229 
2230  if (hdma == htim->hdma[TIM_DMA_ID_CC1])
2231  {
2234  }
2235  else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
2236  {
2239  }
2240  else if (hdma == htim->hdma[TIM_DMA_ID_CC3])
2241  {
2244  }
2245  else
2246  {
2247  /* nothing to do */
2248  }
2249 
2250 #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
2251  htim->ErrorCallback(htim);
2252 #else
2253  HAL_TIM_ErrorCallback(htim);
2254 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
2255 
2257 }
2258 
2259 /**
2260  * @brief Enables or disables the TIM Capture Compare Channel xN.
2261  * @param TIMx to select the TIM peripheral
2262  * @param Channel specifies the TIM Channel
2263  * This parameter can be one of the following values:
2264  * @arg TIM_CHANNEL_1: TIM Channel 1
2265  * @arg TIM_CHANNEL_2: TIM Channel 2
2266  * @arg TIM_CHANNEL_3: TIM Channel 3
2267  * @param ChannelNState specifies the TIM Channel CCxNE bit new state.
2268  * This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable.
2269  * @retval None
2270  */
2271 static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState)
2272 {
2273  uint32_t tmp;
2274 
2275  tmp = TIM_CCER_CC1NE << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */
2276 
2277  /* Reset the CCxNE Bit */
2278  TIMx->CCER &= ~tmp;
2279 
2280  /* Set or reset the CCxNE Bit */
2281  TIMx->CCER |= (uint32_t)(ChannelNState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */
2282 }
2283 /**
2284  * @}
2285  */
2286 
2287 #endif /* HAL_TIM_MODULE_ENABLED */
2288 /**
2289  * @}
2290  */
2291 
2292 /**
2293  * @}
2294  */
2295 
2296 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
HAL_TIMEx_PWMN_Start
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
IS_TIM_IC_FILTER
#define IS_TIM_IC_FILTER(__ICFILTER__)
Definition: stm32f1xx_hal_tim.h:1777
HAL_TIMEx_RemapConfig
HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap)
TIM_OC_InitTypeDef::Pulse
uint32_t Pulse
Definition: stm32f1xx_hal_tim.h:83
__DMA_HandleTypeDef::XferCpltCallback
void(* XferCpltCallback)(struct __DMA_HandleTypeDef *hdma)
Definition: stm32f1xx_hal_dma.h:123
TIM_OC_InitTypeDef::OCFastMode
uint32_t OCFastMode
Definition: stm32f1xx_hal_tim.h:93
TIM_IT_CC3
#define TIM_IT_CC3
Definition: stm32f1xx_hal_tim.h:676
TIM_OCPOLARITY_HIGH
#define TIM_OCPOLARITY_HIGH
Definition: stm32f1xx_hal_tim.h:576
TIM_SMCR_SMS
#define TIM_SMCR_SMS
Definition: stm32f103xb.h:3883
TIM_MasterConfigTypeDef::MasterOutputTrigger
uint32_t MasterOutputTrigger
Definition: stm32f1xx_hal_tim.h:231
TIM_OC_InitTypeDef::OCMode
uint32_t OCMode
Definition: stm32f1xx_hal_tim.h:80
__DMA_HandleTypeDef::XferErrorCallback
void(* XferErrorCallback)(struct __DMA_HandleTypeDef *hdma)
Definition: stm32f1xx_hal_dma.h:127
TIM_DMACaptureHalfCplt
void TIM_DMACaptureHalfCplt(DMA_HandleTypeDef *hdma)
TIM_CHANNEL_N_STATE_SET
#define TIM_CHANNEL_N_STATE_SET(__HANDLE__, __CHANNEL__, __CHANNEL_STATE__)
Definition: stm32f1xx_hal_tim.h:1832
HAL_TIMEx_HallSensor_MspDeInit
void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim)
IS_TIM_BREAK_STATE
#define IS_TIM_BREAK_STATE(__STATE__)
Definition: stm32f1xx_hal_tim.h:1688
IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION
#define IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(__SELECTION__)
Definition: stm32f1xx_hal_tim.h:1734
HAL_TIMEx_PWMN_Start_DMA
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
HAL_TIMEx_OCN_Stop_DMA
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
IS_TIM_DEADTIME
#define IS_TIM_DEADTIME(__DEADTIME__)
Definition: stm32f1xx_hal_tim.h:1779
IS_TIM_OSSI_STATE
#define IS_TIM_OSSI_STATE(__STATE__)
Definition: stm32f1xx_hal_tim.h:1677
UNUSED
#define UNUSED(X)
Definition: stm32f1xx_hal_def.h:68
HAL_TIMEx_CommutHalfCpltCallback
void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim)
TIM_BreakDeadTimeConfigTypeDef::BreakState
uint32_t BreakState
Definition: stm32f1xx_hal_tim.h:275
__DMA_HandleTypeDef
DMA handle Structure definition.
Definition: stm32f1xx_hal_dma.h:111
TIM_CCxChannelCmd
void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState)
HAL_TIMEx_OnePulseN_Stop_IT
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
HAL_TIMEx_BreakCallback
void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
TIM_CHANNEL_1
#define TIM_CHANNEL_1
Definition: stm32f1xx_hal_tim.h:730
__HAL_TIM_DISABLE
#define __HAL_TIM_DISABLE(__HANDLE__)
Disable the TIM peripheral.
Definition: stm32f1xx_hal_tim.h:1079
HAL_TIMEx_HallSensor_MspInit
void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim)
IS_TIM_IC_POLARITY
#define IS_TIM_IC_POLARITY(__POLARITY__)
Definition: stm32f1xx_hal_tim.h:1605
__HAL_TIM_ENABLE_DMA
#define __HAL_TIM_ENABLE_DMA(__HANDLE__, __DMA__)
Enable the specified DMA request.
Definition: stm32f1xx_hal_tim.h:1160
TIM_TS_ITR1
#define TIM_TS_ITR1
Definition: stm32f1xx_hal_tim.h:910
TIM_TypeDef::BDTR
__IO uint32_t BDTR
Definition: stm32f103xb.h:496
TIM_CCER_CC3NE
#define TIM_CCER_CC3NE
Definition: stm32f103xb.h:4222
stm32f1xx_hal.h
This file contains all the functions prototypes for the HAL module driver.
TIM_CHANNEL_2
#define TIM_CHANNEL_2
Definition: stm32f1xx_hal_tim.h:731
HAL_TIMEx_ConfigCommutEvent
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
IS_TIM_MASTER_INSTANCE
#define IS_TIM_MASTER_INSTANCE(INSTANCE)
Definition: stm32f103xb.h:10010
TIM_DMA_ID_CC3
#define TIM_DMA_ID_CC3
Definition: stm32f1xx_hal_tim.h:985
TIM_CCxN_ENABLE
#define TIM_CCxN_ENABLE
Definition: stm32f1xx_hal_tim.h:998
TIM_HandleTypeDef::DMABurstState
__IO HAL_TIM_DMABurstStateTypeDef DMABurstState
Definition: stm32f1xx_hal_tim.h:347
HAL_DMA_Abort_IT
HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma)
TIM_Base_InitTypeDef::CounterMode
uint32_t CounterMode
Definition: stm32f1xx_hal_tim.h:52
__HAL_TIM_MOE_ENABLE
#define __HAL_TIM_MOE_ENABLE(__HANDLE__)
Enable the TIM main Output.
Definition: stm32f1xx_hal_tim.h:1072
HAL_TIM_CHANNEL_STATE_READY
@ HAL_TIM_CHANNEL_STATE_READY
Definition: stm32f1xx_hal_tim.h:303
HAL_TIMEx_HallSensor_Start_IT
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim)
TIM_OCNPOLARITY_HIGH
#define TIM_OCNPOLARITY_HIGH
Definition: stm32f1xx_hal_tim.h:585
TIMEx_DMACommutationCplt
void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma)
TIM_OC_InitTypeDef::OCNPolarity
uint32_t OCNPolarity
Definition: stm32f1xx_hal_tim.h:89
__HAL_TIM_DISABLE_DMA
#define __HAL_TIM_DISABLE_DMA(__HANDLE__, __DMA__)
Disable the specified DMA request.
Definition: stm32f1xx_hal_tim.h:1175
IS_TIM_COUNTER_MODE
#define IS_TIM_COUNTER_MODE(__MODE__)
Definition: stm32f1xx_hal_tim.h:1574
TIM_CR2_CCPC
#define TIM_CR2_CCPC
Definition: stm32f103xb.h:3840
HAL_TIM_ACTIVE_CHANNEL_3
@ HAL_TIM_ACTIVE_CHANNEL_3
Definition: stm32f1xx_hal_tim.h:324
__DMA_HandleTypeDef::Init
DMA_InitTypeDef Init
Definition: stm32f1xx_hal_dma.h:115
IS_TIM_TRGO_SOURCE
#define IS_TIM_TRGO_SOURCE(__SOURCE__)
Definition: stm32f1xx_hal_tim.h:1697
TIM_DMA_CC3
#define TIM_DMA_CC3
Definition: stm32f1xx_hal_tim.h:700
TIM_ICSELECTION_TRC
#define TIM_ICSELECTION_TRC
Definition: stm32f1xx_hal_tim.h:635
TIM_OC_InitTypeDef::OCIdleState
uint32_t OCIdleState
Definition: stm32f1xx_hal_tim.h:98
TIM_CHANNEL_3
#define TIM_CHANNEL_3
Definition: stm32f1xx_hal_tim.h:732
TIM_DMAError
void TIM_DMAError(DMA_HandleTypeDef *hdma)
TIM_DMA_CC2
#define TIM_DMA_CC2
Definition: stm32f1xx_hal_tim.h:699
TIM_MasterConfigTypeDef::MasterSlaveMode
uint32_t MasterSlaveMode
Definition: stm32f1xx_hal_tim.h:233
HAL_TIMEx_PWMN_Start_IT
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
HAL_TIM_CHANNEL_STATE_BUSY
@ HAL_TIM_CHANNEL_STATE_BUSY
Definition: stm32f1xx_hal_tim.h:304
TIM_OCIDLESTATE_RESET
#define TIM_OCIDLESTATE_RESET
Definition: stm32f1xx_hal_tim.h:595
TIM_Base_InitTypeDef::ClockDivision
uint32_t ClockDivision
Definition: stm32f1xx_hal_tim.h:59
IS_TIM_BREAK_POLARITY
#define IS_TIM_BREAK_POLARITY(__POLARITY__)
Definition: stm32f1xx_hal_tim.h:1691
TIM_TypeDef::CCER
__IO uint32_t CCER
Definition: stm32f103xb.h:487
HAL_TIMEx_OnePulseN_Start
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
HAL_TIMEx_OCN_Stop_IT
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
HAL_TIMEx_ConfigCommutEvent_IT
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
TIM_TypeDef::CR2
__IO uint32_t CR2
Definition: stm32f103xb.h:480
HAL_BUSY
@ HAL_BUSY
Definition: stm32f1xx_hal_def.h:43
IS_TIM_LOCK_LEVEL
#define IS_TIM_LOCK_LEVEL(__LEVEL__)
Definition: stm32f1xx_hal_tim.h:1680
HAL_DMA_BURST_STATE_RESET
@ HAL_DMA_BURST_STATE_RESET
Definition: stm32f1xx_hal_tim.h:312
TIM_IT_CC1
#define TIM_IT_CC1
Definition: stm32f1xx_hal_tim.h:674
HAL_TIM_ErrorCallback
void HAL_TIM_ErrorCallback(TIM_HandleTypeDef *htim)
TIM_DMA_CC1
#define TIM_DMA_CC1
Definition: stm32f1xx_hal_tim.h:698
IS_TIM_SLAVEMODE_TRIGGER_ENABLED
#define IS_TIM_SLAVEMODE_TRIGGER_ENABLED(__TRIGGER__)
Definition: stm32f1xx_hal_tim.h:1781
IS_TIM_SLAVE_INSTANCE
#define IS_TIM_SLAVE_INSTANCE(INSTANCE)
Definition: stm32f103xb.h:10016
TIM_HallSensor_InitTypeDef::IC1Filter
uint32_t IC1Filter
Definition: stm32f1xx_hal_tim_ex.h:56
TIM_DMA_ID_COMMUTATION
#define TIM_DMA_ID_COMMUTATION
Definition: stm32f1xx_hal_tim.h:987
TIM_HallSensor_InitTypeDef::IC1Prescaler
uint32_t IC1Prescaler
Definition: stm32f1xx_hal_tim_ex.h:53
assert_param
#define assert_param(expr)
Definition: stm32_assert.h:44
HAL_TIMEx_OnePulseN_Stop
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
TIM_SMCR_MSM
#define TIM_SMCR_MSM
Definition: stm32f103xb.h:3897
TIM_DMA_ID_CC2
#define TIM_DMA_ID_CC2
Definition: stm32f1xx_hal_tim.h:984
TIM_OCFAST_DISABLE
#define TIM_OCFAST_DISABLE
Definition: stm32f1xx_hal_tim.h:558
TIM_TypeDef::SMCR
__IO uint32_t SMCR
Definition: stm32f103xb.h:481
TIM_TypeDef::CCR3
__IO uint32_t CCR3
Definition: stm32f103xb.h:494
TIM_TypeDef
TIM Timers.
Definition: stm32f103xb.h:477
TIM_HallSensor_InitTypeDef
TIM Hall sensor Configuration Structure definition.
Definition: stm32f1xx_hal_tim_ex.h:48
IS_TIM_AUTOMATIC_OUTPUT_STATE
#define IS_TIM_AUTOMATIC_OUTPUT_STATE(__STATE__)
Definition: stm32f1xx_hal_tim.h:1694
TIM_BreakDeadTimeConfigTypeDef::AutomaticOutput
uint32_t AutomaticOutput
Definition: stm32f1xx_hal_tim.h:281
TIM_IT_COM
#define TIM_IT_COM
Definition: stm32f1xx_hal_tim.h:678
HAL_TIMEx_PWMN_Stop_IT
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
HAL_TIMEx_PWMN_Stop
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
__HAL_TIM_ENABLE
#define __HAL_TIM_ENABLE(__HANDLE__)
Enable the TIM peripheral.
Definition: stm32f1xx_hal_tim.h:1065
__HAL_TIM_DISABLE_IT
#define __HAL_TIM_DISABLE_IT(__HANDLE__, __INTERRUPT__)
Disable the specified TIM interrupt.
Definition: stm32f1xx_hal_tim.h:1145
__HAL_LOCK
#define __HAL_LOCK(__HANDLE__)
Definition: stm32f1xx_hal_def.h:91
HAL_UNLOCKED
@ HAL_UNLOCKED
Definition: stm32f1xx_hal_def.h:52
TIM_CCER_CC2NE
#define TIM_CCER_CC2NE
Definition: stm32f103xb.h:4210
HAL_TIMEx_OCN_Stop
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
TIM_DMA_ID_CC1
#define TIM_DMA_ID_CC1
Definition: stm32f1xx_hal_tim.h:983
TIM_CR2_MMS
#define TIM_CR2_MMS
Definition: stm32f103xb.h:3850
IS_TIM_CCXN_INSTANCE
#define IS_TIM_CCXN_INSTANCE(INSTANCE, CHANNEL)
Definition: stm32f103xb.h:10056
HAL_TIM_ACTIVE_CHANNEL_2
@ HAL_TIM_ACTIVE_CHANNEL_2
Definition: stm32f1xx_hal_tim.h:323
HAL_TIM_STATE_RESET
@ HAL_TIM_STATE_RESET
Definition: stm32f1xx_hal_tim.h:290
IS_TIM_COMMUTATION_EVENT_INSTANCE
#define IS_TIM_COMMUTATION_EVENT_INSTANCE(INSTANCE)
Definition: stm32f103xb.h:10089
HAL_TIMEx_OCN_Start
HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
TIM_CHANNEL_N_STATE_GET
#define TIM_CHANNEL_N_STATE_GET(__HANDLE__, __CHANNEL__)
Definition: stm32f1xx_hal_tim.h:1826
TIM_OC_InitTypeDef
TIM Output Compare Configuration Structure definition.
Definition: stm32f1xx_hal_tim.h:78
TIM_CCx_ENABLE
#define TIM_CCx_ENABLE
Definition: stm32f1xx_hal_tim.h:996
TIM_IT_CC2
#define TIM_IT_CC2
Definition: stm32f1xx_hal_tim.h:675
TIM_HandleTypeDef
TIM Time Base Handle Structure definition.
Definition: stm32f1xx_hal_tim.h:335
TIM_BDTR_OSSI
#define TIM_BDTR_OSSI
Definition: stm32f103xb.h:4294
MODIFY_REG
#define MODIFY_REG(REG, CLEARMASK, SETMASK)
Definition: stm32f1xx.h:190
HAL_TIMEx_HallSensor_Stop_DMA
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim)
RESET
@ RESET
Definition: stm32f1xx.h:153
TIM_BreakDeadTimeConfigTypeDef::OffStateIDLEMode
uint32_t OffStateIDLEMode
Definition: stm32f1xx_hal_tim.h:269
TIM_HandleTypeDef::Channel
HAL_TIM_ActiveChannel Channel
Definition: stm32f1xx_hal_tim.h:340
HAL_TIM_PWM_PulseFinishedCallback
void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim)
HAL_DMA_Start_IT
HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
HAL_TIMEx_HallSensor_Start_DMA
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length)
TIM_CR2_CCUS
#define TIM_CR2_CCUS
Definition: stm32f103xb.h:3843
HAL_TIMEx_HallSensor_Init
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef *sConfig)
HAL_OK
@ HAL_OK
Definition: stm32f1xx_hal_def.h:41
TIM_Base_InitTypeDef::AutoReloadPreload
uint32_t AutoReloadPreload
Definition: stm32f1xx_hal_tim.h:71
TIM_CCxN_DISABLE
#define TIM_CCxN_DISABLE
Definition: stm32f1xx_hal_tim.h:999
HAL_TIM_StateTypeDef
HAL_TIM_StateTypeDef
HAL State structures definition.
Definition: stm32f1xx_hal_tim.h:288
TIM_DMA_ID_CC4
#define TIM_DMA_ID_CC4
Definition: stm32f1xx_hal_tim.h:986
HAL_TIM_ChannelStateTypeDef
HAL_TIM_ChannelStateTypeDef
TIM Channel States definition.
Definition: stm32f1xx_hal_tim.h:300
HAL_TIMEx_HallSensor_Stop
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim)
TIM_BreakDeadTimeConfigTypeDef::DeadTime
uint32_t DeadTime
Definition: stm32f1xx_hal_tim.h:273
HAL_DMA_BURST_STATE_READY
@ HAL_DMA_BURST_STATE_READY
Definition: stm32f1xx_hal_tim.h:313
TIM_Base_SetConfig
void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure)
HAL_TIMEx_CommutCallback
void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
HAL_TIM_ACTIVE_CHANNEL_CLEARED
@ HAL_TIM_ACTIVE_CHANNEL_CLEARED
Definition: stm32f1xx_hal_tim.h:326
IS_TIM_BREAK_INSTANCE
#define IS_TIM_BREAK_INSTANCE(INSTANCE)
Definition: stm32f103xb.h:10028
TIM_HallSensor_InitTypeDef::IC1Polarity
uint32_t IC1Polarity
Definition: stm32f1xx_hal_tim_ex.h:50
TIM_CCx_DISABLE
#define TIM_CCx_DISABLE
Definition: stm32f1xx_hal_tim.h:997
TIM_CR2_TI1S
#define TIM_CR2_TI1S
Definition: stm32f103xb.h:3857
TIM_CHANNEL_STATE_SET
#define TIM_CHANNEL_STATE_SET(__HANDLE__, __CHANNEL__, __CHANNEL_STATE__)
Definition: stm32f1xx_hal_tim.h:1813
TIM_TRGO_OC2REF
#define TIM_TRGO_OC2REF
Definition: stm32f1xx_hal_tim.h:863
TIM_CHANNEL_4
#define TIM_CHANNEL_4
Definition: stm32f1xx_hal_tim.h:733
TIM_OC2_SetConfig
void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config)
TIM_DMADelayPulseHalfCplt
void TIM_DMADelayPulseHalfCplt(DMA_HandleTypeDef *hdma)
DMA_NORMAL
#define DMA_NORMAL
Definition: stm32f1xx_hal_dma.h:212
HAL_TIMEx_PWMN_Stop_DMA
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
HAL_TIMEx_OnePulseN_Start_IT
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
HAL_TIMEx_OCN_Start_IT
HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
TIM_BDTR_OSSR
#define TIM_BDTR_OSSR
Definition: stm32f103xb.h:4297
TIM_TypeDef::CCMR1
__IO uint32_t CCMR1
Definition: stm32f103xb.h:485
IS_TIM_AUTORELOAD_PRELOAD
#define IS_TIM_AUTORELOAD_PRELOAD(PRELOAD)
Definition: stm32f1xx_hal_tim.h:1584
HAL_TIMEx_HallSensor_Start
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim)
TIM_MasterConfigTypeDef
TIM Master configuration Structure definition.
Definition: stm32f1xx_hal_tim.h:229
TIM_BDTR_BKE
#define TIM_BDTR_BKE
Definition: stm32f103xb.h:4300
TIM_TS_ITR3
#define TIM_TS_ITR3
Definition: stm32f1xx_hal_tim.h:912
TIM_CCER_CC1NE
#define TIM_CCER_CC1NE
Definition: stm32f103xb.h:4198
TIM_TS_ITR2
#define TIM_TS_ITR2
Definition: stm32f1xx_hal_tim.h:911
HAL_TIMEx_MasterConfigSynchronization
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef *sMasterConfig)
IS_TIM_INSTANCE
#define IS_TIM_INSTANCE(INSTANCE)
Definition: stm32f103xb.h:9936
HAL_StatusTypeDef
HAL_StatusTypeDef
HAL Status structures definition.
Definition: stm32f1xx_hal_def.h:39
TIM_BDTR_AOE
#define TIM_BDTR_AOE
Definition: stm32f103xb.h:4306
HAL_TIM_STATE_BUSY
@ HAL_TIM_STATE_BUSY
Definition: stm32f1xx_hal_tim.h:292
IS_TIM_OSSR_STATE
#define IS_TIM_OSSR_STATE(__STATE__)
Definition: stm32f1xx_hal_tim.h:1674
TIM_BreakDeadTimeConfigTypeDef::BreakPolarity
uint32_t BreakPolarity
Definition: stm32f1xx_hal_tim.h:277
HAL_TIM_CHANNEL_STATE_RESET
@ HAL_TIM_CHANNEL_STATE_RESET
Definition: stm32f1xx_hal_tim.h:302
__HAL_TIM_ENABLE_IT
#define __HAL_TIM_ENABLE_IT(__HANDLE__, __INTERRUPT__)
Enable the specified TIM interrupt.
Definition: stm32f1xx_hal_tim.h:1129
TIM_HandleTypeDef::Init
TIM_Base_InitTypeDef Init
Definition: stm32f1xx_hal_tim.h:339
TIM_TypeDef::CCR1
__IO uint32_t CCR1
Definition: stm32f103xb.h:492
TIM_DMACaptureCplt
void TIM_DMACaptureCplt(DMA_HandleTypeDef *hdma)
TIM_HandleTypeDef::Lock
HAL_LockTypeDef Lock
Definition: stm32f1xx_hal_tim.h:343
TIM_BDTR_BKP
#define TIM_BDTR_BKP
Definition: stm32f103xb.h:4303
HAL_TIMEx_GetChannelNState
HAL_TIM_ChannelStateTypeDef HAL_TIMEx_GetChannelNState(TIM_HandleTypeDef *htim, uint32_t ChannelN)
TIM_CHANNEL_STATE_GET
#define TIM_CHANNEL_STATE_GET(__HANDLE__, __CHANNEL__)
Definition: stm32f1xx_hal_tim.h:1807
TIM_IT_BREAK
#define TIM_IT_BREAK
Definition: stm32f1xx_hal_tim.h:680
HAL_TIMEx_HallSensor_GetState
HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim)
IS_TIM_MSM_STATE
#define IS_TIM_MSM_STATE(__STATE__)
Definition: stm32f1xx_hal_tim.h:1706
TIM_CCMR1_IC1PSC
#define TIM_CCMR1_IC1PSC
Definition: stm32f103xb.h:4084
TIM_SLAVEMODE_RESET
#define TIM_SLAVEMODE_RESET
Definition: stm32f1xx_hal_tim.h:883
TIM_OCMODE_PWM2
#define TIM_OCMODE_PWM2
Definition: stm32f1xx_hal_tim.h:899
HAL_TIMEx_ConfigCommutEvent_DMA
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource)
TIM_BreakDeadTimeConfigTypeDef::LockLevel
uint32_t LockLevel
Definition: stm32f1xx_hal_tim.h:271
DMA_InitTypeDef::Mode
uint32_t Mode
Definition: stm32f1xx_hal_dma.h:66
__HAL_TIM_MOE_DISABLE
#define __HAL_TIM_MOE_DISABLE(__HANDLE__)
Disable the TIM main Output.
Definition: stm32f1xx_hal_tim.h:1096
IS_TIM_CLOCKDIVISION_DIV
#define IS_TIM_CLOCKDIVISION_DIV(__DIV__)
Definition: stm32f1xx_hal_tim.h:1580
TIM_BreakDeadTimeConfigTypeDef::OffStateRunMode
uint32_t OffStateRunMode
Definition: stm32f1xx_hal_tim.h:267
TIM_OC_InitTypeDef::OCNIdleState
uint32_t OCNIdleState
Definition: stm32f1xx_hal_tim.h:102
TIM_OCNIDLESTATE_RESET
#define TIM_OCNIDLESTATE_RESET
Definition: stm32f1xx_hal_tim.h:604
TIMEx_DMACommutationHalfCplt
void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma)
TIM_TS_TI1F_ED
#define TIM_TS_TI1F_ED
Definition: stm32f1xx_hal_tim.h:913
HAL_ERROR
@ HAL_ERROR
Definition: stm32f1xx_hal_def.h:42
__DMA_HandleTypeDef::XferHalfCpltCallback
void(* XferHalfCpltCallback)(struct __DMA_HandleTypeDef *hdma)
Definition: stm32f1xx_hal_dma.h:125
TIM_HandleTypeDef::Instance
TIM_TypeDef * Instance
Definition: stm32f1xx_hal_tim.h:338
HAL_TIMEx_HallSensor_DeInit
HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim)
TIM_HallSensor_InitTypeDef::Commutation_Delay
uint32_t Commutation_Delay
Definition: stm32f1xx_hal_tim_ex.h:59
TIM_HandleTypeDef::State
__IO HAL_TIM_StateTypeDef State
Definition: stm32f1xx_hal_tim.h:344
TIM_OC_InitTypeDef::OCPolarity
uint32_t OCPolarity
Definition: stm32f1xx_hal_tim.h:86
IS_TIM_IC_PRESCALER
#define IS_TIM_IC_PRESCALER(__PRESCALER__)
Definition: stm32f1xx_hal_tim.h:1613
TIM_BreakDeadTimeConfigTypeDef
TIM Break input(s) and Dead time configuration Structure definition.
Definition: stm32f1xx_hal_tim.h:265
IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE
#define IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(INSTANCE)
Definition: stm32f103xb.h:10097
TIM_HandleTypeDef::hdma
DMA_HandleTypeDef * hdma[7]
Definition: stm32f1xx_hal_tim.h:341
__HAL_UNLOCK
#define __HAL_UNLOCK(__HANDLE__)
Definition: stm32f1xx_hal_def.h:103
TIM_SMCR_TS
#define TIM_SMCR_TS
Definition: stm32f103xb.h:3890
TIM_BDTR_DTG
#define TIM_BDTR_DTG
Definition: stm32f103xb.h:4276
TIM_TypeDef::CCR2
__IO uint32_t CCR2
Definition: stm32f103xb.h:493
TIM_DMA_COM
#define TIM_DMA_COM
Definition: stm32f1xx_hal_tim.h:702
HAL_TIM_STATE_READY
@ HAL_TIM_STATE_READY
Definition: stm32f1xx_hal_tim.h:291
HAL_TIMEx_ConfigBreakDeadTime
HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig)
TIM_TS_ITR0
#define TIM_TS_ITR0
Definition: stm32f1xx_hal_tim.h:909
NULL
#define NULL
Definition: SEGGER_RTT.c:177
HAL_TIM_ACTIVE_CHANNEL_4
@ HAL_TIM_ACTIVE_CHANNEL_4
Definition: stm32f1xx_hal_tim.h:325
TIM_TI1_SetConfig
void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, uint32_t TIM_ICFilter)
HAL_TIM_ACTIVE_CHANNEL_1
@ HAL_TIM_ACTIVE_CHANNEL_1
Definition: stm32f1xx_hal_tim.h:322
HAL_TIMEx_OCN_Start_DMA
HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
TIM_BDTR_LOCK
#define TIM_BDTR_LOCK
Definition: stm32f103xb.h:4288
HAL_TIMEx_HallSensor_Stop_IT
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim)