21 #ifndef __STM32F1xx_HAL_I2C_H
22 #define __STM32F1xx_HAL_I2C_H
164 #define HAL_I2C_ERROR_NONE 0x00000000U
165 #define HAL_I2C_ERROR_BERR 0x00000001U
166 #define HAL_I2C_ERROR_ARLO 0x00000002U
167 #define HAL_I2C_ERROR_AF 0x00000004U
168 #define HAL_I2C_ERROR_OVR 0x00000008U
169 #define HAL_I2C_ERROR_DMA 0x00000010U
170 #define HAL_I2C_ERROR_TIMEOUT 0x00000020U
171 #define HAL_I2C_ERROR_SIZE 0x00000040U
172 #define HAL_I2C_ERROR_DMA_PARAM 0x00000080U
173 #define HAL_I2C_WRONG_START 0x00000200U
174 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
175 #define HAL_I2C_ERROR_INVALID_CALLBACK 0x00000100U
185 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
186 typedef struct __I2C_HandleTypeDef
227 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
228 void (* MasterTxCpltCallback)(
struct __I2C_HandleTypeDef *hi2c);
229 void (* MasterRxCpltCallback)(
struct __I2C_HandleTypeDef *hi2c);
230 void (* SlaveTxCpltCallback)(
struct __I2C_HandleTypeDef *hi2c);
231 void (* SlaveRxCpltCallback)(
struct __I2C_HandleTypeDef *hi2c);
232 void (* ListenCpltCallback)(
struct __I2C_HandleTypeDef *hi2c);
233 void (* MemTxCpltCallback)(
struct __I2C_HandleTypeDef *hi2c);
234 void (* MemRxCpltCallback)(
struct __I2C_HandleTypeDef *hi2c);
235 void (* ErrorCallback)(
struct __I2C_HandleTypeDef *hi2c);
236 void (* AbortCpltCallback)(
struct __I2C_HandleTypeDef *hi2c);
238 void (* AddrCallback)(
struct __I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
240 void (* MspInitCallback)(
struct __I2C_HandleTypeDef *hi2c);
241 void (* MspDeInitCallback)(
struct __I2C_HandleTypeDef *hi2c);
246 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
252 HAL_I2C_MASTER_TX_COMPLETE_CB_ID = 0x00U,
253 HAL_I2C_MASTER_RX_COMPLETE_CB_ID = 0x01U,
254 HAL_I2C_SLAVE_TX_COMPLETE_CB_ID = 0x02U,
255 HAL_I2C_SLAVE_RX_COMPLETE_CB_ID = 0x03U,
256 HAL_I2C_LISTEN_COMPLETE_CB_ID = 0x04U,
257 HAL_I2C_MEM_TX_COMPLETE_CB_ID = 0x05U,
258 HAL_I2C_MEM_RX_COMPLETE_CB_ID = 0x06U,
259 HAL_I2C_ERROR_CB_ID = 0x07U,
260 HAL_I2C_ABORT_CB_ID = 0x08U,
262 HAL_I2C_MSPINIT_CB_ID = 0x09U,
263 HAL_I2C_MSPDEINIT_CB_ID = 0x0AU
265 } HAL_I2C_CallbackIDTypeDef;
271 typedef void (*pI2C_AddrCallbackTypeDef)(
I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
290 #define I2C_DUTYCYCLE_2 0x00000000U
291 #define I2C_DUTYCYCLE_16_9 I2C_CCR_DUTY
299 #define I2C_ADDRESSINGMODE_7BIT 0x00004000U
300 #define I2C_ADDRESSINGMODE_10BIT (I2C_OAR1_ADDMODE | 0x00004000U)
308 #define I2C_DUALADDRESS_DISABLE 0x00000000U
309 #define I2C_DUALADDRESS_ENABLE I2C_OAR2_ENDUAL
317 #define I2C_GENERALCALL_DISABLE 0x00000000U
318 #define I2C_GENERALCALL_ENABLE I2C_CR1_ENGC
326 #define I2C_NOSTRETCH_DISABLE 0x00000000U
327 #define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH
335 #define I2C_MEMADD_SIZE_8BIT 0x00000001U
336 #define I2C_MEMADD_SIZE_16BIT 0x00000010U
344 #define I2C_DIRECTION_RECEIVE 0x00000000U
345 #define I2C_DIRECTION_TRANSMIT 0x00000001U
353 #define I2C_FIRST_FRAME 0x00000001U
354 #define I2C_FIRST_AND_NEXT_FRAME 0x00000002U
355 #define I2C_NEXT_FRAME 0x00000004U
356 #define I2C_FIRST_AND_LAST_FRAME 0x00000008U
357 #define I2C_LAST_FRAME_NO_STOP 0x00000010U
358 #define I2C_LAST_FRAME 0x00000020U
363 #define I2C_OTHER_FRAME (0x00AA0000U)
364 #define I2C_OTHER_AND_LAST_FRAME (0xAA000000U)
375 #define I2C_IT_BUF I2C_CR2_ITBUFEN
376 #define I2C_IT_EVT I2C_CR2_ITEVTEN
377 #define I2C_IT_ERR I2C_CR2_ITERREN
386 #define I2C_FLAG_OVR 0x00010800U
387 #define I2C_FLAG_AF 0x00010400U
388 #define I2C_FLAG_ARLO 0x00010200U
389 #define I2C_FLAG_BERR 0x00010100U
390 #define I2C_FLAG_TXE 0x00010080U
391 #define I2C_FLAG_RXNE 0x00010040U
392 #define I2C_FLAG_STOPF 0x00010010U
393 #define I2C_FLAG_ADD10 0x00010008U
394 #define I2C_FLAG_BTF 0x00010004U
395 #define I2C_FLAG_ADDR 0x00010002U
396 #define I2C_FLAG_SB 0x00010001U
397 #define I2C_FLAG_DUALF 0x00100080U
398 #define I2C_FLAG_GENCALL 0x00100010U
399 #define I2C_FLAG_TRA 0x00100004U
400 #define I2C_FLAG_BUSY 0x00100002U
401 #define I2C_FLAG_MSL 0x00100001U
420 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
421 #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) do{ \
422 (__HANDLE__)->State = HAL_I2C_STATE_RESET; \
423 (__HANDLE__)->MspInitCallback = NULL; \
424 (__HANDLE__)->MspDeInitCallback = NULL; \
427 #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET)
439 #define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__))
440 #define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__))
451 #define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
476 #define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) ((((uint8_t)((__FLAG__) >> 16U)) == 0x01U) ? \
477 (((((__HANDLE__)->Instance->SR1) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET) : \
478 (((((__HANDLE__)->Instance->SR2) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET))
490 #define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR1 = ~((__FLAG__) & I2C_FLAG_MASK))
497 #define __HAL_I2C_CLEAR_ADDRFLAG(__HANDLE__) \
499 __IO uint32_t tmpreg = 0x00U; \
500 tmpreg = (__HANDLE__)->Instance->SR1; \
501 tmpreg = (__HANDLE__)->Instance->SR2; \
509 #define __HAL_I2C_CLEAR_STOPFLAG(__HANDLE__) \
511 __IO uint32_t tmpreg = 0x00U; \
512 tmpreg = (__HANDLE__)->Instance->SR1; \
513 SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE); \
521 #define __HAL_I2C_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)
527 #define __HAL_I2C_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)
548 #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
645 #define I2C_FLAG_MASK 0x0000FFFFU
646 #define I2C_MIN_PCLK_FREQ_STANDARD 2000000U
647 #define I2C_MIN_PCLK_FREQ_FAST 4000000U
657 #define I2C_MIN_PCLK_FREQ(__PCLK__, __SPEED__) (((__SPEED__) <= 100000U) ? ((__PCLK__) < I2C_MIN_PCLK_FREQ_STANDARD) : ((__PCLK__) < I2C_MIN_PCLK_FREQ_FAST))
658 #define I2C_CCR_CALCULATION(__PCLK__, __SPEED__, __COEFF__) (((((__PCLK__) - 1U)/((__SPEED__) * (__COEFF__))) + 1U) & I2C_CCR_CCR)
659 #define I2C_FREQRANGE(__PCLK__) ((__PCLK__)/1000000U)
660 #define I2C_RISE_TIME(__FREQRANGE__, __SPEED__) (((__SPEED__) <= 100000U) ? ((__FREQRANGE__) + 1U) : ((((__FREQRANGE__) * 300U) / 1000U) + 1U))
661 #define I2C_SPEED_STANDARD(__PCLK__, __SPEED__) ((I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 2U) < 4U)? 4U:I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 2U))
662 #define I2C_SPEED_FAST(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__DUTYCYCLE__) == I2C_DUTYCYCLE_2)? I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 3U) : (I2C_CCR_CALCULATION((__PCLK__), (__SPEED__), 25U) | I2C_DUTYCYCLE_16_9))
663 #define I2C_SPEED(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__SPEED__) <= 100000U)? (I2C_SPEED_STANDARD((__PCLK__), (__SPEED__))) : \
664 ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__)) & I2C_CCR_CCR) == 0U)? 1U : \
665 ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__))) | I2C_CCR_FS))
667 #define I2C_7BIT_ADD_WRITE(__ADDRESS__) ((uint8_t)((__ADDRESS__) & (uint8_t)(~I2C_OAR1_ADD0)))
668 #define I2C_7BIT_ADD_READ(__ADDRESS__) ((uint8_t)((__ADDRESS__) | I2C_OAR1_ADD0))
670 #define I2C_10BIT_ADDRESS(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)0x00FF)))
671 #define I2C_10BIT_HEADER_WRITE(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7) | (uint16_t)0x00F0)))
672 #define I2C_10BIT_HEADER_READ(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7) | (uint16_t)(0x00F1))))
674 #define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0xFF00)) >> 8)))
675 #define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)0x00FF)))
680 #define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DUTYCYCLE_2) || \
681 ((CYCLE) == I2C_DUTYCYCLE_16_9))
682 #define IS_I2C_ADDRESSING_MODE(ADDRESS) (((ADDRESS) == I2C_ADDRESSINGMODE_7BIT) || \
683 ((ADDRESS) == I2C_ADDRESSINGMODE_10BIT))
684 #define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \
685 ((ADDRESS) == I2C_DUALADDRESS_ENABLE))
686 #define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \
687 ((CALL) == I2C_GENERALCALL_ENABLE))
688 #define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \
689 ((STRETCH) == I2C_NOSTRETCH_ENABLE))
690 #define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \
691 ((SIZE) == I2C_MEMADD_SIZE_16BIT))
692 #define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) > 0U) && ((SPEED) <= 400000U))
693 #define IS_I2C_OWN_ADDRESS1(ADDRESS1) (((ADDRESS1) & 0xFFFFFC00U) == 0U)
694 #define IS_I2C_OWN_ADDRESS2(ADDRESS2) (((ADDRESS2) & 0xFFFFFF01U) == 0U)
695 #define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \
696 ((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) || \
697 ((REQUEST) == I2C_NEXT_FRAME) || \
698 ((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \
699 ((REQUEST) == I2C_LAST_FRAME) || \
700 ((REQUEST) == I2C_LAST_FRAME_NO_STOP) || \
701 IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST))
703 #define IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_OTHER_FRAME) || \
704 ((REQUEST) == I2C_OTHER_AND_LAST_FRAME))
706 #define I2C_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)) ? SET : RESET)
707 #define I2C_CHECK_IT_SOURCE(__CR1__, __IT__) ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET)