DIY Logging Volt/Ampmeter
STM32F10x_System_Exported_Functions

Functions

void SystemInit (void)
 Setup the microcontroller system Initialize the Embedded Flash Interface, the PLL and update the SystemCoreClock variable. More...
 
void SystemCoreClockUpdate (void)
 Update SystemCoreClock variable according to Clock Register Values. The SystemCoreClock variable contains the core clock (HCLK), it can be used by the user application to setup the SysTick timer or configure other parameters. More...
 

Detailed Description

Function Documentation

◆ SystemCoreClockUpdate()

void SystemCoreClockUpdate ( void  )

Update SystemCoreClock variable according to Clock Register Values. The SystemCoreClock variable contains the core clock (HCLK), it can be used by the user application to setup the SysTick timer or configure other parameters.

Note
Each time the core clock (HCLK) changes, this function must be called to update SystemCoreClock variable value. Otherwise, any configuration based on this variable will be incorrect.
- The system frequency computed by this function is not the real frequency in the chip. It is calculated based on the predefined constant and the selected clock source:
  • If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
  • If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
  • If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) or HSI_VALUE(*) multiplied by the PLL factors.

(*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value 8 MHz) but the real value may vary depending on the variations in voltage and temperature.

(**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value 8 MHz or 25 MHz, depending on the product used), user has to ensure that HSE_VALUE is same as the real frequency of the crystal used. Otherwise, this function may have wrong result.

  • The result of this function could be not correct when using fractional value for HSE crystal.
    Parameters
    None
    Return values
    None

< Default value of the Internal oscillator in Hz. This value can be provided and adapted by the user application.

< Default value of the External oscillator in Hz. This value can be provided and adapted by the user application.

< Default value of the Internal oscillator in Hz. This value can be provided and adapted by the user application.

< Default value of the External oscillator in Hz. This value can be provided and adapted by the user application.

< Default value of the External oscillator in Hz. This value can be provided and adapted by the user application.

< Default value of the Internal oscillator in Hz. This value can be provided and adapted by the user application.

Definition at line 225 of file system_stm32f1xx.c.

226 {
227  uint32_t tmp = 0U, pllmull = 0U, pllsource = 0U;
228 
229 #if defined(STM32F105xC) || defined(STM32F107xC)
230  uint32_t prediv1source = 0U, prediv1factor = 0U, prediv2factor = 0U, pll2mull = 0U;
231 #endif /* STM32F105xC */
232 
233 #if defined(STM32F100xB) || defined(STM32F100xE)
234  uint32_t prediv1factor = 0U;
235 #endif /* STM32F100xB or STM32F100xE */
236 
237  /* Get SYSCLK source -------------------------------------------------------*/
238  tmp = RCC->CFGR & RCC_CFGR_SWS;
239 
240  switch (tmp)
241  {
242  case 0x00U: /* HSI used as system clock */
244  break;
245  case 0x04U: /* HSE used as system clock */
247  break;
248  case 0x08U: /* PLL used as system clock */
249 
250  /* Get PLL clock source and multiplication factor ----------------------*/
251  pllmull = RCC->CFGR & RCC_CFGR_PLLMULL;
252  pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
253 
254 #if !defined(STM32F105xC) && !defined(STM32F107xC)
255  pllmull = ( pllmull >> 18U) + 2U;
256 
257  if (pllsource == 0x00U)
258  {
259  /* HSI oscillator clock divided by 2 selected as PLL clock entry */
260  SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
261  }
262  else
263  {
264  #if defined(STM32F100xB) || defined(STM32F100xE)
265  prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
266  /* HSE oscillator clock selected as PREDIV1 clock entry */
267  SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
268  #else
269  /* HSE selected as PLL clock entry */
270  if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET)
271  {/* HSE oscillator clock divided by 2 */
272  SystemCoreClock = (HSE_VALUE >> 1U) * pllmull;
273  }
274  else
275  {
276  SystemCoreClock = HSE_VALUE * pllmull;
277  }
278  #endif
279  }
280 #else
281  pllmull = pllmull >> 18U;
282 
283  if (pllmull != 0x0DU)
284  {
285  pllmull += 2U;
286  }
287  else
288  { /* PLL multiplication factor = PLL input clock * 6.5 */
289  pllmull = 13U / 2U;
290  }
291 
292  if (pllsource == 0x00U)
293  {
294  /* HSI oscillator clock divided by 2 selected as PLL clock entry */
295  SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
296  }
297  else
298  {/* PREDIV1 selected as PLL clock entry */
299 
300  /* Get PREDIV1 clock source and division factor */
301  prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC;
302  prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
303 
304  if (prediv1source == 0U)
305  {
306  /* HSE oscillator clock selected as PREDIV1 clock entry */
307  SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
308  }
309  else
310  {/* PLL2 clock selected as PREDIV1 clock entry */
311 
312  /* Get PREDIV2 division factor and PLL2 multiplication factor */
313  prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4U) + 1U;
314  pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8U) + 2U;
315  SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull;
316  }
317  }
318 #endif /* STM32F105xC */
319  break;
320 
321  default:
323  break;
324  }
325 
326  /* Compute HCLK clock frequency ----------------*/
327  /* Get HCLK prescaler */
328  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)];
329  /* HCLK clock frequency */
330  SystemCoreClock >>= tmp;
331 }

◆ SystemInit()

void SystemInit ( void  )

Setup the microcontroller system Initialize the Embedded Flash Interface, the PLL and update the SystemCoreClock variable.

Note
This function should be used only after reset.
Parameters
None
Return values
None

Definition at line 176 of file system_stm32f1xx.c.

177 {
178 #if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
179  #ifdef DATA_IN_ExtSRAM
180  SystemInit_ExtMemCtl();
181  #endif /* DATA_IN_ExtSRAM */
182 #endif
183 
184  /* Configure the Vector Table location -------------------------------------*/
185 #if defined(USER_VECT_TAB_ADDRESS)
186  SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
187 #endif /* USER_VECT_TAB_ADDRESS */
188 }
SCB
#define SCB
Definition: core_armv8mbl.h:1122
AHBPrescTable
const uint8_t AHBPrescTable[16U]
Definition: system_stm32f1xx.c:143
RCC_CFGR_HPRE
#define RCC_CFGR_HPRE
Definition: stm32f103xb.h:959
RCC_CFGR_PLLMULL
#define RCC_CFGR_PLLMULL
Definition: stm32f103xb.h:1026
RCC_CFGR_PLLXTPRE
#define RCC_CFGR_PLLXTPRE
Definition: stm32f103xb.h:1021
RCC_CFGR_SWS
#define RCC_CFGR_SWS
Definition: stm32f103xb.h:948
RESET
@ RESET
Definition: stm32f1xx.h:153
HSE_VALUE
#define HSE_VALUE
Definition: system_stm32f1xx.c:78
RCC
#define RCC
Definition: stm32f103xb.h:684
RCC_CFGR_PLLSRC
#define RCC_CFGR_PLLSRC
Definition: stm32f103xb.h:1017
SystemCoreClock
uint32_t SystemCoreClock
Definition: system_stm32f1xx.c:142
HSI_VALUE
#define HSI_VALUE
Definition: system_stm32f1xx.c:83