Get the enable or disable status of the AHB peripheral clock. More...

Macros
#define	__HAL_RCC_DMA1_IS_CLK_ENABLED() ((RCC->AHBENR & (RCC_AHBENR_DMA1EN)) != RESET)

#define	__HAL_RCC_DMA1_IS_CLK_DISABLED() ((RCC->AHBENR & (RCC_AHBENR_DMA1EN)) == RESET)

#define	__HAL_RCC_SRAM_IS_CLK_ENABLED() ((RCC->AHBENR & (RCC_AHBENR_SRAMEN)) != RESET)

#define	__HAL_RCC_SRAM_IS_CLK_DISABLED() ((RCC->AHBENR & (RCC_AHBENR_SRAMEN)) == RESET)

#define	__HAL_RCC_FLITF_IS_CLK_ENABLED() ((RCC->AHBENR & (RCC_AHBENR_FLITFEN)) != RESET)

#define	__HAL_RCC_FLITF_IS_CLK_DISABLED() ((RCC->AHBENR & (RCC_AHBENR_FLITFEN)) == RESET)

#define	__HAL_RCC_CRC_IS_CLK_ENABLED() ((RCC->AHBENR & (RCC_AHBENR_CRCEN)) != RESET)

#define	__HAL_RCC_CRC_IS_CLK_DISABLED() ((RCC->AHBENR & (RCC_AHBENR_CRCEN)) == RESET)

Detailed Description

Get the enable or disable status of the AHB peripheral clock.

Note: After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.

Macro Definition Documentation

#define __HAL_RCC_CRC_IS_CLK_DISABLED ( ) ((RCC->AHBENR & (RCC_AHBENR_CRCEN)) == RESET)

Definition at line 379 of file stm32f1xx_hal_rcc.h.

#define __HAL_RCC_CRC_IS_CLK_ENABLED ( ) ((RCC->AHBENR & (RCC_AHBENR_CRCEN)) != RESET)

Definition at line 378 of file stm32f1xx_hal_rcc.h.

#define __HAL_RCC_DMA1_IS_CLK_DISABLED ( ) ((RCC->AHBENR & (RCC_AHBENR_DMA1EN)) == RESET)

Definition at line 373 of file stm32f1xx_hal_rcc.h.

#define __HAL_RCC_DMA1_IS_CLK_ENABLED ( ) ((RCC->AHBENR & (RCC_AHBENR_DMA1EN)) != RESET)

Definition at line 372 of file stm32f1xx_hal_rcc.h.

#define __HAL_RCC_FLITF_IS_CLK_DISABLED ( ) ((RCC->AHBENR & (RCC_AHBENR_FLITFEN)) == RESET)

Definition at line 377 of file stm32f1xx_hal_rcc.h.

#define __HAL_RCC_FLITF_IS_CLK_ENABLED ( ) ((RCC->AHBENR & (RCC_AHBENR_FLITFEN)) != RESET)

Definition at line 376 of file stm32f1xx_hal_rcc.h.

#define __HAL_RCC_SRAM_IS_CLK_DISABLED ( ) ((RCC->AHBENR & (RCC_AHBENR_SRAMEN)) == RESET)

Definition at line 375 of file stm32f1xx_hal_rcc.h.

#define __HAL_RCC_SRAM_IS_CLK_ENABLED ( ) ((RCC->AHBENR & (RCC_AHBENR_SRAMEN)) != RESET)

Definition at line 374 of file stm32f1xx_hal_rcc.h.