DIY Logging Volt/Ampmeter

Functions

__STATIC_INLINE void LL_LPM_EnableSleep (void)
 Processor uses sleep as its low power mode @rmtoll SCB_SCR SLEEPDEEP LL_LPM_EnableSleep. More...
 
__STATIC_INLINE void LL_LPM_EnableDeepSleep (void)
 Processor uses deep sleep as its low power mode @rmtoll SCB_SCR SLEEPDEEP LL_LPM_EnableDeepSleep. More...
 
__STATIC_INLINE void LL_LPM_EnableSleepOnExit (void)
 Configures sleep-on-exit when returning from Handler mode to Thread mode. More...
 
__STATIC_INLINE void LL_LPM_DisableSleepOnExit (void)
 Do not sleep when returning to Thread mode. @rmtoll SCB_SCR SLEEPONEXIT LL_LPM_DisableSleepOnExit. More...
 
__STATIC_INLINE void LL_LPM_EnableEventOnPend (void)
 Enabled events and all interrupts, including disabled interrupts, can wakeup the processor. @rmtoll SCB_SCR SEVEONPEND LL_LPM_EnableEventOnPend. More...
 
__STATIC_INLINE void LL_LPM_DisableEventOnPend (void)
 Only enabled interrupts or events can wakeup the processor, disabled interrupts are excluded @rmtoll SCB_SCR SEVEONPEND LL_LPM_DisableEventOnPend. More...
 

Detailed Description

Function Documentation

◆ LL_LPM_DisableEventOnPend()

__STATIC_INLINE void LL_LPM_DisableEventOnPend ( void  )

Only enabled interrupts or events can wakeup the processor, disabled interrupts are excluded @rmtoll SCB_SCR SEVEONPEND LL_LPM_DisableEventOnPend.

Return values
None

Definition at line 370 of file stm32f1xx_ll_cortex.h.

371 {
372  /* Clear SEVEONPEND bit of Cortex System Control Register */
373  CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
374 }

◆ LL_LPM_DisableSleepOnExit()

__STATIC_INLINE void LL_LPM_DisableSleepOnExit ( void  )

Do not sleep when returning to Thread mode. @rmtoll SCB_SCR SLEEPONEXIT LL_LPM_DisableSleepOnExit.

Return values
None

Definition at line 346 of file stm32f1xx_ll_cortex.h.

347 {
348  /* Clear SLEEPONEXIT bit of Cortex System Control Register */
349  CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
350 }

◆ LL_LPM_EnableDeepSleep()

__STATIC_INLINE void LL_LPM_EnableDeepSleep ( void  )

Processor uses deep sleep as its low power mode @rmtoll SCB_SCR SLEEPDEEP LL_LPM_EnableDeepSleep.

Return values
None

Definition at line 322 of file stm32f1xx_ll_cortex.h.

323 {
324  /* Set SLEEPDEEP bit of Cortex System Control Register */
325  SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
326 }

◆ LL_LPM_EnableEventOnPend()

__STATIC_INLINE void LL_LPM_EnableEventOnPend ( void  )

Enabled events and all interrupts, including disabled interrupts, can wakeup the processor. @rmtoll SCB_SCR SEVEONPEND LL_LPM_EnableEventOnPend.

Return values
None

Definition at line 358 of file stm32f1xx_ll_cortex.h.

359 {
360  /* Set SEVEONPEND bit of Cortex System Control Register */
361  SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
362 }

◆ LL_LPM_EnableSleep()

__STATIC_INLINE void LL_LPM_EnableSleep ( void  )

Processor uses sleep as its low power mode @rmtoll SCB_SCR SLEEPDEEP LL_LPM_EnableSleep.

Return values
None

Definition at line 311 of file stm32f1xx_ll_cortex.h.

312 {
313  /* Clear SLEEPDEEP bit of Cortex System Control Register */
314  CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
315 }

◆ LL_LPM_EnableSleepOnExit()

__STATIC_INLINE void LL_LPM_EnableSleepOnExit ( void  )

Configures sleep-on-exit when returning from Handler mode to Thread mode.

Note
Setting this bit to 1 enables an interrupt-driven application to avoid returning to an empty main application. @rmtoll SCB_SCR SLEEPONEXIT LL_LPM_EnableSleepOnExit
Return values
None

Definition at line 335 of file stm32f1xx_ll_cortex.h.

336 {
337  /* Set SLEEPONEXIT bit of Cortex System Control Register */
338  SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
339 }
SCB
#define SCB
Definition: core_armv8mbl.h:1122
SET_BIT
#define SET_BIT(REG, BIT)
Definition: stm32f1xx.h:178
SCB_SCR_SLEEPONEXIT_Msk
#define SCB_SCR_SLEEPONEXIT_Msk
Definition: core_armv8mbl.h:496
CLEAR_BIT
#define CLEAR_BIT(REG, BIT)
Definition: stm32f1xx.h:180
SCB_SCR_SLEEPDEEP_Msk
#define SCB_SCR_SLEEPDEEP_Msk
Definition: core_armv8mbl.h:493
SCB_SCR_SEVONPEND_Msk
#define SCB_SCR_SEVONPEND_Msk
Definition: core_armv8mbl.h:487